PWM Switching Strategy Research Articles

Improved PWM Switching Scheme to Mitigate Power Loss and Switch Temperature of CHB Inverters

Improved PWM Switching Scheme to Mitigate Power Loss and Switch Temperature of CHB Inverters

A review on multilevel H-Bridge cascaded inductor less hybrid inverter for Electric vehicles with PWM control

This article explains a cascaded H-bridge without inductor for Electric operated and Hybrid Electric operated Vehicles applications. Power inverter systems, DC-DC converter [8] is now available for hybrid electric operated vehicles to improve conventional battery stored voltages. The existing inverters for HEV traction drives have High density of power, costly and poor performance, they need a bulky inductor. This paper proposes An H-bridge cascaded without inductor MLI for Electric operated and Hybrid Electric operated Vehicles applications. Any H-bridge historically requires a DC Electricity. In the proposed cascaded inductor less H-bridge, a regular 3-leg (one leg per phase) is used and a series H-Bridge using a DC power source condenser with each inverter leg. The PWM switching scheme is used to control [18] the modulation and create a five-stage phase voltage. Results indicate that the proposed circuit generates an improved AC voltage which can be the performance of a multilevel inductor less DC - AC H-Bridge cascaded inverter.

A Novel Cascaded Multilevel Converter Topology Based on Three-Phase Cells—CHB-SDC

This paper proposes a new cascaded multilevel converter topology based on three-phase H bridge cells with a common DC-link structure. The proposed multilevel converter topology main advantages, compared with literature renowned multilevel converters topologies, are discussed in the paper, such as modularity, construction, implementation cost, and DC voltage ripple mitigation. Despite presenting an elementary structure and easy implementation, the use of classic PWM switching strategies is not feasible for this topology, causing the appearance of several short-circuit states between its capacitors. Thus, a graph theory algorithm combined with a model predictive control is also proposed in this work to identify and avoid the new cascaded multilevel converter short-circuit switching states and, concomitantly, guaranteeing the converter output power quality. In order to validate the presented topology applicability, a low voltage synchronous static compensators (STATCOM) with an optimal switching vector model predictive control (OSV-MPC) is implemented in a hardware-in-the-loop platform. The real-time experimental results prove the proposed multilevel topology and the OSV-MPC control strategy effectiveness.

Critical analysis of random frequency inverted sine carrier PWM fortification for half-controlled bipolar three-phase inverters

The inverted sine carrier-based pulse width modulation scheme has been acknowledged for fundamental fortification in DC–AC conversion. This paper suggests a randomized inverted sine carrier for the half-controlled PWM switching strategy of a three-phase voltage source inverter to enhance its ability to spread harmonic power. A detailed study of the proposed modulation technique is presented through MATLAB-Simulink, and switching pulses are generated in the ModelSim digital environment. Harmonic analyses and assessments of different performance measures such as power spectrum density, harmonic spread factor, total harmonic distortion and dominating harmonic orders for various modulation indices have been carried out. Simulation and experimental results show that the proposed PWM method can spread harmonic power in output voltage better than the conventional SPWM or SVPWM. For real-time digital implementation, the gating signals are generated using a field-programmable gate array Spartan XC3S500E − 320F device.

Optimum pulse-width modulation strategy for a symmetric cascaded multilevel inverter

This paper investigates for the most suitable PWM strategy for a symmetric cascaded multilevel inverter. The objective is to determine a PWM switching strategy which optimises inverter performance by ensuring higher DC link utilisation and minimum total harmonic distortion (THD) at low switching frequency to minimise switching power losses. Simulations carried out in MATLAB-Simulink environment has given an insight of inverter performance when carrier-based PWM techniques are applied. In this parametric evaluation, both odd and even multiples of 50 Hz modulating signal were applied for obtaining switching frequency for various multicarrier-based PWM strategies.

Optimum pulse-width modulation strategy for a symmetric cascaded multilevel inverter

This paper investigates for the most suitable PWM strategy for a symmetric cascaded multilevel inverter. The objective is to determine a PWM switching strategy which optimises inverter performance by ensuring higher DC link utilisation and minimum total harmonic distortion (THD) at low switching frequency to minimise switching power losses. Simulations carried out in MATLAB-Simulink environment has given an insight of inverter performance when carrier-based PWM techniques are applied. In this parametric evaluation, both odd and even multiples of 50 Hz modulating signal were applied for obtaining switching frequency for various multicarrier-based PWM strategies.

Hybrid Modulation Strategy for Asymmetrical Cascade H-Bridge Multilevel Inverters

In this paper, a modulation strategy proposal for asymmetrical cascade converters is presented. This proposal consists of a combination of staircase and PWM switching strategies. The simplicity of the implementation makes this proposal attractive, and it is intended for any number of cells and it works for asymmetrical binary and trinary converters. Furthermore, the main feature of this proposal is that it permits reduction of the AC voltage distortion, as shown through simulation and experimental results.

Reduction in Current THD of Grid Parallel Inverters Using Randomized PR Control

In grid connected system, unity power factor current injection into the grid is vital. This can be achieved by choosing the right inverter topology, passive filter components, current controllers, and PWM switching scheme. This paper compares the output current harmonics profile between when using the conventional proportional resonant (PR) current controller and when using the modified PR current controller. By applying the latter technique, via experimental validation using TMS320F2812, the THD of the injected grid current in a parallel connected inverters system is improved.

Performance Metric of Z Source CHB Multilevel Inverter FED IM for Selective Harmonic Elimination and THD Reduction

This paper focuses on a Z source cascaded multilevel inverter which is designed to minimize harmonics in the output voltage. A balanced dc-link peak voltage can be achieved. The power generation module is built by PV panels which are connected to Z-Source Cascade H-bridge inverter. Cascaded multilevel inverter can achieve the distributed maximum power point tracking to increase the system efficiency and achieve high voltage/high power grid tie without a transformer. This paper analyzes the different PWM switching scheme and the operating states of a ZSI module and comparison is made with different PWM and total harmonic distortion of various PWM schemes.

Microcontroller-Based HEPWM Cascaded H-Bridge Multilevel Inverter System for Renewable Energy Application

This paper presents the implementation of a microcontroller-based Harmonic Elimination PWM (HEPWM) switching scheme of a Cascaded H-Bridge Multilevel Inverter (CHMI) for renewable energy system. This technique applies Particle Swarm Optimization (PSO) technique to allow computation of HEPWM switching angles. The detail description on the microcontroller-based implementation is provided in this paper. The performance of CHMI employing the control strategy based-on the simulation and experimental results are shown for comparison purposes.

Digital Simulation and Analysis of Six Modes of Operation of BLDC Motor Drives Using Hysteresis Band PWM Switching Scheme

Permanent magnet Brushless DC (BLDC) motors are gaining popularity mainly because of their better characteristics and performance in comparison to other electrical motors. BLDC motors are generally controlled using a three phase power semiconductor bridge. For starting and providing proper commutation sequence to turn on the power devices in the inverter bridge, the rotor position sensors are required. Based on the rotor position, the power devices are commutated sequentially every 60 degrees. This paper presents MATLAB/SIMULINK based simulation of BLDC motor drives. BLDC motor drive operates in six modes for one complete revolution of the rotor. The complete analysis of six modes of operation with position of rotor has been presented in this paper. The switching of the IGBT switches and corresponding phase currents and line voltages are shown here for each sequence. The presented BLDC motor drive is based on hysteresis band PWM current controller for generating modulated switching signals.

Microcontroller-Based Improved Predictive Current Controlled VSI for Single-Phase Grid-Connected Systems

Predictive current control offers the potential for achieving more precise current control with a minimum of distortion and harmonic noise. However, the predictive method is difficult to implement and has a greater computational burden. This paper introduces a theoretical analysis and experimental verification for an improved predictive current control technique applied to single phase grid connected voltage source inverters (VSI). The proposed technique has simple calculations. An ATmega1280 microcontroller board is used to implement the proposed technique for a simpler and cheaper control system. To enhance the current performance and to obtain a minimum of current THD, an improved tri-level PWM switching strategy is proposed. The proposed switching strategy uses six operation modes instead of four as in the traditional strategy. Simulation results are presented to demonstrate the system performance with the improved switching strategy and its effect on current performance. The presented experimental results verify that the proposed technique can be implemented using fixed point 8-bit microcontroller to obtain excellent results.

ANALYSIS OF CURRENT HARMONICS IN A DECOUPLED SVPWM CONTROLLED DUAL TWO LEVEL INVERTER FED OPEN END WINDING INDUCTION MOTOR DRIVE

Pulse width modulation has been one of the most intensively investigated areas of power electronics for many years now, and the number of combinations seems to be endless. However, according to a hierarchal consensus, Space Vector Modulation techniques are ranked higher in order of merit, based on harmonic performance. In this paper, Space Vector PWM Switching scheme is employed for a dual two level inverter feeding an Induction motor from both ends (open end winding). The decoupled SVPWM is employed for the dual-inverter scheme in order to realize the reference voltage vector. The Gating pulses are correspondingly generated for the dual inverters in order to realize the reference voltage, and the respective voltages are fed to 1kW open end windings of an induction motor drive. The harmonic content of the three phase currents in the motor are analyzed with an appropriate variation in its modulation index. Thus the performance in terms of harmonic analysis is carried out using Matlab/SIMULINK for an open end winding induction motor drive.

A High-Performance Sensorless Position Control System of a Synchronous Reluctance Motor Using Dual Current-Slope Estimating Technique

This paper proposes an adaptive sensorless position control system for a synchronous reluctance motor (SynRM). By using the proposed dual current-slope estimating technique, the rotor position of the SynRM can be precisely obtained. In addition, a comparison which shows that the proposed dual current-slope method has better performance than the traditional single current-slope method is discussed. To improve the transient responses and load disturbance rejection capability, an adaptive controller and a novel online self-tuning-gain state estimator are proposed here. A TMS-320F-28335 digital signal processor is used to execute the rotor position estimation, self-tuning-gain state estimation, adaptive control algorithm, d-q to a-b-c coordinate transformation, and PWM switching strategy. As a result, the hardware circuit is very simple. Experimental results show that the proposed system has satisfactory performance and good robustness. The estimated position error of the proposed dual current-slope estimating method can be reduced to 50% as compared to the traditional single current-slope position estimating method. Several experimental results are provided to validate the theoretical analysis.

Uniform Overlapped Multi-Carrier PWM for a Six-Level Diode Clamped Inverter

Multi-level voltage source inverters offer several advantages such as; derivation of a refined output voltage with reduced total harmonic distortion (THD), reduction of voltage ratings of the power semiconductor switching devices and also the reduced electro-magnetic-interference problems etc. In this paper, new carrier-overlapped phase-disposition or sub-harmonic sinusoidal pulse width modulation (CO-PD-SPWM) and also the carrier- overlapped phase-disposition space vector modulation (CO-PD- SVPWM) schemes for a six-level diode-clamped inverter topology are proposed. The principle of the proposed PWM schemes is similar to the conventional PD-PWM with a little deviation from it in the sense that the triangular carriers are all overlapped. The overlapping of the triangular carriers on one hand results in an increased number of switchings, on the other hand this facilitates an improved spectral performance of the output voltage. It is demonstrated through simulation studies that the six-level diode-clamped inverter with the use of CO-PD-SPWM and CO-PD-SVPWM proposed in this paper is capable of generating multiple levels in its output voltage. The advantages of the proposed PWM schemes can be derived to benefit, especially at lower modulation indices of the inverter and hence this aspect of the proposed PWM schemes can be well exploited in high power applications requiring low speeds of operation of the drive. Keywords—Diode clamped inverter, Pulse width modulation, Six level inverter, carrier based PWM. drawbacks, they have their own merits as compared to the others. These circuits are slowly being accepted by the industry in the recent times and are the focus of many researchers now. Several multilevel PWM switching schemes have been proposed in the past and an extensive survey of PWM schemes has also been reported in the literature (7). Improved spectral performance and enhanced DC-bus utilization is also achieved by altogether modifying the sinusoidal modulating signal by either adding appropriate third harmonic component or giving suitable offset voltages (7)-(9). Triangular multi- carriers are uniformly distributed with their phases adjusted to suit the application is reported in the past (10)-(13). Multilevel PWM with modified triangular carriers are also reported in the literature for a multi-level inverter (14)-(15). In this paper, uniform, zero phase shifted, overlapped multi- carrier PWM switching schemes are proposed using the conventional SPWM and also the SVPWM for a six-level diode-clamped inverter circuit topology. It is eloquently demonstrated through simulation studies that the spectral performance of the output voltage using the overlapped carrier PWM proposed in this paper is improved as compared to the use of the conventional PD-PWM especially in the lower modulation range. The main drawback with the use of the proposed PWM is the increased total number of switchings; resulting in an increased switching power loss. However, the improved spectrum of the output voltage with the proposed PWM scheme could offset the increased switching power loss.

Artificial Intelligent Controller for Current Source Converter-Based Modular Active Power Filters

The control methodology of the active power-line filter is the key element for its successful performance in mitigating the line current harmonics. The control system processes the distorted line current signal and forces the converter to inject the proper compensating current. At the same time, it regulates the dc term, i.e., the dc current in the current source converter topology and the dc voltage in the voltage source converter topology. In this paper, a new intelligent control scheme for a modular single-phase active power filter based on the current source converter (CSC) topology is proposed. The intelligent controller utilizes two adaptive linear neurons (ADALINEs) to process the signals obtained from the power-line. The first ADALINE (the Current ADALINE) extracts the harmonic components of the distorted line current signal and the second ADALINE (the Voltage ADALINE) estimates the fundamental component of the line voltage signal. The outputs of the two ADALINEs are used to construct the modulating signals of a number of CSC modules, each dedicated to eliminate a specific harmonic. The proposed controller is also responsible for activating selected CSC filter module(s) to the electric grid. The automated activation of the corresponding filter module(s) is based on the decision-making rules in accordance with the current total harmonic distortion (THD/sub i/) and the harmonic factor (HF) levels set by the IEEE 519-1992 standard. A special 3-level PWM switching strategy is proposed for the filter modules which results in a 50% reduction in the overall switching losses compared with the 2-level method. The proposed controller adjusts the I/sub dc/ in each CSC module based on the present magnitude of the corresponding harmonic current which results in optimum dc-side current value and minimal converter losses. The high speed, accuracy, efficiency and flexibility offered by the proposed controller, combined with the fast response and low dc energy storage requirement of CSC topology, are the main advantages of the proposed active filter system. The analytical expectations are verified by digital simulation using EMTDC simulation package.

Dual two-level inverter scheme for an open-end winding induction motor drive with a single DC power supply and improved DC bus utilisation

A dual two-level inverter fed open-end winding induction motor drive with a single DC-power supply is proposed. The proposed scheme produces voltage space vector locations identical to those of a conventional three-level inverter. In the conventional neutral-clamped three-level inverter, the series-connected DC link capacitors carry the load current, resulting in a fluctuating neutral point. Also, a three-level inverter requires bulky DC link capacitors. In the proposed scheme, the DC link capacitors carry currents of higher frequency and hence the neutral point fluctuations are reduced. A PWM switching strategy to suppress the zero sequence currents for all the voltage space phasor combinations is also proposed. This strategy is an improvisation of the one that uses a switched neutral to eliminate the triplen harmonic currents and results in an improved DC bus utilisation.

PWM inverter switching strategy for a dual two-level inverter fed open-end winding induction motor drive with a switched neutral

A dual two-level inverter fed open-end winding induction motor drive is proposed in this paper. A total of 64 voltage space phasor combinations are possible in this scheme since each inverter produces eight voltage space phasors. The scheme produces voltage space phasor locations similar to that of a three-level inverter except that in a three-level inverter the series-connected DC link capacitors carry the load current, which results in undesirable fluctuating voltage space phasors. Also, a three-level inverter requires a bulky DC link capacitor. In the proposed scheme the DC link capacitor carries only the ripple current and hence the voltage space phasor fluctuations are absent. A PWM switching strategy aimed at suppressing the zero sequence currents is proposed, using auxiliary switch-assisted neutral generation.

Comparison of different switching patterns in direct torque control technique of induction motors

Abstract In this paper, the direct torque control (DTC) technique is used for induction motor control. Non-pulse-width modulation (NPWM) techniques are frequently preferred due to the high switching frequency resulting from conventional PWM switching schemes. Four different switching algorithms using hysteresis and non-hysteresis controllers are proposed and compared. Results are presented of the steady-state and dynamic behaviour of a drive with speed and torque references, controlled using the four switching techniques. The harmonic spectra of the stator voltage and current are determined and compared for the four switching techniques. The results indicate that the non-hysteresis controllers are cheaper and consume less electric power than the hysteresis controllers. Among these algorithms, the non-hysteresis controllers, referred to as the two-band flux controller and the triple-band torque controller, lead to a better result with an advantage of simpler control algorithms.

Current measurement in three-phase brushless DC drives

The problem of estimating the currents in the windings of a three phase brushless DC machine from measurements of a single drive input current is discussed in this paper. The proposed solution involves the application of a state observer, which uses errors between the actual and estimated drive input currents to update its estimates of winding currents. Such estimation is possible only if the winding currents are observable (i.e. knowledge of the drive input currents is sufficient to derive the winding currents), and it is shown that observability depends on drive operating condition, PWM switching strategy and machine winding connection. All of these factors are discussed for the case of current measurement in the DC link and a novel measurement strategy involving the measurement of total switching device current. An important advantage of the single current measurement method is that measurements are made equally on all three phases of the machine, so that the effects of sensor imbalance are eliminated.