Pseudo-random Sequence Generator Research Articles

Temporal action segmentation for video encryption

Videos contain temporal information, enabling them to capture the dynamic changes of actions and provide richer visual effects. Traditional video encryption methods involve decomposing videos into frames and encrypting them frame by frame, which results in significant resource consumption. This paper proposes a video encryption method based on temporal action segmentation. This methodology involves the identification and extraction of pivotal frames from a video dataset, followed by the encryption of these significant key frames. This approach serves to enhance the efficacy of the video encryption algorithm. The method consists of three modules. The first module uses temporal action segmentation to classify video frames and extract important frames for the second module’s input. The second module encrypts the extracted key frames using a chaos-based encryption algorithm, thereby reducing the time cost of video encryption. The third module outputs the encrypted video. During the encryption process, a large amount of key stream is required. To address this, the paper introduces a new pseudo-random sequence generation method called two-dimensional Gramacy&Lee map (2D-GLM). Comprehensive comparative analysis clearly demonstrates that compared to other systems, 2D-GLM exhibits superior performance and can generate a large number of high-performance pseudo-random sequences. The proposed algorithm is tested on GTEA, and the simulation results demonstrate that it can accomplish video encryption tasks with high security.

3D medical image encryption algorithm using biometric key and cubic S-box

Considering the scarcity of research on 3D medical image encryption, this paper proposes a novel 3D medical image encryption scheme based on biometric key and cubic S-box. To enhance the data security, biometric keys are utilized to overcome the limitations of traditional methods where secret keys with no practical meaning, fixed length, and finite key space, while cubic S-box is constructed to increase the nonlinearity of image cryptosystem. The proposed cryptosystem mainly consists of four phases: pseudo-random sequence generation, confusion, substitution, and diffusion. Firstly, the stepwise iterative algorithm based on coupled chaotic systems is utilized for generating pseudo-random sequences for confusion and diffusion. Secondly, the confusion algorithm based on multiple sorting can scramble pixel positions in 3D images. Thirdly, guided by the designed cubic S-box, pixel substitution is executed sequentially. Lastly, the diffusion algorithm based on ECA and finite field multiplication is capable of increasing the plaintext sensitivity of cryptosystem by concealing the statistical characteristics of plaintext. Simulation experiments performed on multiple 3D medical images demonstrate that the proposed encryption scheme exhibits favorable statistical performance, sufficiently large key space, strong system sensitivity and robustness, and can resist various typical cryptographic attacks.

Enhancing FPGA Testing Efficiency: A PRBS-Based Approach for DSP Slices and Multipliers

The multiplication operations are pivotal in (Application-Specific Integrated Circuits) ASICs and Digital Signal Processors (DSPs). The integration of Field-Programmable Gate Arrays (FPGAs) into modern embedded systems, efficient Built-in Self-Tests (BISTs), particularly for complex components like DSP slices, is essential. This paper evaluates Pseudo Random Binary Sequence (PRBS) generators and checkers as BIST tools for high-speed data transfers in FPGAs. The design achieves minimal errors and remarkable efficiency with less than 4% logic utilization within available Look-Up Tables (LUTs). The testing of embedded multipliers in modern FPGAs is analyzed, shedding light on their performance. The analysis includes Built-in Self-Test (BIST), PRBS generator, PRBS checker, and Bit Error Rate (BER), providing insights into FPGA-based testing. This analysis assesses PRBS tools for high-speed FPGA data transfers. A hybrid multiplier design, featuring BIST and PRBS capabilities, notably reduces DSP slice utilization from 16% to 5%. This liberated FPGA resource enhances operational capabilities. The runtime PRBS data control at the block level design exemplifies adaptability in FPGA testing. The findings underscore PRBS-based BIST potential in FPGA testing. The hybrid multiplier not only optimizes FPGA resources but also aligns with dynamic digital system requirements. This research aids FPGA designers and engineers in advanced testing strategies for evolving embedded systems.

Design of Pseudo-random Sequence Generator based on Three-dimensional Discrete Chaotic System

In this paper, a pseudo-random sequence generator with better randomness is constructed through the targeted improvement of chaotic system. Firstly, a new three-dimensional discrete chaotic system is proposed on the basis of the existing one-dimensional logistic chaotic system by improving and optimizing the dimensionality and coupling mode, and its Lyapunov exponent and other characteristics are analyzed; then, based on the chaotic system, a pseudo-random sequence generator is designed by using post-processing and heterodyne, etc.; after that, the performance of the pseudo-random sequence is discussed by using the evaluation methods of relevance, homogeneity, and NIST test. After that, the performance of the pseudo-random sequence is discussed using correlation, uniformity, NIST test and other evaluation methods. The results show that the three-dimensional discrete chaotic system has good chaotic properties, and the pseudo-random sequence generator based on this three-dimensional discrete chaotic system has good random performance and can pass the NIST test. The work in this paper provides an idea for the improvement of logistic mapping chaotic system and enriches the application form of pseudorandom sequence generator in information security.

Signature functional control of digital automatic device register operations

The development of digital operating automatic devices models of the systems with the property of high functional controllability of hardware and software tools for the performance of computational functions (operations) on a real scale becomes a priority task in the context of ensuring high efficiency and reliability of monitoring the functioning of digital metrological telemetric measurement and control systems of critical infrastructure problem growing relevance. In the article, based on a critical analysis of known methods for digital systems functional control, a method of ensuring the operational controllability of digital automatic devices is proposed based on the concept implementation of predicting (forecasting) control signatures of tuples and their state. Relevant concepts are introduced, and a structural-functional model of functional control for digital automatic device with «hard» logic based on the method of signature prediction is proposed. In the context of the practical implementation of the proposed method of predicting signatures on each operating cycle of the digital automatic device, a system of control signature equations formulas (signature functional control rules) is given for the basic types of digital automatic device register operations with «hard» logic. This makes it possible to implement a new functional control principle (signature functional control by the method of signature prediction) of digital automatic devices by introducing a unified hardware redundancy (synthesized hardware node of a signature functional control) from functionally complete elementary combinational structures from a finite set (standard set). In this regard, the relevance of functional control by the method of predicting signatures for generators of pseudorandom sequences of the maximum length in the digital automatic device of cryptographic encryption by jamming measurement information during its transmission in telecommunication channels of management systems of critical infrastructure objects in the conditions of possible cyberattacks is reasonably grounded. The scientific novelty of the obtained theoretical results is the authors' proof of the need to develop further the methodology of functional control of a general-purpose digital automatic device and, in particular, of telemetric measurement and control systems of critical infrastructure based on the use of the author's mathematical apparatus of synthesis «signature Boolean-polynomial algebra».

Evaluation of the parameters of the simulation model of microcontroller authenticators

Microcontroller technologies are the basis for intelligent devices, so cybersecurity issues are important when ensuring the exchange of information between them. As these devices form a variety of intelligent systems, authentication becomes a key aspect of cybersecurity. This process distinguishes between legitimate and illegitimate devices, allowing legitimate devices to access system resources and reject requests from illegitimate ones. Today there is a problem of choosing an authentication factor for a large number of electronic devices of the same type in the information system. The purpose of this study is to find out the possibility of a programmatic approach to simulating a "biometric" authentication template. To solve the goal, it is necessary to implement a simulator of templates with the properties of biometrics in a programming language, to evaluate the distribution of distances between pairs of templates, and to evaluate the parameters of the generated sequences from the point of view of brute force probability. In this study, a solution to the problem is proposed, which combines the ideas of the biometric factor and the possibilities of fast software generation of authenticators for microcontrollers. The work is devoted to the evaluation of the model parameters of the simulator of dynamic bit patterns of authentication based on the generator of pseudo-random impulse Poisson sequences. The work highlights the basic principles of the simulator's functioning and the advantages of using dynamic templates to ensure cyber security of electronic devices built on the basis of microcontrollers. Estimates of the main parameters of the simulator model were performed. The results of the work are important for the development of security of electronic systems and means of authentication in the context of cybersecurity of microcontrollers.

Quantum-Secure Hybrid Blockchain System for DID-Based Verifiable Random Function with NTRU Linkable Ring Signature

In this study, we present a secure smart contract-based Verifiable Random Function (VRF) model, addressing the shortcomings of existing systems. As quantum computing emerges, conventional public key cryptography faces potential vulnerabilities. To enhance our VRF’s robustness, we employ post-quantum Ring-LWE encryption for generating pseudorandom sequences and a NTRU lattice-based linkable ring signature scheme. Given the computational intensity of this approach and associated on-chain gas costs, we propose a hybrid architecture of VRF system where both on-chain and off-chain can communicate in a scalable and secure way. Our decentralized VRF employs multi-party computation (MPC) with blockchain-based decentralized identifiers (DID), ensuring the collective efforts of enhanced randomness and security. We show the security and privacy advantages of our proposed VRF model with the approximated estimation of overall temporal and spatial complexities. We also evaluate our VRF MPC model’s entropy and outline its Solidity smart contract integration. This research also provides a method to produce and verify the VRF output’s proof, optimal for scenarios necessitating randomness and validation. Lastly, using NIST SP800-22 test suite for randomness, we demonstrate the commendable result with a 97.73% overall pass rate on 11 standard tests and 0.5459 of average 𝑝-value for the total 176 tests.

SOFTWARE GENERATORS IN THE GPSS WORLD ENVIRONMENT FOR DISTRIBUTIONS-PROBABILITY MIXTURES WITH QUALITYASSESSMENT RESULTS

This article presents quality assessment results for the software generators of pseudo-random sequences (PRS) presented in [1; 2] for QS simulation, including second-order hyper-Erlang and hyper-exponential distributions of the second order, that flows organically from these works. These distribution laws are in demand in queuing theory as it provides a big range of changes in the variation coefficient which plays an important role in the average queue delay calculating. There is no data on such generators neither in scientific literature, no in the GPSS WORLD library. Software generator quality evaluation, regardless of the programming language, is usually made according to statistical tests. In this case, chi-squared and Kolmogorov-Smirnov’s tests are used. In addition, the comparison between theoretical and statistical aspects of the corresponding order is provided. Unlike simple distribution laws, for which the use of the above mentioned statistical tests is provided for in well-known software products and does not cause any difficulties, in our case automatic testing is impossible. The well-known packages STATISTICA, STATGAPHICS, Matlab/Simulink, etc. do not provide for the use of the hyper-Erlang and hyper-exponential distribution laws we consider. Therefore, the Pearson statistical test is calculated and checked manually. The presented results should be useful for professionals of discrete event modeling in the GPSS WORLD environment.

A RGB image encryption technique using chaotic maps of fractional variable-order based on DNA encoding

This paper presents a controller-based synchronization scheme in a leader-follower architecture for chaotic maps of fractional variable-order. The proposed scheme demonstrates successful synchronization of three different chaotic maps through simulation results. The implementation on Arduino UNO boards is used to showcase the relatively low algorithm complexity of the proposed scheme. Additionally, the paper explores a potential application of the proposed scheme in an RGB image encryption system, leveraging the chaotic behavior of the system for pseudo-random sequence generation. The encoding scheme utilizes the complementary property of Deoxyribonucleic acid (DNA) molecule bases. The presented encryption scheme employs the variable-order of the fractional derivative as a key for improved safety. This enhancement improves the methodology resistance against brute-force attacks while maintaining resilience against other cryptoanalysis techniques.

Оценка точности цифровой обработки сильно зашумленных сигналов с помощью эвристических алгоритмов

Heuristic algorithms are often used as an alternative when solving problems of high computational complexity or lacking an exact solution, allowing to quickly obtain the desired result. Usually, they do not have a strict mathematical justification, but their application is justified in terms of practicality. Formally, algorithms that use approximate methods can be classified as heuristic. However, when applying them, the problem of determinism lack is often arises, which does not always allow one to evaluate the solution obtained accuracy. The paper considers a methodical approach to assessing the accuracy of heuristic algorithms designed to determine the useful signal shape and parameters on the strong noise component background. It is based on the method of analogy and consists in modeling an artificial signal with given parameters and a background noise interference similar in its characteristics to additive white Gaussian noise. In this case, the noise component is formed by software using a pseudo-random number sequence generator. Such generators are included in the packages of almost all high-level programming languages built-in functions. A comparative analysis of the real and artificial noise characteristics is presented, that shown the problem solving by numerical modeling possibility. The results of accuracy estimation in determining the artificial signal parameters, that is separated from the noise component using piecewise linear approximation and averaging heuristic algorithms, are obtained. The problem of empirical data smoothing with the discrete signal equivalent replacement by a quadratic functions whose parameters provide a piecewise parabolic approximation its shape is also considered. This procedure eliminates the residual signal bounce that inevitably occurs as a result of linearization and allows further recording at any sampling rate. Thus, the proposed approach allows us to quantify the accuracy of heuristic algorithms used in determining the expected signal parameters.

SIMULATION MODEL OF A QS WITH HYPEREXPONENTIAL DISTRIBUTION IN THE GPSS WORLD ENVIRONMENT

This article presents results obtained on the development of a pseudo-random sequence generator for simulation modeling of queueing system (QS) with second-order hyperexponential input distribution. In the scientific literature on GPSS WORLD, including web resources, the authors did not find any data in this subject area. The GPSS WORLD library includes many generators of various distribution laws, but there are no generators for such important composite distributions according to the queuing theory. It is known that the hyperexponential distribution concept provides a wide range of changes in the random variable variation coefficient from unity to an arbitrarily large value. Due to the fact that the variation coefficients of arrival and service intervals play an important role in estimating the delay of queue claims in queuing systems, thus this distribution concept plays a special role in modeling of QS. For a hyperexponential distribution of the second order, the authors previously obtained numerical-analytical results based on the Lindley integral equation spectral solution method. The article describes a developed algorythm and a program on GPSS WORLD to simulate the functioning of QS with hyperexponential input distribution incl. description of operation of logical switches. The difference between analytical and simulation modeling of the two-phase representation of a given distribution concept is explained on the example of the developed model. The adequacy of the obtained results was confirmed by comparing the simulation results with the results of numerical simulation in the Mathcad environment.

Hidden dynamics of memristor-coupled neurons with multi-stability and multi-transient hyperchaotic behavior

The coupling of memristors has been extensively studied in continuous neural models. However, little attention has been given to this aspect in discrete neural models. This paper introduces a Discrete Memristor-Coupled Rulkov Neuron (DMCRN) map, utilizing discrete memristors to estimate synaptic functionality. The proposed model is subjected to theoretical analysis, revealing hidden behaviors within the map. Through numerical methods, the rich and complex dynamical behaviors of the DMCRN map are studied, including hyperchaos, hidden attractors, multi-stability and multi-transient, as well as the firing patterns. Additionally, a simple pseudo-random sequence generator (PRNG) is designed based on the generated hyperchaotic sequences, providing a reference for further applications of DMCRN map. In addition, a digital experiment is implemented on a DSP platform, realizing the DMCRN map and obtaining hyperchaos. Both experimental and numerical results demonstrate that the coupling of discrete memristors allows for the estimation of synaptic connections in neurons, resulting in a more complex and interesting discrete neuron model.

A Class of Discrete Memristor Chaotic Maps Based on the Internal Perturbation

Further exploration into the influence of a memristor on the behavior of chaotic systems deserves attention. When constructing memristor chaotic systems, it is commonly believed that increasing the number of memristors will lead to better system performance. This paper proposes a class of chaotic maps with different discrete memristors, achieved through internal perturbation based on the Sine map. The I-V curve of the discrete memristor has a symmetrical structure. The dynamic characteristics of the designed system are analyzed using the chaotic attractor phase diagram, Lyapunov exponent (LE) spectrum, and bifurcation diagram. Numerical simulations demonstrate that internal perturbations of discrete memristors enhance the Sine map’s chaotic characteristics, expand the chaos range, and improve the ergodicity and LE value. Moreover, the type of discrete memristors has a significant impact on the dynamic characteristics of the system, while the number of discrete memristors has little influence. Therefore, in this paper, a direction for the design of a discrete memristor chaotic system is provided. Finally, a discrete memristor chaotic map with a simple structure and better performance is selected. Based on this, a pseudo-random sequence generator is designed, and the generated sequence passes the National Institute of Standards and Technology (NIST) test.

A novel lorenz-sine coupling chaotic system and its application on color image encryption

The chaos-based image encryption has been extensively studied for image security owing to its high efficiency. However, both the complexity of the chaotic system and the chaos-based image encryption method must be enhanced. A Lorenz-Sine coupling chaotic system with complex behavior and a novel image encryption scheme is presented in this work. By adding a nonlinear controller containing sinusoidal function to the Lorenz system, we obtain smooth chaotic attractors with a unique appearance. Analysis of the dynamical properties shows that it has a multi-symmetry stranger attractor and a large chaotic range. Based on the proposed chaotic system, a pseudorandom sequence generator is designed to generate keys with high randomness. Furthermore, an image encryption scheme using spiral-rotation and random permutation is presented. Cipher-feedback is employed to increase the avalanche effect. The encryption efficiency and the security analysis are simulated. The result shows that the correlation coefficient between the adjacent pixels of the proposed scheme achieves The NPCR of the proposed scheme is larger than 0.9661 and the UACI falls within the theoretical value of UACI with a significance level of 0.05. Thus, the proposed scheme is more capable against differential attacks. Furthermore, it is more robust against noise attacks and cropping attacks.

Demonstration and Comparison of On-Chip High-Frequency Test Methods for RSFQ Circuits

On-chip high-frequency test for Rapid Single Flux Quantum (RSFQ) circuits without external high-frequency equipment is very attractive and promising. The test method based on Shift Register (SR) is widely used for long time. Recently, we have proposed two test methods based on Pseudo Random Binary Sequence (PRBS) generator. In this paper, a Full Adder (FA) is taken as an example of circuit under test and the design methodology of the above approaches is presented. For FA with the traditional and two proposed approaches, the high-frequency test circuits are fabricated and tested. We demonstrate the successful measurement of the three circuits with the maximum operating frequency of the full adder at 23.3 GHz, 26.2 GHz and 27.4 GHz respectively. Based on the experimental results, the clock frequency measurement in the proposed two PRBS based test systems is more accurate and time-saving, which is advantageous for high-frequency RSFQ circuits measurement.

60-GHz Single Flux Quantum Pulse Transfer Circuit for Serial Biasing

Serial Biasing (SB) is a technique to reduce the total DC bias current of Rapid Single Flux Quantum (RSFQ) circuits by partitioning a design into several islands with isolated grounds and sequential biasing. In this paper we focus on the design of a driver-receiver pair (DRP) to transfer pulses between islands that are galvanically isolated for pulse streams. We discuss both DRP itself and the structure for its testing, that comprises several DRPs connected in series, on-chip pseudo random binary sequence (PRBS) generator for circuit stimulation, and HF output interface. We use the layout of DRPs’ chain as an example to illustrate the advantage of the grapevine (GV) approach, introduced earlier, to manage the bias current flowing into and out of an island. The GV current management technique is analyzed by both electromagnetic simulations and measurement, compared, and contrasted with the so-called ‘straightforward’ (SF) approach. The maximum operational frequency for SF test structure was 10 GHz with zero margins for the SB current. Measurements of the GV structure at 10 GHz demonstrated BER of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−12</sup> with ±5.8% margins for SB current. We observed the correct operation of the 5-island DRP chain up to 60 GHz using the grapevine approach for SB current management. All chips were fabricated at MIT Lincoln Laboratory using SFQ5ee fab node.

Power Optimization of 50 GHz ERSFQ Circuits

The Energy-efficient Rapid Single Flux Quantum (ERSFQ) logic family offers zero-static power dissipation. Any ERSFQ circuit requires a feeding Josephson transmission line (FJTL), a relatively large active transmission line, which serves as an accurate voltage source. For proper operation, the FJTL needs to be continuously pumped at a frequency that is equal to or higher than the highest clock frequency of the ERSFQ circuit. We selected an on-chip pseudo-random binary sequence (PRBS) generator as the example circuit since it naturally facilitates quantitative measurements of operating bias margins in terms of bit error rate (BER). Using external and internal flux pump sources, we performed extensive experimental studies on BER for ERSFQ PRBS generators operating at clock frequencies up to 50 GHz. We paid special attention to the over-pumping regime, where the FJTL pump frequency is higher than the PRBS clock frequency and confirmed its superiority in improving BER. At 35.56 GHz clock frequency, a group of 4 PRBS generators and 4 individual FJTLs with the bias current ratio (BCR) equal to 1, had a BER lower than 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup> and bias margins of ±25% for internal and external flux pump sources over-pumping at 6.25% above clock frequency. The maximal operational clock frequency of a single ERSFQ PRBS generator with intrinsic pump source (+6.25% over-pumping) and BER <10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup> was 49.53 GHz. We also focused on optimization of the FJTL's size to reduce the power consumption and the area occupied by the FJTL itself. All chips were fabricated at MIT-Lincoln Laboratory using the SFQ5ee fab node. Future steps required for better understanding of ERSFQ operation are discussed.

Analysis of Distinguishable Security between the One-Time Password Extraction Function Family and Random Function Family

A one-time password is a security system that uses a password that is only used once for authentication, and it is commonly used in multi-factor authentication systems. The process of generating an OTP is very similar to generating pseudorandom sequences in cryptography. However, since only a part of the bit string is used in OTP, an algorithm is needed to extract that part. In addition, the OTP process also includes converting the value of the bit string value into decimal form for human perception. This paper focuses on analyzing the extraction function, which is the step before the hexadecimal is reprocessed into the decimal form. We analyze a function family, which includes functions used in the process of extracting a bit string in terms of distinguishable security. As a result, we conclude that the OTP extraction function family is vulnerable in terms of distinguishable security compared to the random function family.

Analysis of pseudorandom number generation processes in EP CRYSTALS-Dilithium

The paper provides an analysis of pseudorandom number generation processes in the Crystals-Dilithium post-quantum electronic signature scheme, a finalist in the NIST PQC post-quantum cryptography competition. The main focus is on the pseudo-random number generator based on the AES block cipher in counter mode. A formal model was built for this pseudo-random number generator that meets the requirements of the latest version of the AIS 31 standard, containing requirements for secure pseudorandom number generators. A pseudo-random number generator based on the AES block cipher in counter mode is shown to satisfy the requirements of functional class DRG.3, provided that the initial value for the generator is obtained from a truly random number source (either a physically truly random or a non-physical truly random source) or another generator of pseudo-random numbers having a security class not lower than the DRG class.3. In addition, the use of shake128/256 for the generation of pseudorandom sequences in Crystals-Dilithium will be analyzed. Based on the results of the analysis, recommendations are given regarding the compilation parameters depending on the conditions of use. Namely, it is concluded that an AES-based generator is more vulnerable to side-channel attacks, from which it follows that it is not recommended to use the DILITHIUM_USE_AES flag unless there are additional guarantees to protect the machine from side-channel attacks. If the operating system's cryptographic API is trusted, it is recommended to use the DILITHIUM_RANDOMIZED_SIGNING compilation flag. In systems with low trust in the cryptographic API of the operating system, it is possible to use a variant with deterministic signature generation.

Random Color Image Encryption Using the Genetic Algorithm

This paper implements a combined pseudo-random sequence generator based on neural networks and chaotic, random variable color images based on an algorithm for chaotic encryption, secure image storage, and transmission. The generator that controls the operation of the encryption algorithm: the arrangement of pixel positions, the use of random color images of the AES algorithm to achieve encryption, creation algorithms, and neural networks by dynamically updating control parameters and numbers to increase the generated chaotic sequence randomness by using simulation MATLAB for getting output. The chaotic function's iteration of the neural networks. The experimental results are presented in the form of a pixel correlation coefficient and security analysis to prove the security and effectiveness of the proposed chaos-based ANN encryption.