Processor Temperature Research Articles

Thermal design of a frequency hopping processor

Abstract To solve the difficult problems in the thermal design of a new frequency-hopping processor, such as high heat consumption, concentrated local heat flux of the device, and large thermal resistance, a thermal design scheme was proposed to optimize the structure design and enhance the thermal conductivity of PCB board. At the same time, a combined scheme of copper water heat pipe-thermal expansion plate was used. Flotherm was used for thermal simulation and a thermal balance experiment under vacuum conditions was designed. Then the temperature of the frequency-hopping processor was measured experimentally to further verify the rationality of the design scheme. The combined scheme of copper water heat pipe-thermal expansion plate will guide the thermal design of this type of frequency hopping processor.

The thermal and hydrodynamic analysis in a heat sink with different configurations of shark scales-based fins

The development of efficient thermal management techniques in cooling systems will lead to achieving a higher power capacity for electronic devices. Extended surfaces such as fins and riblets effectively improve the heat transfer rate in heat sinks, but they can cause increasing the friction factor. In this numerical study, a novel configuration of fins is introduced according to the shark scales’ geometry to provide a trade-off between heat transfer rate and friction losses compared to simple fins in a microchannel cooling system. Also, the cooling effect of concentrations of graphene oxide (GO)+ silver (Ag)/water (H2O) and molybdenum disulfide (MoS2) + cobalt oxide Co3O4/water (H2O) nanofluids (1, 3, and 5 wt%) are investigated for the Reynolds number ranging from 130 to 525. The geometrical parameters and different materials such as copper, nickel, and silver are evaluated by ANSYS-FLUENT under steady-state conditions. The comparison of outlet temperature, pressure drop, and temperature difference by experimental results verifies the accuracy of the numerical model. The results indicate that increasing arc width from 1 mm to 1.5 mm reduces the maximum CPU (central processing unit) temperature by 5 K while the temperature uniformity index decreased by 9.96 % at 0.3 m/s of inlet flow rate. The novel configuration of fins results in a performance evaluation criterion (PEC) greater than 1 for GO+Ag/water nanofluids in all cases compared to simple circular fins.

Hydrothermal characteristics and irreversibility behavior of microchannel heat sink operated with hybrid nanofluids: A critical assessment

Recently, hybrid nanofluids have been outlined to enhance the cooling performance of microchannel heat sinks (MCHSs) and increase the heat dissipation rate in electronic devices. However, comparative assessments of hybrid nanofluids (HNFs) and water as coolants for MCHSs in terms of their hydrothermal performance and irreversibility characteristics are scarce. The present study aims to numerically assess the hydrothermal performance and entropy generation characteristics of various hybrid nanofluids in an MCHS for cooling a central processing unit (CPU). COMSOL Multiphysics software is used to solve the governing equations of a three-dimensional conjugate heat transfer model using the finite element method. The reduced graphene oxide decorated with cobalt oxide nanocomposite (rGO–Co3O4) and Fe3O4-coated MWCNT (MWCNT–Fe3O4) HNFs with temperature-dependent thermophysical properties and wide range of concentrations (0% ≤ φ ≤ 0.2%) are considered. The simulations are performed under constant Reynolds number (300 ≤ Re ≤ 1500) and constant flow rate (5.42 cm3/s ≤ Q ≤ 27.12 cm3/s) conditions. The results show that increasing the values of φ at a fixed Re significantly enhances the heat transfer coefficient; reduces the CPU temperature, thermal resistance, and total entropy generation; and improves temperature uniformity. However, the pressure drop and pumping power increase significantly. No significant enhancement is achieved when the HNFs are used instead of water at a constant flow rate, and a noticeable pumping power is obtained under all studied conditions. In conclusion, MWCNT–Fe3O4 HNF exhibited better combined thermohydraulic performance than the rGO–Co3O4 HNF.

Water Quality Monitoring Data Transmission Network Design

With the continuous advancement of electronic technology and the introduction of new concepts, people's demands on life are increasing and the concept of intelligent automation is gaining popularity. With the continuous consumption of the source of life, people's concern about fresh water resources is also increasing. With the theme of intelligent detection, a water quality online monitoring system that integrates detection and monitoring is designed. The system can monitor temperature, humidity, water level and turbidity in real time, and can transmit monitoring values through wireless module. Users can use mobile applications to view the data detected at this time, which is very convenient. The system hardware design includes STM32 system processor circuit, temperature and humidity sensor module, water level monitoring module, WIFI module, and turbidity monitoring module design.

Thermal-Aware Task Scheduling and Resource Allocation for UAV-and-Basestation Hybrid-Enabled MEC Networks

Unmanned aerial vehicle (UAV)-enabled mobile edge computing (MEC) has recently emerged to provide services in the resource-shortage areas, e.g., rural and disaster rescue fields. However, to provide satisfactory services, especially for computation-intensive and time-sensitive tasks, UAVs are required to operate at their full capacity due to their limited computation resources. This may lead to excessive heat dissipation and damage computing units. To tackle this dilemma, this paper takes central processing unit (CPU) thermal constraints during UAV operating hours into consideration. To further relieve the burden on the UAV, we explore a hybrid MEC system with a base station and a hover-fly-hover UAV that is able to compute during flight. We aim to minimize the cruise duration of the UAV by jointly optimizing user admission policy, task scheduling, UAV hovering trajectory, traveling time, and computation-and-communication resource allocations. The formulated problem is complicated and we further divide it into four sub-problems which are alternating to be solved in sequence. Simulation results demonstrate that the proposed algorithm can achieve better performance than other baseline algorithms, and keep CPU temperature under control.

Performance optimization of a dual-thermoelectric-liquid hybrid system for central processing unit cooling

Thermoelectric cooling can quickly and efficiently remove heat from a central processing unit (CPU) to prevent its failure. However, simultaneous optimization of the cooling capacity and efficiency in the CPU cooling system remains a challenge. Here, a dual-thermoelectric-liquid hybrid system for the CPU cooling is designed to overcome this challenge. This work first analyzes the key performance indicators of CPU cooling and experimentally demonstrates the necessity of hybridizing the external thermoelectric cooling units with the employed thermoelectric-liquid cooling system. Influences of the inlet temperature and the volume flow rate were correspondingly studied and optimized step by step. Finally, an average coefficient of performance of 0.039 and a low CPU temperature of 42 °C are simultaneously approached within the working time ranging from 0 to 1800 s by stepwise optimizing the inlet temperature to 27 °C and the volume flow rate to 30 L h−1. This study demonstrates that the dual-thermoelectric-liquid hybrid system can realize an effective CPU cooling with a high coefficient of performance.

Analyzing the pressure and thermal efficiency of chemically synthesized nanofluids for computer cooling methods

To maintain ideal working conditions by removing heat, a particular technique must be applied. This research examines how nanofluids affect computer cooling microchannel heating devices. The experiment's working fluids are 25% Therminol-55 and 75% sprinkling water. The mixture contains silicon carbide (SiC), titanium oxide (TiO2), and zinc oxide (ZnO) nanoparticles. It includes 0.25% to 1.5% nanoparticles and flows at 0.025 to 0.080 kg/s at 25°C to 40°C. Central processing unit temperature, heat transfer rate, pressure losses, and pumping power have been examined. SiC-THERMINOL/SPRINKLING WATER at 1.5% concentration and 0.080 kg/s had a 9% lower temperature and 31% larger heat transfer coefficient than the base fluid. SiC-TL/SW has the highest pressure decrease and pumping force power compared to TiO2-TL/SW. Because nanofluid beats basic fluid in computer cooling, a little increase in pumping force power and pressure reduction may be tolerated.

A CFD modeling of heat transfer between CGNPs/H2O Eco-friendly nanofluid and the novel nature-based designs heat sink: Hybrid passive techniques for CPU cooling

A Control Volume-based numerical study of laminar flow and heat transfer of a single-phase Covalently functionalized Graphene Nanoplatelets (CGNPs)/H2O green nanofluid in a liquid block heat sink with novel fin design and nature-based algorithms (honeycomb, ternate veiny, snowflake, and spider netted) baseplate’s designs conducted for cooling of Central Processing Unit (CPU) in the electronic package. The User Defined Function (UDF) code was used to apply the temperature-dependent thermos-physical properties of CGNPs/H2O green nanofluid to the ANSYS-Fluent 2021 R2. The influence of Reynolds number variation, nanoparticles volume fraction, and the baseplate’s designs on the CPU temperature, pumping power, Heat Transfer Coefficient (HTC), and thermal efficiency of the heat sink have been analyzed. The spider netted baseplate design reduced the maximum temperature of the liquid block by about 8.5K in comparison with the Ternate veiny baseplate design. The heat transfer coefficient has a direct relationship with nanofluid concentration and Reynolds number and the best case in terms of HTC improvement is related to (CGNPs 0.100%wt/H2O,Re=2000) with HTC about 8582.3 W.m-2K-1. Moreover, the most thermal output improvement in comparison with the simple model liquid block heat sink is about 8.5% which is related to the liquid block with spider netted baseplate design and CGNPs 0.075%wt/H2O green nanofluid flow.

Machine learning guided thermal management of Open Computing Language applications on CPU‐GPU based embedded platforms

As embedded devices start supporting heterogeneous processing cores (Central Processing Unit [CPU]–Graphical Processing Unit [GPU] based cores), performance aware task allocation becomes a major issue. Use of Open Computing Language (OpenCL) applications on both CPU and GPU cores improves performance and resolves the problem. However, it has an adverse effect on the overall power consumption and the operating temperature of the system. Operating both kind of cores within a small form factor at high frequency causes rise in power consumption which in turn leads to increase in processor temperature. The elevated temperature brings about major thermal issues. In this paper, we present our investigation on the role of CPU during execution of GPU specific application and argue against running it at the high frequency. In addition, a machine learning guided mechanism to predict the optimal operating frequency of CPU cores during execution of OpenCL GPU kernels is presented in this study. Our experiments with OpenCL applications on the state of the art ODROID XU4 embedded platform show that the CPU cores of the experimental board if operated at a frequency proposed by our Machine Learning-based predictive method brings about 12.5°C reduction in processor temperature at 1.06% degradation in performance compared to the baseline frequency (default performance frequency governor of the embedded platform).

Design parameter optimization of a CPU heat sink using numerical simulation for steady-state thermal analysis and CFD-modeling

This paper deals with the design of a CPU cooling system using a novel numerical modelling approach based on automatic calculation in a commercial software. A research object is an aluminium CPU heat sink with a thermal design power of 50 W with a new fin design. A numerical model of the cooling process has been developed, and the heat sink efficiency has been investigated. The main goal of optimization was to get the minimum temperature of the CPU processor at the minimum mass of the heat sink. The comparative analysis of the results that obtained via three methods (screening, adaptive multiple-objective, multi-objective genetic algorithm) was performed. This analysis showed that screening was the least time-consuming method, but it did not provide the required solution. Adaptive multiple-objective and multi-objective genetic algorithm solutions show similar results but significantly differ in time. It was established that the adaptive multiple-objective method is the best method for the heat sink optimization task. At the determined optimal design parameter, the CPU temperature is in the range 304–307 K, while the mass was 81–87 g. In comparison, the heat sink mass before optimization of the design parameters was 93 g at the CPU temperature of 309–311 K.

Minimizing the Maximum Processor Temperature by Temperature-Aware Scheduling of Real-Time Tasks

Thermal management is gaining importance since it is a promising method for increasing the reliability and lifespan of mobile devices. Although the temperature can be decreased by reducing processor speed, one must take care not to increase the processing times too much; violations of deadline constraints must be prevented. This article focuses on the tradeoff between performance and device temperature. We first analyze this tradeoff and show how to determine the optimal lower bound for the maximum temperature for a given set of jobs with known workloads and deadlines. To do so, we use a thermal model, which describes how future decisions impact temperature dynamics. Then, we introduce a processor scheduling algorithm that computes the resource allocation that achieves this lower bound. Consequently, our algorithm finds the optimal resource allocation for the purpose of minimizing the maximum processor temperature for a set of jobs with known workloads and deadlines. Our experimental validation shows that our thermal management algorithm can achieve a reduction of up to 15°C (42%) of the maximum temperature when the workload is high, where a previously proposed method achieved a reduction of up to 10°C (25%). Another advantage of our method is that it decreases the variance in the temperature profile by 16% compared to previously proposed methods.

A Scalable High-Current High-Accuracy Dual-Loop Four-Phase Switching LDO for Microprocessors

High-performance microprocessors need high current (ampere-level), high accuracy, and fast-response power supplies. Comparing to analog and digital low-dropout (LDO) regulators, the switching LDO can be a better candidate for such requirements, as it can drive large power transistor(s) fast and accurately. However, conventional switching LDOs need large load capacitance to reduce the output ripple, which restricts their applications. This article presents a 1.5-A fully-integrated switching LDO for microprocessors, with an easily scalable load capability. Here, we introduce three techniques together to relief the output capacitance requirement: 1) four-phase 500-MHz pulsewidth modulation (PWM) with inherent current balancing; 2) current-limited power cells resisting processor voltage and temperature (PVT) variations; and 3) hybrid fast-slow power transistors. Therefore, we reduce significantly the load capacitance to maximum load current ratio <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$C_{\mathrm {L}} / I_{\mathrm {MAX}}$ </tex-math></inline-formula> when compared with the prior switching LDOs. Also, the proposed dual-loop architecture not only achieves a fast transient response, but also provides high-accuracy regulation. In addition, we design the tunable active voltage positioning (AVP). Fabricated in 28-nm CMOS, the proposed switching LDO measures a maximum 70-mV undershoot with a 1-A load current step with 10-ns edge time. The measured load regulation is 1 mV/A and the line regulation is 1.5 mV/V. Also, we obtain a good power supply rejection (PSR) of −63 dB at 10 kHz and −20 dB at 1 MHz. The PWM automatically moves to a pulse-skipping mode at light load, reducing the quiescent current to 1.8 mA, while the peak current efficiency is 99.27%.

Multifunctional Superelastic Graphene-Based Thermoelectric Sponges for Wearable and Thermal Management Devices.

Power generation through harvesting human thermal energy provides an ideal strategy for self-powered wearable design. However, existing thermoelectric fibers, films, and blocks have small power generation capacity and poor flexibility, which hinders the development of self-powered wearable electronics. Here, we report a multifunctional superelastic graphene-based thermoelectric (TE) sponge for wearable electronics and thermal management. The sponge has a high Seebeck coefficient of 49.2 μV/K and a large compressive strain of 98%. After 10 000 cyclic compressions at 30% strain, the sponge shows excellent mechanical and TE stability. A wearable sponge array TE device was designed to drive medical equipment for monitoring physiological signals by harvesting human thermal energy. Furthermore, a 4 × 4 array TE device placed on the surface of a normal working Central Processing Unit (CPU) can generate a stable voltage and reduce the CPU temperature by 8 K, providing a feasible strategy for simultaneous power generation and thermal management.

COCKTAIL: Multicore Co-Optimization Framework With Proactive Reliability Management

High performance computing (HPC) servers aim to meet an increase in the number and complexity of tasks and, consequently, to address the energy efficiency challenge. In addition to energy efficiency, it is essential to manage lifetime limitations of power-hungry components of servers (e.g., cores and cache), hence avoiding server failure before its lifetime period. Traditional approaches focus on either using hybrid caches to reduce the leakage power of traditional static random-access memory (SRAM) cache, and thus increase the energy efficiency, or the trade-off between the lifetime and performance of multi-core processors. However, these approaches fall short in terms of flexibility and applicability for HPC tasks in terms of multi-parametric optimization including quality-of-service (QoS), lifetime reliability, and energy efficiency. As a result, in this paper we propose COCKTAIL, a holistic strategy framework to jointly optimize the energy efficiency of multi-core server processors and tasks performance in the HPC context, while guaranteeing the lifetime reliability. First, we analyze the best cache technology among traditional SRAM and resistive random access memory (RRAM), within the context of hybrid cache architectures, to improve the energy efficiency and manage cache endurance limits with respect to tasks requirements. Second, we introduce a novel efficient proactive queue optimization policy to reorder HPC tasks for execution considering their end time and possible reliability effects on the use of the hybrid caches. Third, we present a dynamic model predictive control (MPC)-based reliability management method to maximize task performance, by controlling the frequency, temperature, and target lifetime of the server processor. Our results demonstrate that, while consuming similar energy, COCKTAIL provides up to 60% QoS improvement when compared to latest state-of-the-art energy optimization and reliability management techniques in the HPC context. Moreover, our strategy guarantees a design lifetime longer than 5 years for the whole HPC system.

Simulation of the thermal control system of nanosatellite using the loop heat pipes under the orbital flight conditions

One of the key problems in the development of nanosatellites is to provide a given temperature range for the operation of the on-board computer. The constantly increasing information load leads to the need to use more advanced processors with high thermal design power (TDP). The indicated thermal regime of processors can be achieved using remote heat removal systems - miniature loop heat pipes. Using a model of nanosatellite as an example, a thermal control system with miniature loop heat pipes is designed. The simulation was carried out in the Siemens NX program in the elliptical and geostationary orbits of the Earth. The cooling schemes of the processor with a thermal power of 15 W using one and two loop heat pipes are considered. Calculations showed that the use of loop heat pipes can reduce the processor temperature to acceptable values. The anisotropy of the thermal conductivity coefficient in the reinforcement plane of the composite material of the nanosatellite case can have a significant effect on the temperature of the processor. This opens up prospects for the use of anisotropic composite materials to ensure the thermal regime of the nanosatellite.

An Analytical-Computational Model for Predicting the Temperature of a Computer Central Processing Unit Cooler

This study presents a simple method for predicting the temperature of the base-plate of a central processing unit (CPU) cooler. These coolers are used in desktop computers to keep the CPU at an optimum operating temperature. The technique discussed here combines a computational approach with an analytical solution. The cooler has a base-plate, four heat pipes, and many plate-fins that transfer the CPU heat to the surrounding air. The computational model selects a fin and adjacent airflow and obtains a correlation for the conjugate Nusselt number. The model’s analytical part depends on this correlation, and it predicts the base-plate and heat pipes’ temperatures. The parameters that affect the temperature are the flow Reynolds number, CPU power, and the heat pipes’ effective thermal conductivity. The ranges of parameters in this study are Reynolds number 100–1000, CPU power 50–400 W, and thermal conductivity ratio 1–100. While Reynolds number and thermal conductivity ratio decrease the cooler temperature, the CPU power increases the temperature. The heat pipes’ dimensionless temperature depends on Reynolds number and thermal conductivity ratio, but not on the CPU power. The CPU cooler’s thermal resistance is a function of Reynolds number and thermal conductivity and provides a convenient way to estimate the CPU temperature.

Design and Simulation of Ethylene Cooled Microchannel Heat Exchanger for Micro Processors

In this study, a microchannel heat exchanger with operating with ethylene was proposed instead of air-cooled microprocessor heat sinks and flow and heat transfer simulations were made using Flo-EFD software. First, the temperature distribution of the air domain and the microprocessor in the computer case was obtained for air-cooled heat sink, and then the flow paths of the air coming from the outside with the help of the fan were observed. Afterwards, the system with the proposed micro channel heat exchanger was subjected to the same processes and the results were compared. As a result of the study, it was revealed that the micro channel heat exchanger reduced the processor temperature between 54-55°C and 18-19°C. It has also been observed that removing the heat sink allows the air drawn from the outside environment to circulate more efficiently around other heat generating elements in the computer case. Hence more homogeneous and lower temperature distribution within the computer case was obtained.

Temperature Difference Sensor to Monitor the Temperature Difference in Processor Active Heat Sink Based on Thermopile

The monitoring of processor temperature is crucial to increase its efficiency. One of the novel approaches is use the information not only about the CPU (Central Processing Unit) thermal state, but also about changing environmental conditions. The additional temperature difference sensor to monitor thermal changes in the processor environment is necessary. The sensor dedicated for active heat sink, often used inside laptops, was designed, fabricated and investigated. To fulfill the requirements and to match to the specific shape of the active heat sink, the hybrid sensor was proposed. It was composed of six thermocouples and fabricated using thick-film and LTCC (Low Temperature Cofired Ceramic) technology combined with wire thermocouples. Thick-film/LTCC flat substrates with thermoelectric paths ensured good thermal contact between the sensor and the monitored surface. The thermoelectric wires allowed adjusting the sensor to the complicated shape of the active heatsink. Three different versions of the sensor were realized and compared. All of them seem to be suitable for measuring the temperature difference in the given application and they can be used in further works.

Performance Analysis of Different Embedded Systems and Open-Source Optimization Packages Towards an Impulsive MPC Artificial Pancreas.

Current technological advances have brought closer to reality the project of a safe, portable, and efficient artificial pancreas for people with type 1 diabetes (T1D). Among the developed control strategies for T1D, model predictive control (MPC) has been emphasized in literature as a promising control for glucose regulation. However, these control strategies are commonly designed in a computer environment, regardless of the limitations of a portable device. In this paper, the performances of six embedded platforms and three open-source optimization solver algorithms are assessed for T1D treatment. Their advantages and limitations are clarified using four MPC formulations of increasing complexity and a hardware-in-the-loop methodology to evaluate glucose control in virtual adult subjects. The performance comparison includes the execution time, the difference concerning the evolution obtained in MATLAB, the processor temperature, energy consumption, time percentage in normoglycemia, and the number of hypo- and hyperglycemic events. Results show that Quadprog is the package that faithfully follows the results obtained with control strategies designed and tuned on a computer with the MATLAB software. In addition, the Raspberry Pi 3 and the Tinker Board S embedded systems present the appropriate characteristics to be implemented as portable devices in the artificial pancreas application according to the criteria set out in this work.

Electrothermal coupling analysis of three-dimensional integrated microsystem based on dual cell method

With the improvement of the integration and power density of three-dimensional integrated microsystem, it is imperative to simultaneously investigate the multi-field coupling analysis of electrical design and thermal management. This paper is to investigate a three-dimensional integrated microprocessor system and realize the rapid electrothermal analysis of the system through an improved dual cell method (DCM). This method decomposes the constitutive matrix into a constant matrix and a temperature-dependent matrix by introducing the coupling of leakage power and material coefficients with temperature. In the calculation, only the temperature-dependent matrix needs to be updated and assembled, which makes the calculation speed faster than the traditional finite element method. The simulation results show that the speed of the proposed algorithm is improved by about 30% compared with that of the traditional finite element method. After considering the thermal coupling factors of material coefficient and leakage power, the hot spot temperature of the system increases by 20.8 K compared with before coupling. Finally, the algorithm proposed in this paper is used to study the layout of three-dimensional integrated microprocessor system. The influence of TSV array conventional layout and centralized layout under the processor core(core-layout) on the hot spot temperature of upper and lower chips are compared, and the influences of uneven power distribution on the two layouts are studied. The results show that compared with the conventional layout of TSV array, the core-layout can reduce the hot spot temperature of processor, but it will aggravate the hot spot problem of DRAM at the same time. And when the power is not evenly distributed on the four cores, the hot spot of DRAM under the core-layout will be more seriously affected. In conclusion, the algorithm model proposed in this paper can quickly analyze the electrothermal coupling problem of 3D integrated microsystem, realize the hot spot prediction of the system, and provide theoretical guidance for designing the chip layout of 3D integrated microsystem.