Processing Hardware Research Articles

ERGONOMICS AS A FACTOR IN ENSURING SAFETY DURING THE OPERATION OF CONSTRUCTION MACHINES ON THE EXAMPLE OF EXCAVATORS

Problem statement. To improve the safe working conditions of excavator operators, it is important to effectively manage ergonomic quality indicators, increase the reliability of excavators, and improve the sanitary and hygienic conditions and comfort of operators. The set of ergonomic indicators of the operator–excavator system, including controllability, occupancy, serviceability, masterability and manufacturability, defines the concept of ergonomics (a criterion category of quality management that is also considered as an object of management). Changes in construction affect the efficiency of the operator-excavator system, taking into account specific production and technical, natural and climatic, and socio-economic conditions. The re-equipment of construction sites with new generation excavators equipped with modern control, computer information and diagnostic systems, hardware and software for data transmission, processing and analysis not only improves the efficiency of construction work but also changes the safe nature of human-machine interaction. The purpose of the article. Ensuring safety during the operation of construction machines (excavators), taking into account ergonomics criteria, which is an urgent scientific task, the solution of which will improve working conditions and increase the efficiency of excavators. Conclusion. The conducted research has shown that the ergonomic component “man – machine – environment” on the example of improving excavators allows to increase the safety of machines and improve the working conditions of construction machine operators. The use of the mathematical apparatus of fuzzy set theory to evaluate and manage the ergonomics of excavators is due to the nature and specificity of the functioning of the elements of the “operator–excavator” system. Information about the system elements can be represented by subjective opinions or judgements, inaccurate data or errors in measurements and parameter calculations. Therefore, it is necessary to use mathematical tools that take into account quantitative and qualitative information presented in linguistic form.

Image Processing Hardware Acceleration—A Review of Operations Involved and Current Hardware Approaches

Image Processing Hardware Acceleration—A Review of Operations Involved and Current Hardware Approaches

Novel chaotic image cryptosystem based on dynamic RNA and DNA computing

In view of the security problems of image encryption algorithms encoded by single DNA or RNA, to increase the randomness of the diffusion process and the uncertainty of the coding rules, we propose a combining dynamic RNA and DNA computing based chaotic image encryption algorithm, which has a more complicated encryption process for improving the security of the encryption algorithm and increases the difficulty of decoding. First, a new three-dimensional hyperchaotic map is proposed, which exhibits a rich set of dynamic behaviors. Second, the sequences generated by the proposed map are passed to NIST test with good randomness and implemented by digital signal processing hardware, which shows the feasibility of the proposed chaotic map for industrial applications. Second, the K-means algorithm is used to split the plaintext into two parts. Third, the chaotic sequence is used to displace and diffuse the two parts of the plaintext, respectively. Then, chaotic sequences were used to encode using dynamic DNA and RNA of these two parts, respectively. Then, the chaotic sequences were used to compute the dynamic DNA and RNA computing of these two parts, respectively. Finally, the cipher text is decoded accordingly. The experimental results show that compared with some related encryption algorithms, our method has higher security.

Introduction to Cloud Gaming

Cloud Gaming can be defined as a technology that enables gamers to play video games using cloud-based servers and infrastructure, rather than relying on local hardware for processing and rendering game graphics. In cloud gaming, the games are streamed to the player's device with the help of the internet, allowing them to play high-quality games without needing to own a high-end gaming console or PC. The solution helps people to play games on their computers regardless of their own system as their gaming needs are met with the help of good enough customer service in the cloud. It also helps to overcome the problems of traditional games such as conflict and mobility. In this article, we will take a look at various aspects of Cloud Gaming System (CGS) to explain the many advantages and capabilities this concept has.

Multi-Objective Design and Optimization of Hardware-Friendly Grid-Based Sparse MIMO Arrays.

A comprehensive design framework is proposed for optimizing sparse MIMO (multiple-input, multiple-output) arrays to enhance multi-target detection. The framework emphasizes efficient utilization of antenna resources, including strategies for minimizing inter-element mutual coupling and exploring alternative grid-based sparse array (GBSA) configurations by efficiently separating interacting elements. Alternative strategies are explored to enhance angular beamforming metrics, including beamwidth (BW), peak-to-sidelobe ratio (PSLR), and grating lobe limited field of view. Additionally, a set of performance metrics is introduced to evaluate virtual aperture effectiveness and beamwidth loss factors. The framework explores optimization strategies for the partial sharing of antenna elements, specifically tailored for multi-mode radar applications, utilizing the desirability function to enhance performance across various operational modes. A novel machine learning initialization approach is introduced for rapid convergence. Key observations include the potential for peak-to-sidelobe ratio (PSLR) reduction in dense arrays and insights into GBSA feasibility and performance compared to uniform arrays. The study validates the efficacy of the proposed framework through simulated and measured results. The study emphasizes the importance of effective sparse array processing in multi-target scenarios and highlights the advantages of the proposed design framework. The proposed design framework for grid-spaced sparse arrays stands out for its superior efficiency and applicability in processing hardware compared to both uniform and non-uniform arrays.

A novel technique to resolve directional ambiguity for Particle Streak Velocimetry

In this study, a novel streak direction-resolving algorithm is introduced to determine the direction of the flow field for a single image frame with multiple streaks. The streak direction was resolved by varying its intensity from 100 % to 50 % of the total intensity of the streak image. This technique was applied to two main types of flows parallel and Hill's vortex flows, parallel flows were divided into further two types constant velocity parallel flow and accelerating parallel flow. The purpose of using different types of flows was to test the robustness of the algorithm with easy and complex flows. The performance of the algorithm was checked by the angular deviation between the true and least-square fitted velocity vectors. The number of correct synthetic streak directions was measured with the success rate in percentage. A high success rate means low angular deviation and a high number of velocity vectors with correct direction was obtained. In this research, four different types of image formats were considered DP (double precision), 16-bit (without noise), 16-bit (1.0 % noise), 16-bit (5.0 % noise), and 8-bit (without noise) and the best results were obtained for DP and 16-bit image formats. The results of the parallel flows indicated a 100 % streak direction success rate, Hill's vortex was a type of complex flow therefore, the algorithm hard to resolve some streak directions due to very low velocities (less than 0.1 px (pixel)/interval) and very high-velocity gradients (greater than 52 px/interval). The observation shows that Hill's vortex synthetic streak images were resolved with a success rate of 92.76 % which means that the majority of the synthetic streaks were resolved. Experimental analysis was also done by using the PDMS microchannel setup. Intensity variation streaks were recorded with long camera exposure time and for maintaining the intensity variation, as the LED switched on maximum illumination was started, and continuous decrement in illumination was set by switching off at 50 % of the total illumination intensity. The best results were achieved with a 94 % success rate. Therefore, the proposed novel approach can be used with less expensive hardware for image processing with a single image frame and is useful for multiple applications.

Inverse problems are solvable on real number signal processing hardware

Despite the success of Deep Learning (DL) serious reliability issues such as non-robustness persist. An interesting aspect is, whether these problems arise due to insufficient tools or fundamental limitations of DL. We study this question from the computability perspective by characterizing the limits the applied hardware imposes. For this, we focus on the class of inverse problems, which, in particular, encompasses any task to reconstruct data from measurements. On digital hardware, a conceptual barrier on the capabilities of DL for solving finite-dimensional inverse problems has in fact already been derived. This paper investigates the general computation framework of Blum-Shub-Smale (BSS) machines, describing the processing and storage of arbitrary real values. Although a corresponding real-world computing device does not exist, research and development towards real number computing hardware, usually referred to by “neuromorphic computing”, has increased in recent years. In this work, we show that the framework of BSS machines does enable the algorithmic solvability of finite dimensional inverse problems. Our results emphasize the influence of the considered computing model in questions of accuracy and reliability.

Detection model for network access data tampering attacks with blockchain technology

This paper studies the detection model of network access data tampering attack based on blockchain technology to solve the problem of over-dependence on central server and easy data tampering in traditional network environment. The model uses decentralization and encryption technology to monitor user behavior in real time through smart contracts, enhances data protection with SHA-256 hash algorithm, and combines consensus algorithm to ensure data consistency and security. The experimental results show that the model performs well in detecting multiple attack types with an accuracy of 99.51% and an F1 score of 0.98, far exceeding traditional methods and other deep learning techniques. The model shows good robustness under multi-node attacks, even with 200 attack nodes, the recognition accuracy is still close to 90%, and the response time is less than 3 seconds. Cross-platform testing showed that the model quickly and consistently detected tampering on both Ethereum and Hyperledger, with an average detection time between 0.33 and 0.47 seconds.The hardware acceleration test further shows that the processing speed and hardware utilization of TPU and GPU have been improved, with TPU processing speed reaching 135 MB/s and GPU 122 MB/s. This study will provide a theoretical basis for improving the security, effectiveness and reliability of current network systems, and also lay a solid theoretical and technical foundation for network applications in future network environments.

Crossmodal sensory neurons based on high-performance flexible memristors for human-machine in-sensor computing system

Constructing crossmodal in-sensor processing system based on high-performance flexible devices is of great significance for the development of wearable human-machine interfaces. A bio-inspired crossmodal in-sensor computing system can perform real-time energy-efficient processing of multimodal signals, alleviating data conversion and transmission between different modules in conventional chips. Here, we report a bio-inspired crossmodal spiking sensory neuron (CSSN) based on a flexible VO2 memristor, and demonstrate a crossmodal in-sensor encoding and computing system for wearable human-machine interfaces. We demonstrate excellent performance in the VO2 memristor including endurance (>1012), uniformity (0.72% for cycle-to-cycle variations and 3.73% for device-to-device variations), speed (<30 ns), and flexibility (bendable to a curvature radius of 1 mm). A flexible hardware processing system is implemented based on the CSSN, which can directly perceive and encode pressure and temperature bimodal information into spikes, and then enables the real-time haptic-feedback for human-machine interaction. We successfully construct a crossmodal in-sensor spiking reservoir computing system via the CSSNs, which can achieve dynamic objects identification with a high accuracy of 98.1% and real-time signal feedback. This work provides a feasible approach for constructing flexible bio-inspired crossmodal in-sensor computing systems for wearable human-machine interfaces.

PMGraph: Accelerating Concurrent Graph Queries over Streaming Graphs

There are usually a large number of concurrent graph queries (CGQs) requirements in streaming graphs. However, existing graph processing systems mainly optimize a single graph query in streaming graphs or CGQs in static graphs. They have a large number of redundant computations and expensive memory access overhead, and cannot process CGQs in streaming graphs efficiently. To address these issues, we propose PMGraph , a software-hardware collaborative accelerator for efficient processing of CGQs in streaming graphs. First, PMGraph centers on fine-grained data, selects graph queries that meet the requirements through vertex data, and utilizes the similarity between different graph queries to merge the same vertices they need to process to address the problem of a large amount of repeated access to the same data by different graph queries in CGQs, thereby reducing memory access overhead. Furthermore, it adopts the update strategy that regularizes the processing order of vertices in each graph query according to the order of the vertex dependence chain, consequently effectively reducing redundant computations. Second, we propose a CGQs-oriented scheduling strategy to increase the data overlap when different graph queries are processed, thereby further improving the performance. Finally, PMGraph prefetches the vertex information according to the global active vertex set Frontier of all graph queries, hiding the memory access latency. It also provides prefetching for the same vertices that need to be processed by different graph queries, reducing the memory access overhead. Compared with the state-of-the-art concurrent graph query software systems Kickstarter-C and Tripoline, PMGraph achieves average speedups of 5.57 × and 4.58 ×, respectively. Compared with the state-of-the-art hardware accelerators Minnow, HATS, LCCG and JetStream, PMGraph achieves the speedup of 3.65 ×, 3.41 ×, 1.73 × and 1.38 × on average, respectively. Experimental results show that our proposed PMGraph outperforms the state-of-the-art concurrent graph processing systems and hardware accelerators.

An efficient low-delay polyphase implementation method for active noise control systems

When implementing active noise control systems on signal processing hardware, the time delay introduced by electronic components (especially components requiring additional lowpass filters or introducing fixed-sample-size delays) may adversely affect the noise control performance. One common approach to reducing this delay is to use a high sampling rate, but this increases the computation significantly when implementing the ANC filters in real time. In the current work, a polyphase-structure-based filter design method is developed for active noise control systems that can reduce the computation load for real-time filter implementation but do not introduce an additional time delay. Although the computation reduction capability of a polyphase filter structure is well known for multi-rate systems, the traditional use of such multi-rate systems requires additional anti-aliasing and reconstruction filters which introduces an additional time delay. Thus, in delay-sensitive applications, such as active noise control, this method was previously applied only on the filter adaption phase, instead of directly on the real-time filtering process. In this article, a filter decomposition method using the minimum-phase technique is proposed to decompose an ANC filter into two multiplicative causal filters both of which have lowpass frequency response shapes at high frequencies such that the polyphase structure can be applied directly to the two multiplicative causal control filters without introducing additional anti-aliasing and reconstruction filters. Results show that, compared with various traditional low sampling rate implementations, the proposed method can significantly improve the noise control performance. Compared with the non-polyphase high-sampling rate method, the real-time computations that increase with the sampling rate are improved from quadratically to linearly.

Optoelectronic Devices for In-Sensor Computing.

The demand for accurate perception of the physical world leads to a dramatic increase in sensory nodes. However, the transmission of massive and unstructured sensory data from sensors to computing units poses great challenges in terms of power-efficiency, transmission bandwidth, data storage, time latency, and security. To efficiently process massive sensory data, it is crucial to achieve data compression and structuring at the sensory terminals. In-sensor computing integrates perception, memory, and processing functions within sensors, enabling sensory terminals to perform data compression and data structuring. Here, vision sensors are adopted as an example and discuss the functions of electronic, optical, and optoelectronic hardware for visual processing. Particularly, hardware implementations of optoelectronic devices for in-sensor visual processing that can compress and structure multidimensional vision information are examined. The underlying resistive switching mechanisms of volatile/nonvolatile optoelectronic devices and their processing operations are explored. Finally, a perspective on the future development of optoelectronic devices for in-sensor computing is provided.

Enhancement of bionic cilia flow rate sensor signals by single-well stochastic resonance

Abstract Based on the characteristics of non-periodic signals in bionic cilia flow rate sensors, an investigation on the real-time signal processing methodologies is conducted in single-well stochastic resonance. In this research, we derive a model for an adaptive single-well stochastic resonance system featuring nonlinear recuperation. To assess the scientific robustness and practical viability of the algorithm, a validation experiment was formulated utilizing the single-well stochastic resonance capacitance online detection and processing hardware system. The experimental findings show a notable reduction in noise interference, a marked enhancement in signal quality, and an approximate 0.55 increase in the maximum cross-correlation coefficient among sensor signals. Consequently, the model fulfills the requirements for effectively handling non-periodic signals from sensors.

Magnetization reversal by multiple optical pulses for a photonic spiking neuron with the leaky integrate and fire model

Photonic accelerators are anticipated to be the next generation of hardware processors, replacing traditional electronic accelerators. In current photonic accelerators based on artificial neural networks, photonic integrated circuits are incorporated with electronic integrated circuits to leverage their strengths: photonic circuits are used to perform linear calculations, while electronic circuits are used to perform nonlinear calculations. However, this architecture requires optoelectric conversion at each layer and is unable to leverage the superiority of light. We propose a novel photonic spiking neuron with a magneto-optical synapse and an all-optical spiking neural network. This study experimentally demonstrates that the magnetization reversal of CoFeB, which occurs during thermal accumulation owing to multiple optical pulses, is similar to the behavior of the leaky integrated and fire model of spiking neurons.

Hardware and Technological Solutions for Complex Processing of Jerusalem Artichoke into Alcohol, Distillates and Dietary Fiber

Hardware and Technological Solutions for Complex Processing of Jerusalem Artichoke into Alcohol, Distillates and Dietary Fiber

Target recognition in diverse synthetic aperture radar image datasets with low size weight and power processing hardware

AbstractThis paper studies the performance of target detection and classification algorithms applied to synthetic aperture radar (SAR) data. We describe a process to merge measured environmental SAR scene images with target image chips to produce a large dataset for training deep learning algorithms. Three algorithms, RetinaNet, EfficientDet, and YOLOv5, were trained using a powerful cloud server. Performance at inference time, in terms of speed and accuracy, was tested on both the cloud server and a low size weight and power (SWAP) single board computer. YOLOv5 was found to be the most accurate and fastest algorithm on the cloud server but the slowest on the low‐SWAP device. RetinaNet and EfficientDet produced operationally useful throughput on the low‐SWAP device for surveillance applications, with RetinaNet having the higher accuracy. Further qualitative analysis of algorithm performance on additional data with different characteristics highlighted the importance of gathering relevant training data and carrying out suitable pre‐processing steps.

Switching mechanisms of two-dimensional transition metal dichalcogenides(2D TMDCs)-based memristive devices for neuromorphic computing

The recent surge in artificial intelligence has escalated the demand for computing performance and storage capability in information processing hardware. However, in traditional von Neumann architecture, the processing and memory units are connected by a bus with limited bandwidth, which leads to excessive time and power consumption in data transfer. To address this issue, the emerging neuromorphic architecture co-locates the memory and processing functionalities by mimicking the information processing akin to the human brain. The inefficiency of traditional technology in neuromorphic hardware has led to extensive interest in novel memristive devices. The two-dimensional (2D) transition metal dichalcogenides (TMDCs) exhibit appealing characteristics for memristive devices, including tunable bandgap, high mobility at atomic thickness, and the rich possibility of defect engineering. This review focuses on the switching mechanisms of memristive devices based on 2D TMDCs. Additionally, properties and performances of 2D TMDCs-based memristive devices are also summarized in this review with respect to different switching mechanisms.

Precisely determining photon-number in real time

Superconducting transition-edge sensors (TES) are extremely sensitive microcalorimeters used as photon detectors with unparalleled energy resolution. They have found application from measuring astronomical spectra through to determining the quantum property of photon-number, n&amp;#x005E;=a&amp;#x005E;&amp;#x2020;a&amp;#x005E;, for energies from 0.6-2.33eV. However, achieving optimal energy resolution requires considerable data acquisition – on the order of 1GB/min – followed by post-processing, which does not allow access to energy information in real time. Here we use a custom hardware processor to process TES pulses while new detections are still being registered, allowing photon-number to be measured in real time as well as reducing data requirements by orders-of-magnitude. We resolve photon number up to n=16 – achieving up to parts-per-billion discrimination for low photon numbers on the fly – providing transformational capacity for applications of TES detectors from astronomy through to quantum technology.

Advancing Roadway Safety through Intelligent Directional Indicators

This Roadway safety remains a critical concern worldwide, with millions of accidents occurring annually, leading to significant loss of life and economic damage. Conventional directional indicator systems, reliant on manual control or mechanical switches, often fall short in providing timely and accurate directional information to other road users, resulting in confusion and potential accidents. To address this challenge, the project "Advancing Roadway Safety through Intelligent Directional Vehicle Indicators" proposes a novel solution leveraging advanced technologies such as the ESP32 microcontroller and the ADXL345 accelerometer. This project aims to develop a robust system capable of accurately detecting and signaling left and right turns in real-time, thereby enhancing situational awareness and reducing the risk of accidents caused by signaling errors or ambiguity. The system integrates hardware components including the ESP32 controller, ADXL345 accelerometer, and OLED display, along with software components comprising firmware for the ESP32, algorithms for directional detection using accelerometer data, and display logic for the OLED display. Through a comprehensive methodology involving calibration of the accelerometer, data processing, and integration of hardware and software components, the system achieves enhanced safety, reliability, integration, and efficiency. Experimental results demonstrate the effectiveness of the proposed system in providing accurate and timely directional indicators, with minimal false positives or negatives under various environmental conditions. The project contributes to advancing roadway safety and lays the foundation for the widespread adoption of intelligent transportation systems, offering significant potential for reducing accidents and improving the efficiency of transportation networks

Enhanced FPGA linear phase FIR filter with amalgam multiplier

ABSTRACT Designing high-performance integrated circuits that balance area, speed, and power is increasingly challenging. This study optimises hardware implementation of FIR filters using an innovative Amalgam Multiplier, minimising resource use without compromising performance. The key challenge in designing signal processing hardware is the multiplier design, which significantly affects efficiency. This study explores integrated circuit optimisation, addressing the delicate balance between area utilisation, speed, and power consumption. Focusing on hardware implementation of Finite Impulse Response (FIR) filters in signal processing, the article starts with a conventional FIR filter design using a standard array multiplier which consumed 1.790 W, with 8 s real-time completion. Then, Linear Phase FIR (LP-FIR) filter is designed using Braun and Dadda Multiplier. LP-FIR filter with Braun multiplier consumed 1.436 W power and 26 s of completion time whereas LP-FIR with Dadda multiplier consumed 1.363 W power and 23 s of completion time. Finally, the implementation of novel LP-FIR enhanced by Amalgam multiplier consumed 0.302 W power and 10.29 s of completion time, marking a significant advancement in integrated circuit design.