Processing Unit Research Articles

Numerical Simulation Study on the Stable Combustion of a 660 MW Supercritical Unit Boiler at Ultra-Low Load

To investigate the safe, stable, and economically viable operation of a boiler under ultra-low-load conditions during the deep peaking process of coal-fired units, a numerical simulation study was conducted on a 660 MW front- and rear-wall hedge cyclone burner boiler. The current research on low load conditions is limited to achieving stable combustion by adjusting the operating parameters, and few effective boiler operating parameter predictions are given for very low-load conditions, i.e., below 20%. Various burner operation modes under ultra-low load conditions were analyzed using computational fluid dynamics (CFDs) methods; this operation was successfully tested with six types of pulverized coal combustion in this paper, and fitting models for outlet flue gas temperature and NOx emissions were derived based on the combustion characteristics of different types of pulverized coal. The results indicate that under 20% ultra-low-load conditions, the use of lower burners leads to a uniform temperature distribution within the furnace, achieving a minimum NOx emission of 112 ppm and a flue gas temperature of 743 K. Coal type 3, with the highest carbon content and a calorific value of 22,440 kJ/kg, has the highest average section temperature of 1435.76 K. In contrast, coal type 1 has a higher nitrogen content, with a maximum cross-sectional average NOx concentration of 865.90 ppm and an exit NOx emission concentration of 800 ppm. The overall lower NOx emissions of coal type 3 are primarily attributed to its reduced nitrogen content and increased oxygen content, which enhance pulverized coal combustion and suppress NOx formation. The fitting models accurately capture the influence of pulverized coal composition on outlet flue gas temperature and NOx emissions. This control strategy can be extended to the stable combustion of many kinds of coal. For validation, the fitting error bar for the predicted outlet flue gas temperature based on the elemental composition of coal type 6 was 8.09%, whereas the fitting error bar for the outlet NOx emissions was only 1.45%.

Retina-Inspired X-Ray Optoelectronic Synapse Using Amorphous Ga2O3 Thin Film.

Machine vision techniques are widely applied for object identification in daily life and industrial production, where images are captured and processed by sensors, memories, and processing units sequentially. Neuromorphic optoelectronic synapses, as a preferable option to promote the efficiency of image recognition, are hotly pursued in non-ionizing radiation range, but rarely in ionizing radiation including X-rays. Here, the study proposes an X-ray optoelectronic synapse using amorphous Ga2O3 (a-Ga2O3) thin film. Boosted by the interfacial VO 2+ defects and its slow neutralization rate, the enhanced electron tunneling process at metal/a-Ga2O3 interface produces remarkable X-ray-induced post-synaptic current, contributing to a sensitivity of 20.5, 64.3, 164.1 µC mGy-1 cm-2 for the 1st, 5th, and 10th excitation periods, respectively. Further, a 64×64 imaging sensor is constructed on a commercial amorphous Si (a-Si) thin film transistor (TFT) array. The image contrast can be apparently improved under a series of X-ray pulses due to an outstanding long-term plasticity of the single pixel, which is beneficial to the subsequent image recognition and classification based on artificial neural network. The merits of large-scale production ability and good compatibility with modern microelectronic techniques belonging to amorphous oxide semiconductors may promote the development of neuro-inspired X-ray imagers and corresponding machine vision systems.

A Survey on Design Space Exploration Approaches for Approximate Computing Systems

Approximate Computing (AxC) has emerged as a promising paradigm to enhance performance and energy efficiency by allowing a controlled trade-off between accuracy and resource consumption. It is extensively adopted across various abstraction levels, from software to architecture and circuit levels, employing diverse methodologies. The primary objective of AxC is to reduce energy consumption for executing error-resilient applications, accepting controlled and inherently acceptable output quality degradation. However, harnessing AxC poses several challenges, including identifying segments within a design amenable to approximation and selecting suitable AxC techniques to fulfill accuracy and performance criteria. This survey provides a comprehensive review of recent methodologies proposed for performing Design Space Exploration (DSE) to find the most suitable AxC techniques, focusing on both hardware and software implementations. DSE is a crucial design process where system designs are modeled, evaluated, and optimized for various extra-functional system behaviors such as performance, power consumption, energy efficiency, and accuracy. A systematic literature review was conducted to identify papers that ascribe their DSE algorithms, excluding those relying on exhaustive search methods. This survey aims to detail the state-of-the-art DSE methodologies that efficiently select AxC techniques, offering insights into their applicability across different hardware platforms and use-case domains. For this purpose, papers were categorized based on the type of search algorithm used, with Machine Learning (ML) and Evolutionary Algorithms (EAs) being the predominant approaches. Further categorization is based on the target hardware, including Field-Programmable Gate Arrays (FPGAs), Application-Specific Integrated Circuits (ASICs), general-purpose Central Processing Units (CPUs), and Graphics Processing Units (GPUs). A notable observation was that most studies targeted image processing applications due to their tolerance for accuracy loss. By providing an overview of techniques and methods outlined in existing literature pertaining to the DSE of AxC designs, this survey elucidates the current trends and challenges in optimizing approximate designs.

Understanding the Impact of Data Center Liquid Cooling on Energy and Performance of Machine Learning and Artificial Intelligence Workloads

Abstract Traditionally, Data Centers (DC) have used air cooling for IT equipment, but as Graphics Processing Units (GPUs) evolve, they demand more power and sophisticated cooling. Aiming for efficiency, Direct Liquid Cooling (DLC) emerges as a promising solution. We evaluated the effectiveness of DLC versus traditional air cooling on a Microsoft G50 GPU server performing AI/ML tasks. The results indicated that DLC greatly enhances GPU performance, increases efficiency by 2.7% in Gflops/s, cuts power usage by 12%, reduces execution times by up to 6.22%, and lowers chip temperatures by 20° compared to air cooling. Our research develops an overall performance metric that considers data center, hardware, and chip levels, concluding that DLC is extremely beneficial for AI workloads, increasing energy savings and balancing performance with power requirements.

A novel deep learning‐based technique for efficient characterization of engineered cementitious composites cracks for durability assessment

AbstractEngineered Cementitious Composites also known as Strain‐hardening cementitious composites (SHCCs) has unique cracking patterns like cracks that have tiny widths and showcase high density. All of this makes it difficult and laborious to compute crack parameters from crack patterns. Unfortunately, this is an essential part of assessing durability and micromechanical modeling. SHSnet is developed to perform end‐to‐end semantic segmentation of SHCC cracks. SHSnet is efficient, attention based deep encoder‐decoder network with large receptive field. Loss function based on Tversky function were used for training the model. SHSnet with loss function shows promising result with mPrecision, mF1Score and mIoU of 0.87, 0.84 and 0.83 respectively for complex SHCC cracks while requiring at least an order of fewer computational parameters than those in the literature. An image processing unit is then used to estimate the width, number, and length of the cracks from the segmentation mask. Test results show that the computed crack parameters with SHSnet are exactly the same as that computed with an optical microscope but require ~100× less time. Results demonstrate that SHSnet works equally well in SHCCs with different surface textures, crack density, and widths; the final result was far superior to a conventional technique. This technique also shows promising results in an automatic evaluation of crack parameters relevant to durability and visualizing crack patterns even in the presence of artifacts during progressive testing. The results also demonstrate the necessity to accurately and densely calculate crack length and maximum crack width; else the durability results are expected to be significantly more conservative than the actual value.

A Thread-Safe Lattice Boltzmann Model for Multicomponent Turbulent Jet Simulations

In this work an optimized multicomponent lattice Boltzmann (LB) model is deployed to simulate axisymmetric turbulent jets of a fluid evolving in a quiescent, immiscible environment over a wide range of dynamic regimes. The implementation of the multicomponent LB code achieves peak performance on graphic processing units (GPUs) with a significant reduction of the memory footprint, retains the algorithmic simplicity inherent to standard LB computing, and, being based on a high-order extension of the thread-safe LB algorithm, allows us to perform stable simulations at vanishingly low viscosities. The proposed approach opens attractive prospects for high-performance computing simulations of realistic turbulent flows with interfaces on GPU-based architectures.

Preparing for net zero greenhouse gas emissions in 2050: lifecycle emissions of dairy products in Brazil

Dairy products play an important role in human nutrition and the world economy. Livestock farming, including cows rearing to produce milk and dairy products, is one of the world's major sources of greenhouse gas emissions. Progress towards net zero goals requires monitoring emissions from companies and products, and greenhouse gas inventories are essential. This work quantifies greenhouse gas emissions from milk production, considering the milk delivered at the farm gate and the milk delivered at the cooperative gate. Emissions accounting was based on greenhouse gas inventories for two units and lifecycle emissions for major farm inputs. Results have shown that milk production on the farm emits 0.57 kg CO2e / liter, with enteric fermentation accounting for more than 90% of emissions at the farm gate, and more than 50% at the milk processing unit gate. Dairy production adds 0.533 kg CO2e / liter to the emissions coming from raw milk, most of which comes from wastewater treatment. Thus, the footprint of dairy products is 1.103 kg CO2e / liter of processed milk. The producers' cooperative's greenhouse gas emissions are essentially indirect and amount to 0.626 kg CO2e/liter of milk delivered to customers, in which emissions from purchased milk account for more than 85% and emissions from transportation account for around 15%.

Inferring TLB Configuration with Performance Tools

Modern computing systems are primarily designed for maximum performance, which inadvertently introduces vulnerabilities at the micro-architecture level. While cache side-channel analysis has received significant attention, other Central Processing Units (CPUs) components like the Translation Lookaside Buffer (TLB) can also be exploited to leak sensitive information. This paper focuses on the TLB, a micro-architecture component that is vulnerable to side-channel attacks. Despite the coarse granularity at the page level, advancements in tools and techniques have made TLB information leakage feasible. The primary goal of this study is not to demonstrate the potential for information leakage from the TLB but to establish a comprehensive framework to reverse engineer the TLB configuration, a critical aspect of side-channel analysis attacks that have previously succeeded in extracting sensitive data. The methodology involves detailed reverse engineering efforts on Intel CPUs, complemented by analytical tools to support TLB reverse engineering. This study successfully reverse-engineered the TLB configurations for Intel CPUs and introduced visual tools for further analysis. These results can be used to explore TLB vulnerabilities in greater depth. However, when attempting to apply the same methodology to the IBM Power9, it became clear that the methodology was not transferable, as mapping functions and performance counters vary across different vendors.

Cluster perturbation theory. X. A parallel implementation of Lagrangian perturbation series for the coupled cluster singles and doubles ground-state energy through fifth order.

We describe an efficient implementation of cluster perturbation and Møller-Plesset Lagrangian energy series through the fifth order that targets the coupled cluster singles and doubles energy utilizing the resolution of the identity approximation. We illustrate the computational performance of the implementation by performing ground state energy calculations on systems with up to 1200 basis functions using a single node and by comparison to conventional coupled cluster singles and doubles calculations. We further show that our hybrid message passing interface/open multiprocessing parallel implementation that also utilizes graphical processing units can be used to obtain fifth order energies on systems with almost 1200 basis functions with a 90min"time to solution" running on Frontier at Oak Ridge National Laboratory.

Neural Methods for Amortized Inference

Simulation-based methods for statistical inference have evolved dramatically over the past 50 years, keeping pace with technological advancements. The field is undergoing a new revolution as it embraces the representational capacity of neural networks, optimization libraries, and graphics processing units for learning complex mappings between data and inferential targets. The resulting tools are amortized, in the sense that, after an initial setup cost, they allow rapid inference through fast feed-forward operations. In this article we review recent progress in the context of point estimation, approximate Bayesian inference, summary-statistic construction, and likelihood approximation. We also cover software and include a simple illustration to showcase the wide array of tools available for amortized inference and the benefits they offer over Markov chain Monte Carlo methods. The article concludes with an overview of relevant topics and an outlook on future research directions.

GPU Parallel Computing Architectures : Unlocking the Power of Parallelism for High-Performance Applications

Graphics Processing Units (GPUs) have evolved from specialized graphics rendering hardware to become powerful parallel computing architectures, revolutionizing high-performance computing across diverse domains. This comprehensive article explores the fundamental principles of GPU parallel computing architectures, their design, and their impact on modern computational challenges. We begin by examining the multi-core structure, memory hierarchy, and data processing capabilities of GPUs, including the SIMD execution model and thread organization. The article then delves into prominent programming models like CUDA and OpenCL, discussing their features and comparative advantages. We explore how GPUs are leveraged for general-purpose computing in scientific simulations, machine learning, and big data analytics, while also addressing the challenges inherent in GPU parallel computing, such as data transfer bottlenecks and load balancing. Recent technological advancements, including tensor cores, unified memory architecture, and ray tracing acceleration, are analyzed for their transformative potential. The article concludes by examining future directions in GPU technology, including integration with emerging technologies like quantum computing, advancements in energy efficiency, and the potential impact on solving complex global challenges. Through this comprehensive analysis, we illustrate the pivotal role of GPU parallel computing architectures in shaping the future of high-performance computing and their potential to address some of the world's most pressing computational problems.

Dynamic Buffer Management in Massively Parallel Systems: The Power of Randomness

Massively parallel systems, such as Graphics Processing Units (GPUs), play an increasingly crucial role in today’s data-intensive computing. The unique challenges associated with developing system software for massively parallel hardware to support numerous parallel threads efficiently are of paramount importance. One such challenge is the design of a dynamic memory allocator to allocate memory at runtime. Traditionally, memory allocators have relied on maintaining a global data structure, such as a queue of free pages. However, in the context of massively parallel systems, accessing such global data structures can quickly become a bottleneck even with multiple queues in place. This paper presents a novel approach to dynamic memory allocation that eliminates the need for a centralized data structure. Our proposed approach revolves around letting threads employ random search procedures to locate free pages. Through mathematical proofs and extensive experiments, we demonstrate that the basic random search design achieves lower latency than the best-known existing solution, Ouroboros, in most situations. Furthermore, we develop more advanced techniques and algorithms to tackle the challenge of warp divergence and further enhance performance when free memory is limited. Building upon these advancements, our mathematical proofs and experimental results affirm that these advanced designs can yield an order of magnitude improvement over the basic design and consistently outperform the state-of-the-art by up to two orders of magnitude. To illustrate the practical implications of our work, we integrate our memory management techniques into two GPU algorithms: a hash join and a group-by. Both case studies provide compelling evidence of our approach’s pronounced performance gains.

Comparative Analysis of Inorganic and Organic Sources on Economic Viability Productivity of Turmeric (Curcuma Longa L.)

Turmeric (Curcuma longa L.) (Family: Zingiberaceae), Known as "Indian Saffron," a long-used and revered spice, is a significant commercial spice crop farmed in India. Known by many as the "Golden Spice of life," it is one of the most vital spices and a staple in cuisine all over the world. A tropical perennial plant native to Indonesia and India, turmeric is grown all over the world's tropics. India grows this significant commercial spice. It is ingrained in Indian tradition. The world's best turmeric is thought to come from India. In many Asian nations, Indian colloquial names are known as pasupu, haldi, manjal, and kunyit. Just 6% of India's land is used for growing spices and condiments, despite the country being the world's top producer, exporter, and supplier of 78% of the world's supply of turmeric. Furthermore, among Indian spices, turmeric is the second-biggest earner of foreign cash. India being one of the major producers of turmeric, contributes 80% to global production. In the year 2018-19, turmeric production was 389 thousand tonnes, with area and productivity 246 thousand hectares and 5646.34 kg per hectare respectively. The growth pattern of the area, production, and productivity of turmeric over the period of time indicate the growing contribution of production over the area expansion to the increased yield. India uses almost 80% of the world's turmeric. It makes up 80% of global production. With the largest proportion of 38% of all India's turmeric area, Andhra Pradesh is referred to as the "Turmeric Bowl of India," with Orissa coming in second. Another important policy strep i.e. “One District One Product” under Centrally Sponsored Scheme PMFME (PM Formalization of Micro food processing Enterprises Scheme), Turmeric is listed in the selected product in all states, this is an additional scope under which states can be encouraged to adopt cluster approach and group approaches such as FPOs, SHGs (Self Help Groups) and producer cooperatives. This will help to bring the win-win situation to both farmers and the microenterprises. Also, except Assam, the spread of formal/organized food processing units are scanty, the innovation center for developing value-added products from the traditional knowledge can be encouraged so that in the long run the product can be easily scaled up.

EXPRESS: A Framework for Execution Time Prediction of Concurrent CNNs on Xilinx DPU Accelerator

Deep learning Processor Unit (DPU) is a highly configurable CNN accelerator that supports a variety of CNNs and can be implemented with multiple instances on the same FPGA. Many applications deploy concurrent execution of different CNNs and in such a setting, an execution time predictor can help “optimize” the DPU configurations to meet the performance requirements of different tasks. We characterize CNN execution on DPUs and reduce the variability in execution time due to interference from the operating system. Subsequently, we propose a machine learning-based framework (EXPRESS) to predict the execution time of any given CNN on a DPU configuration, considering CNN, DPU, and bus characteristics. We improvise EXPRESS to support heterogeneous CNNs in EXPRESS-2.0 by making features independent of the number of CNNs. Our entire experimentation is based on data from a real FPGA board for 16 standard CNNs. Our frameworks, EXPRESS and EXPRESS-2.0, significantly outperform state-of-the-art by achieving an average execution time prediction error of 2.2% and 0.7%, respectively. We illustrate the effectiveness of this low prediction error for design space exploration, which is very useful for embedded system application developers.

Defending Against Deep Learning-Based Traffic Fingerprinting Attacks With Adversarial Examples

In an increasingly digital and interconnected world, online anonymity and privacy are paramount issues for Internet users. To address this, tools like The Onion Router (Tor) offer anonymous and private communication by routing traffic through multiple relays with multiple layers of encryption. However, traffic fingerprinting attacks have threatened anonymity and privacy. In response, the community has proposed additional defenses for Tor, but fingerprinting techniques that utilize deep neural networkss (DNNs) have undermined many of these defenses. The latest defenses that are both lightweight and robust against DNNs use adversarial examples, but these defenses require either the full traffic trace beforehand or a database of pre-computed adversarial examples. We propose Prism , a defense against fingerprinting attacks that utilizes adversarial examples with neither prior access to the full traffic trace nor a database. We describe a novel method of adversarial example generation as input is learned over time. Prism injects these adversarial examples into the Tor traffic stream to prevent DNNs from accurately classifying both websites and videos that a user is viewing, even if the DNN is hardened by adversarial training. We also show that the Tor network could implement Prism entirely on relays under certain conditions, extending the defense to users who may run Tor on devices without graphics processing units.

Lower Energy Consumption in Multi-CPU Cell-Free Massive MIMO Systems

Under the ideal assumption of deploying only one central processing unit (CPU) in the entire system, cell-free (CF) systems can achieve significant macro-diversity gain, thereby providing uniformly reliable service to each user equipment (UE). However, due to limitations in system scalability and the feasibility of strict phase synchronization, CF systems require a multi-CPU setup and perform coherent transmission at a smaller scale. Moreover, conventional CF systems typically operate in time-division duplex (TDD) mode and utilize statistical channel state information (CSI) for downlink (DL) decoding, but the channel hardening effect is not significant. These factors reduce downlink spectral efficiency (SE) and increase DL transmission time, leading to higher energy consumption in CF systems. To address these issues, we introduce downlink channel estimation (DLCE) in multi-CPU CF systems and derive the approximate achievable DL SE. To reduce DL pilot overhead, we propose an uplink–pilot-reuse-constrained DL pilot allocation principle. Based on this principle, we develop a farthest distance pilot allocation (FDPA) algorithm to mitigate pilot contamination. In addition, leveraging the characteristics of the heuristic distributed power allocation algorithm, we propose two access point (AP) clustering algorithms: one based on CSI (BCSI) and the other based on coherent group size (BCGS). Simulation results indicate that the introduction of DLCE significantly improves DL SE in multi-CPU CF massive MIMO systems, while the proposed FDPA algorithm further enhances DL SE. The BCSI and BCGS algorithms also effectively improve DL SE and help reduce energy consumption. By combining DLCE, the FDPA algorithm, and the proposed AP clustering algorithms, the energy consumption of multi-CPU CF systems can be significantly reduced.

Fully integrated multi-mode optoelectronic memristor array for diversified in-sensor computing.

In-sensor computing, which integrates sensing, memory and processing functions, has shown substantial potential in artificial vision systems. However, large-scale monolithic integration of in-sensor computing based on emerging devices with complementary metal-oxide-semiconductor (CMOS) circuits remains challenging, lacking functional demonstrations at the hardware level. Here we report a fully integrated 1-kb array with 128 × 8 one-transistor one-optoelectronic memristor (OEM) cells and silicon CMOS circuits, which features configurable multi-mode functionality encompassing three different modes of electronic memristor, dynamic OEM and non-volatile OEM (NV-OEM). These modes are configured by modulating the charge density within the oxygen vacancies via synergistic optical and electrical operations, as confirmed by differential phase-contrast scanning transmission electron microscopy. Using this OEM system, three visual processing tasks are demonstrated: image sensory pre-processing with a recognition accuracy enhanced from 85.7% to 96.1% by the NV-OEM mode, more advanced object tracking with 96.1% accuracy using both dynamic OEM and NV-OEM modes and human motion recognition with a fully OEM-based in-sensor reservoir computing system achieving 91.2% accuracy. A system-level benchmark further shows that it consumes over 20 times less energy than graphics processing units. By monolithically integrating the multi-functional OEMs with Si CMOS, this work provides a cost-effective platform for diverse in-sensor computing applications.

A Comprehensive Systematic Scoping Review of Self-Driving Vehicle Models

Self-driving vehicles (SDVs), also known as autonomous vehicles (AVs), are anticipated to revolutionize transportation by operating independently through the integration of machine learning algorithms, advanced processing units, and sensor networks. Numerous organizations globally are actively developing SDV models, prompting this paper’s objective to identify emerging trends and patterns in SDV development through a comprehensive systematic scoping review (SSR). This research involved selecting 85 relevant studies from an initial set of 551 records across multiple academic databases, utilizing well-defined inclusion and exclusion criteria along with snowballing techniques to ensure a thorough analysis. The findings emphasize critical technical specifications required for both full-scale and miniature SDV models, focusing on key software and hardware architectures, essential sensors, and primary suppliers. Additionally, the analysis explores publication trends, including publisher and venue distribution, authors’ affiliations, and the most active countries in SDV research. This work aims to guide researchers in designing their SDV models by identifying key challenges and exploring opportunities likely to shape future research and development in autonomous vehicle technology.

Technology of production of aluminosilicate refractories for units processing fluorinated waste

The aluminium production process through the electrolysis of cryolite-alumina melts involves a series of interconnected, sequential, and parallel technological operations, each defined by a specific level of engineering and technological advancement. The development of the modern aluminum industry is closely tied to the adoption of resource-efficient and environmentally friendly technologies, which focus on recycling secondary materials and industrial waste. Fluorinated carbon-based materials release fluorine into the gas phase at relatively low temperatures when heated, and in thermal units processing fluorinated waste, this fluorine, along with alkali metals, will remain in the gas phase. To enhance the durability of furnace linings against the corrosive atmosphere, refractories with the highest possible density (low porosity) and a high concentration of mullite in the matrix (the finely ground component of the batch) are required. These properties can only be achieved in refractory products produced by the semi-dry pressing method, which ensures high grain packing density and leads to the formation of a ceramic mullite bond after firing.

High-speed and low-power molecular dynamics processing unit (MDPU) with ab initio accuracy

Molecular dynamics (MD) is an indispensable atomistic-scale computational tool widely-used in various disciplines. In the past decades, nearly all ab initio MD and machine-learning MD have been based on the general-purpose central/graphics processing units (CPU/GPU), which are well-known to suffer from their intrinsic “memory wall” and “power wall” bottlenecks. Consequently, nowadays MD calculations with ab initio accuracy are extremely time-consuming and power-consuming, imposing serious restrictions on the MD simulation size and duration. To solve this problem, here we propose a special-purpose MD processing unit (MDPU), which could reduce MD time and power consumption by about 103 times (109 times) compared to state-of-the-art machine-learning MD (ab initio MD) based on CPU/GPU, while keeping ab initio accuracy. With significantly-enhanced performance, the proposed MDPU may pave a way for the accurate atomistic-scale analysis of large-size and/or long-duration problems which were impossible/impractical to compute before.