Voltage Imbalance Problem Research Articles

A Multiport Current-Fed IIOS Dual-Half-Bridge Converter for Distributed Photovoltaic MVDC Integration System

The input-independent output-series (IIOS) dc-dc converter structure possesses the capability to achieve high voltage gain, single-stage power conversion and multiport independent control, which is suitable for distributed photovoltaic (PV) power collection system. However, if the multiport input powers are different, the output voltage of each submodule (SM) will be uneven, which might lead to power degradation and device damage. In order to address SM output voltage imbalance problem, a voltage self-balancing output-series dual-half- bridge (OSDHB) converter based on multi-winding coupled-inductor (MWCI) is developed in this paper. By multiplexing the SM secondary side switches in OSDHB, the unbalanced power between SMs can be directly transmitted to the target SM, without the requisition for transmission one by one. And all power switches possess zero-voltage switching characteristic. Therefore, the proposed IIOS-DHB features high efficiency, low cost, simple control and more adaptive to distributed PV power generation system. The topological configuration, operating principle and self-balancing performance are presented. Finally, the full-scale simulations and three submodules down-scale experiment hardware platform have been conducted to verify the theoretical analysis of the proposed IIOS-DHB.

A model predictive fault‐tolerant control strategy for non‐redundant T‐inverters with multiphysics‐circuit coupling loss analysis

SummaryThis paper presents a multiobjective optimal power prediction fault‐tolerant control (MO2PPC) approach for mitigating DC link neutral‐point voltage imbalance and current ripple problems in three‐level T‐type inverter (3LT2I). Additionally, an auxiliary thyristor is employed to isolate and reconstruct the faulty phase into an 8ST2I for ensuring uninterrupted operation during phase failure. A method called injected bias current‐MO2PPC (IBC‐MO2PPC) fault‐tolerant strategy is proposed for this structure. This approach eliminates the need for DC or AC current sensors to reconstruct the three‐phase current, thereby reducing neutral‐point oscillation caused by phase deficiency and ensuring full power output after failure. Additionally, nonfaulty phase power loss is compared and analyzed to verify the stability of this method following a phase fault. The internal losses and temperature distribution of an IGBT module in a bridge arm before and after a fault are verified through a multiphysics‐circuit model in COMSOL‐Simulink coupling simulation presented last. The model shows reduced conduction losses and overall lower temperature distribution in the IGBT module after fault reconstruction. Experiments and multiphysics simulations have demonstrated that this approach displays exceptional robustness and sustainability throughout the entire fault cycle.

Modulation Methods for Balancing the Capacitor Voltages of N-Level Diode-Clamped Converters

Diode-clamped converters (DCCs) suffer from the inherent capacitor voltage imbalance problem. Most software-based voltage-balancing methods fall into the space-vector-modulation (SVM) category and the carrier-based pulse-width-modulation (CB-PWM) category. Despite their effectiveness for the three-level DCCs, it is not easy to extend them to a general <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> -level topology. In this paper, a new modulation method of a category called good-switching (GS) PWM is proposed for balancing the capacitor voltages. The proposed method requires no parameter-tuning effort and is extremely simple to design even for the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> -level topology regardless of the number of phases. It is also potentially applicable to other multilevel converters. The principle, the implementation, and the stability analysis of GS-PWM are elaborated for a generic <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> -level DCC. A modified GS-PWM scheme and an on-off control scheme are proposed to reduce the switching transitions for further realizing the advantages of the GS-PWM. Particularly, the on-off control can be extended to many other voltage-balancing methods. Simulation and experiments with a five-level DCC validate the proposed methods.

Analisis Kualitas Daya dan Rekomendasi Perbaikan Sistem Kelistrikan di Gedung Perhotelan

Fave Hotel is supplied by 2 PLN transformers, with capacities of 250 kVA and 100 kVA. The supply of electrical energy at Fave Hotel is very important because the possibility of disruption is very large in the process of distributing electrical energy. Load variations at Fave Hotel will also affect the electrical system. One of the disturbances that occur in the electric power system is power quality. The research method used is data observation, monitoring, analysis, and simulation using ETAP software. Based on the results of the analysis of various power quality parameters that were measured, the power quality conditions of the fave hotel were not good. A power quality problem has been identified at Fave Hotel, specifically a voltage imbalance occurs at MDP 2 on weekend is 2.64%. In addition, there is also a current imbalance occurs at MDP 1 and 2 during both weekends and weekdays, with the largest current imbalance occurs at MDP 2 on weekdays is 64.15%. To overcome the problem of voltage imbalance and current imbalance, it is recommended to perform load balancing on the system or install compensating equipment such as a voltage compensator.

DC-port voltage balance strategy for three-phase cascaded H-bridge rectifier based on logic combination modulation

PurposeThe purpose of this paper is to propose a DC-port voltage balance strategy realizing it by logic combination modulation (LCM). This voltage balance strategy is brief and high efficient, which can be used in many power electronic devices adopting the cascaded H-bridge rectifier (CHBR) such as power electronic transformer (PET).Design/methodology/approachThe CHBR is typically as a core component in the power electronic devices to implement the voltage or current conversion. The modulation method presented here is aiming to solve the voltage imbalance problem occurred in the CHBR with more stable work station and higher reliability in ordinary operating conditions. In particular, by changing the switch states smoothly and quickly, the DC-port voltage can be controlled as the ideal value even one of the modules in CHBR is facing the load-removed problem.FindingsBy using the voltage balance strategy of LCM, the problem of voltage imbalance occurring in three-phase cascaded rectifiers has been solved properly. With the lower modulation depth, the efficiency of the strategy is shown to be better and stronger. The strategy can work reliably and quickly no matter facing the problem as load-removed change or the ordinary operating conditions.Research limitations/implicationsThe limitation of the proposed DC-port voltage balance strategy is calculated and proved, in a three-module CHBR, the LCM could balance the DC-port voltage while one module facing the load-removed situation under 0.83 modulation depth.Originality/valueThis paper provides a useful and particular voltage balance strategy which can be used in the topology of three-phase cascaded rectifier. The value of the strategy is that a brief and reliable voltage balance method in the power electronic devices can be achieved. What is more, facing the problem, such as load-removed, in outport, the strategy can response quickly with no switch jump and switch frequency rising.

A Single-Phase Switched-Capacitor Nine-Level Inverter With Reduced Capacitance

A novel nine-level switched-capacitor multilevel inverter (SCMLI) with reduced capacitance and balanced capacitor voltage is proposed in this article. Utilizing only two capacitors, the proposed SCMLI can boost the input voltage and realize nine output voltage levels under different kinds of load conditions. The controllable capacitor charging speed in the proposed SCMLI depends on the charging resonant inductor rather than the equivalent resistance of the devices in conventional topologies. The two capacitors can be charged or discharged independently by a dc source when their voltages deviate from the rated voltage. This makes the proposed SCMLI free of the capacitor voltage imbalance. The longest discharging time (LDT) of capacitors is reduced to twice the switching period, which contributes to reduced capacitance in the proposed SCMLI. With the required capacitor voltage ripple, the quality of output waveforms is also very high. A comprehensive comparison with previous SCMLIs in terms of capacitance, the voltage imbalance problem, the output voltage level, and so on is conducted to validate the merits mentioned above. The theoretical analysis, the simulation, and experiment results are accordant, confirming the feasibility of the proposed SCMLI.

A Hybrid Modular Multilevel Converter Comprising SiC MOSFET and Si IGBT With Its Specialized Modulation and Voltage Balancing Scheme

In this article, a hybrid modular multilevel converter (MMC) topology is proposed, in which two of the submodules (SMs) are based on SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> , while others are based on Si IGBT. In the proposed hybrid topology, the capacitor voltage of SiC SM is controlled to be half of that of Si SM, which reduces the requirement for the blocking voltage of SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> . What is more, this article improves the modulation scheme to move most of the switching actions from Si SMs to the two SiC SMs, which strengthens the merits and avoids the shortcomings of SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> . Besides, to solve the voltage imbalance problem caused by the change of topology and modulation scheme, a specialized voltage balancing scheme is proposed. Finally, the simulation and experiment result proves the feasibility of the hybrid MMC and control scheme, and the comprehensive analysis verifies that the hybrid MMC can achieve a better balance among cost, loss, and feasibility compared with others.

Triple-Active-Bridge Converter With Automatic Voltage Balancing for Bipolar DC Distribution

The bipolar dc grid outperforms the conventional unipolar dc distribution in terms of quality, flexibility, efficiency, reliability, transmission capacity, and safety. Despite many advantages, it has a voltage imbalance problem. Unbalanced and asymmetrical load conditions are the major contributors to this imbalance. This article proposes the triple-active-bridge converter with an automatic voltage balancing capability for bipolar dc distribution that eliminates the need for a dedicated voltage balancing controller and any additional active/passive components. Furthermore, along with the bidirectional power flow feature of a converter, the proposed method utilizes the magnetic integration of a converter's existing inductors. This voltage balancing coupled inductor offers the required inductance for power transfer and zero-voltage-switching, over and above provides effective voltage balancing without increasing the magnetic volume of a converter. The proposed method does not require an individual output voltage sensing and moreover; it decreases the complexity by reducing the system from two control variables to one. A 5-kW prototype is tested under an extreme-unbalanced load condition during the steady-state and as well as during transients. The analysis and experimental results are presented to validate the performance.

The Single-Phase Voltage and Power Control Algorithm of a 4-Leg Type CVCF Inverter for an Off-Grid Micro-Grid System

In general, severe load imbalances in small AC micro-grid systems can degrade their operational performance and their maintenance. This is because the unbalanced load in the micro-grid affects the energy flow and the voltage regulation functions of each phase. In order to solve the voltage imbalance problem, several algorithms for the 3-phase 4-leg CVCF inverter have been proposed, but the control algorithms are not enough to operate the 4-leg CVCF inverter in a stable manner. Therefore, this paper proposes a single-phase voltage and power control algorithm for the 3-phase 4-leg CVCF inverter based on a dq control in order to improve the voltage imbalance problem caused by a severely unbalanced load, where the single phase voltage control algorithm is composed of an αβ-dq and a dq-αβ transformer, a voltage and a current controller, and an off-set controller and a PWM, and the single-phase power control algorithm is also composed of an αβ-dq and a dq-αβ transformer, an active/reactive power and a current controller, and an off-set controller and a PWM. Additionally, this paper performs modeling of the single-phase voltage and the power controller for a 4-leg CVCF inverter using the Matlab/Simulink S/W. From the simulation results, it is confirmed that the transient stability of the proposed single voltage control algorithm can be improved compared to the conventional control algorithm, and voltage control can also be maintained in a stable manner under extremely unbalanced conditions. Further, it is confirmed that 3-phase currents of the proposed single-phase power control algorithm are controlled in a stable manner under extremely unbalanced conditions.

A New MMC Sub-Module Topology with DC Fault Blocking Capability and Capacitor Voltage Self-Balancing Capability

A large number of modular multilevel converters (MMC) are connected to HVDC transmission systems nowadays. This paper aims at the short-circuit fault in the DC line of the HVDC transmission system and the problem of capacitor voltage imbalance in MMC, proposing a new type of MMC sub-module, which has both the DC fault self-clearing ability and the capacitor voltage self-balancing ability. This sub-module combines the topology of half bridge and full bridge. It uses the reverse capacitor voltage to forcibly turn off the conducting diode to block the fault current loop. At the same time, the two capacitances charge and discharge states are consistent by utilizing the operating mode of the sub-module. It is possible to directly achieve a self-balancing capacitor voltage without complex balancing voltage control. The MATLAB/Simulink simulation verifies the effectiveness of the DC fault blocking capability and capacitor voltage balance capability of the proposed sub-module.

Active Modulation Strategy for Capacitor Voltage Balancing of Three-Level Neutral-Point-Clamped Converters in High-Speed Drives

In this article, the equivalent relationship between the nearest-three-virtual space vector and carrier-based pulsewidth-modulation scheme is established based on space vector coordinate for a three-level neutral-point-clamped (3L-NPC) converter. Moreover, to solve the neutral-point voltage imbalance problem of the studied 3L-NPC converter-fed high-speed drives, an active modulation strategy with the generalized bias-offset injection technique is proposed. Meanwhile, the excessive computational burden is significantly overcome by the fast calculation approach. The effectiveness of the proposed modulation algorithm is validated through both simulation and experimental results obtained from a 45 kW, 32 kr/min aircraft electric starter/generator prototype system.

A new quasi‐Z‐source switched‐boost four‐switch three‐phase inverter with independent shoot‐through and non‐shoot‐through modulation indexes

Four-switch three-phase inverters (FSTPI) are the cost-optimised version of two-level voltage source inverters (TL-VSI), promoted for low-power/low-voltage machine drive systems. Adding impedance-based networks to the input of conventional VSIs provides both step-up and step-down features; however, the shoot-through (ST) modulation index limits the maximum attainable modulation index. Furthermore, in FSTPI, one switching leg has two series capacitors instead of power switches. Therefore, they are exposed to the voltage imbalance problem. This paper proposes a novel step-up FSTPI with independent shoot-through and non-shoot-through (NST) modulation indexes, improved boost factor, continuous input current, and high efficiency. This topology incorporates a quasi-z-source switched-boost network with independent power switches and three duty ratios that affords two active states and one shoot-through event. These features enhance the performance of this topology if compared with former FSTPI and quasi-z-source FSTPI. For evaluating the performance of this topology, simulation in MATLAB software and experiment on a prototype have been done. Simulation and experimentation results confirm the proposed topology.

Research on Balanced Management Topology of Series Battery Pack

With the rapid development of renewable energy, energy storage battery technology has made great progress, and it has also caused the rapid development of electric vehicles. There is an inevitable difference between a large number of battery cells in the energy storage battery pack of electric vehicles. This difference will increase with time, and ultimately affect the safe operation of electric vehicles. Aiming at the problem of voltage imbalance in series battery packs, an improved balanced topology based on energy storage inductors is proposed. The basic working principle of the active balanced topology is analyzed, and the charging and discharging process of the balanced topology is theoretically derived. Finally, the simulation model of the balanced control during the charging and discharging process of the battery pack is built using MATLAB/Simulink. The simulation results show that the battery pack has a good balance effect during charging and discharging, which can provide an effective solution to the balance problem of series battery packs.

A new configuration for four-switch three-phase inverters based on aswitched-capacitor step-up cell for electric vehicles application

This paper proposes a new configuration for four-switch three-phase inverters based on a step-up switchedcapacitor cell, which is called switched-capacitor four-switch three-phase inverter (SCFSTPI). This converter includes eight power switches and two DC-link capacitors. Voltage step-up feature, high efficiency, integrated structure, and bidirectional power flow are the main contribution of this new configuration. A modified space vector modulation (SVM) strategy is presented to generate appropriate pulses for the converter. This modulation method also eliminates the effect of capacitors voltage imbalance problem on the inverter output voltage and current. Simulation and experimental results are presented and investigated to confirm the performance of this topology. Results validate the operation of the proposed topology and its modulation. SCFSTPI is applicable in electric vehicle (EV) drive systems and similar applications that need step-up inverters.

Cascaded single-phase, PWM multilevel inverter with boosted output voltage

Splitting of a dc voltage source with two capacitors has been the approach in generating 5-level output voltage with single- and three-phase full-bridge circuits and added bidirectional switch. Associated with this configuration is the problem of voltage imbalance between the splitting capacitors. In addition, the inverter output voltage magnitude is obviously limited to the value of the split input voltage source. Presented in this paper is a unit topology for single-phase 5-level multilevel inverter, MLI. It simply consists of a full-bridge circuit, a capacitor, charge-discharge unit and a dc source. The charge-discharge unit with the capacitor is the interface between the full-bridge and the dc source. The proposed unit cell can generate a 5-level output voltage waveform whose peak value is twice the input voltage value. For higher output voltage level, a cascaded structure of the developed unit cell is presented. Comparing the proposed inverter with CHB inverter and some recent developed MLI topologies, it is found that the proposed inverter configuration generates higher output voltage value, at reduced component-count, than other topologies, for a specified number of dc input voltages. For two cascaded modules, simulation and experimental verifications are carried out on the proposed inverter topology for an R-L load.&#x0D; Keywords: Cascaded multilevel, Inverter, total harmonic distortion, topologies, waveform

DC‐link capacitor voltage balance strategy of independent double three‐phase common bus five‐level NPC/H‐bridge inverter based on finite control set

This study aims at the DC-link capacitor voltage imbalance problem of independent double three-phase common bus five-level neutral point-clamped/H-bridge inverter, which is applied to an electromagnetic launch system under instant high-power and high-current conditions. First, the traditional method of voltage balance strategy based on redundant vectors is described, and the key factors leading to the DC-link capacitor voltage fluctuation is analysed in detail. Second, the objective function is constructed to predict the variation trend of DC-link capacitance voltage difference. Third, an optimised voltage balance strategy is proposed. At first, the optimised strategy calculates the variation trends of the voltage difference for all three-phase switch vector combinations. Then, the results make up a voltage balance finite control set. At last, compare the results in the set to select the vector combination corresponding to the minimum variation for output. Finally, tested by the semi-physical real-time simulation platform, and the proposed optimised voltage balance strategy is verified effective for improving DC-link capacitor voltage imbalance and inhibiting the voltage difference fluctuation.

A Gate Drive Circuit and Dynamic Voltage Balancing Control Method Suitable for Series-Connected SiC mosfets

Compared with silicon insulated-gate bipolar transistor, silicon carbide (SiC) metal–oxide–semiconductor field-effect transistor ( mosfet ) presents good features that it clearly shows on its switching and thermal performance. However, the fast switching speed of SiC mosfet makes it much more difficult for solving the dynamic voltage imbalance problem caused by the parameter fluctuations of the SiC mosfet s and drive circuits when they are connected in series. This article proposes an effective gate drive circuit and its dynamic voltage balancing control method to tackle this issue. The proposed method not only balances the dynamic voltage during high-speed switching but also adapts to the variation of the dc-bus voltage by utilization of overdrive control method (ODCM). Furthermore, to widen the control range of the ODCM, a switched-capacitor compensation method by switching and combining different drive capacitors into different values is proposed. The operation principles and the parameter design method are discussed in detail. The performance of the proposed series-connected SiC mosfet s gate drive circuit and its dynamic voltage balancing control method is validated by experimental results. The dynamic voltage can be well balanced within the design range.

A Simplified Deadbeat Based Predictive Torque Control for Three-Level Simplified Neutral Point Clamped Inverter Fed IPMSM Drives Using SVM

This paper proposes a simplified deadbeat based predictive torque control (DB-PTC) for interior permanent magnet synchronous machine (IPMSM) drives using space vector modulation (SVM). The proposed DB-PTC is implemented in stationary reference frame, which simplifies the design. It contributes to greatly diminish the torque and flux ripples by using SVM and predictions. Low computational complexity is achieved since iterative optimization is not needed in the proposed method. Moreover, one cycle delay is compensated through predictions. In addition, to further reduce the torque and flux ripples, three-level simplified neutral point clamped inverter (3L-SNPCI) is employed. It features fewer switching devices and less DC-link capacitor voltage imbalance problem compared to the other types of three-level inverters. A novel SVM scheme is proposed to fully exploit the advantages of this inverter while ensuring smooth voltage vector transition. Experimental results are provided to verify the validity of the proposed method.

Evaluation of symmetric flying capacitor multilevel inverter for grid-connected application

Grid voltage regulation and reactive power control have been revolutionized by high-voltage high-power multilevel inverters (mlis) topologies. The implementation of such inverters in statcom application make it more feasible due to its multilevel output voltage, low harmonics, high modularity, and high-power quality. However, these topologies require more number of devices which adversely affect the overall system’s size, cost, and increase the control complexity. Recently, a packed u-cell (asymmetric flying capacitor) topology has been reported in literature with more output voltage levels using minimum number of components count. The conventional packed u-cell mli utilizes dc-sources to fed ac loads. In this paper, a symmetric flying capacitor (sfc) mli is introduced for grid-connected application. The proposed topology is suitable for medium voltage high-power grid-connected applications due to low voltage rating of switches. The sfc-mli utilizes dc-capacitors instead of dc-sources, therefore the inverter suffers from voltage imbalance problem. The voltage imbalance is due to non-ideal devices, asymmetric switching losses, and/or non-linear loads. Hence the capacitor balancing is relatively challenging task due to availability of limited number of redundant switching states. A multi-stage feedback control method is proposed with level-shifted (ls) pwm technique to address this issue. Furthermore, a comprehensive comparison in terms of redundant switching states and voltage rating of switches, has been carried out to highlight the superiority of the proposed topology over the existing packed u-cell topologies. In addition, the devices count, and components losses are studied. Finally, simulated and experimental results for different scenario are presented to validate the proposed topology and its control technique.

SVM Direct Torque and Flux Control of Three-Level Simplified Neutral Point Clamped Inverter Fed Interior PM Synchronous Motor Drives

The direct torque and flux control abandons the current control approach but instead regulates the stator flux and torque directly and independently. Consequently, excellent dynamic performance can be expected from the motor drive, making it attractive for low and medium voltage applications. This paper presents a direct torque and flux controlled interior permanent magnet synchronous motor driven from a three level simplified neutral point clamped inverter. This inverter features fewer switching devices and less dc-link capacitor voltage imbalance problems due to the absence of the medium voltage vectors. A novel space vector modulation algorithm is proposed to generate the reference voltage vector for control purposes while balancing the neutral point voltage. The experimental results included verify the effectiveness of the proposed approach.