Presence Of Parasitic Components Research Articles

A single switch high gain multilevel boost converter with switched inductor topology for photovoltaic applications

This paper proposes a new transformer-less single-switch high-gain dc-dc converter for solar power systems. The suggested converter is created by supplementing the conventional boost converter with a switched inductor cell plus a voltage multiplier stage. The converter has several benefits, including a high voltage conversion ratio, reduced voltage stress on semiconducting switches and diodes, a reduction in the need for gate drivers because only one switch is used, as well as constant input current to prolong the lifespan of the photovoltaic cell. The analytical waveforms of the recommended converter can be seen in the continuous conduction mode (CCM). The analysis of voltage stress is done. In the presence of parasitic components, increased voltage gain and efficiency were also obtained.The proposed high-gain converter topology is compared to recently published high-gain converter topologies in terms of performance. Using PSIM, a high-gain dc-dc converter's performance is studied and analysed with regard to its low switching voltage stress. The suggested converter is successful in stepping up 20V to 400V at 160W power capacity, while offering a continuous input source current at 95% efficiency.

Study of the photo-adjustability of pn-junctions in photovoltaic mode coupled to photoconductors

We propose a photo-adjustable arrangement that electrically combines a pn-junction operating in photovoltaic mode to a suitably designed photoconductor in order to keep the output current, voltage, or both, fixed. The characteristic I-V curves of a pn-junction under different light intensities do not intersect each other, resulting in different operational points for a given load. However, the resistivity of the photoconductor also changes with light, and by connecting it in parallel to the photovoltaic cell, and exposing both to the same level of irradiance, it is possible to find a design that alters the I-V curves of the cell in such a way that they will intersect at a chosen point. That could offer an alternative solution for a stable supply to autonomous DC loads. This paper presents an example case for a silicon pn-junction, considering the presence of parasitic components.

Design of Highly Linear Broadband Continuous Mode GaN MMIC Power Amplifiers for 5G

In this paper, we present a design approach for broadband harmonic-tuned monolithic microwave integrated circuit (MMIC) power amplifiers (PAs). Two harmonic matching networks are proposed for the realization of continuous class-B and class-F modes in an integrated PA. A design procedure is developed for integrated PAs using these matching networks to achieve high linearity, broadband operation, and compact chip area, in the presence of parasitic components and the physical limitations of the MMIC process. Two proof-of-concept fully integrated PAs are implemented in a 0.25-μm GaN-on-SiC process. Output power of 34.2-36.4 dBm with 40% to 49% power-added efficiency (PAE) is achieved in 4.2-7.0 GHz (51.6% fractional bandwidth), from the continuous class-B PA with only 1.5-mm 2 chip area. Furthermore, the continuous class-F PA achieves 36.2 dBm output power and 52% PAE at 5.0 GHz. The PAs are also characterized using QAM signals with wide bandwidth, in order to evaluate their performance for 5G wireless applications. For a 64-QAM signal with 100-MHz bandwidth and 8 dB peak-to-average power ratio (PAPR), the continuous class-B PA achieves 29.3 dBm average output power, 28% average PAE, and -25 dB (5.5%) error vector magnitude (EVM). The continuous class-F PA, tested using a 200 MHz 256 QAM signal with 8.5 dB PAPR, provides an average output power of 28.5 dBm, average PAE of 27%, and -28 dB (4%) EVM, without any pre-distortion.

High step-up converters based on quadratic boost converter for micro-inverter

This paper proposes two DC–DC converters namely semi-tapped and fully-tapped quadratic boost converter based on the quadratic boost converter topology for high step-up applications such as micro-inverter. The proposed converters integrate the step-up capabilities of the quadratic boost converter and the tapped-inductor based converter due to which high step-up voltage gain can be achieved at lower duty ratio. Further, the proposed converters also have feature of low voltage stress on active switch. This paper presents detailed steady state analysis of proposed converters which include voltage gain and efficiency analysis with the presence of parasitic components. The theoretical analysis of proposed converters is verified by simulation and experimental results.

Process optimization of polymetal (W/WN/Polysilicon) gate and its impact on dynamic random-access memory chip performance in 0.14-µm technology

This paper summarizes the problems and solutions in the process integration and device and circuit performances of fully working, 256-megabit, dynamic random-access memory (DRAM) chips employing poly-metal gate. In the circuit analysis, an anomalous decay of the electrical signal was observed as the signal proceeds through the delays. A circuit simulation suggested the presence of parasitic components in the gate tungsten/polysilicon interface. The experiments on the tungsten-electrode formation and metal-to-gate contact formation schemes confirmed the effects of the parasitic components when the scheme employing an in-situ formation of diffusion barrier is used. The search for a new cleaning chemical for the postgate etch process was also considered in the integration because it was found to significantly affect the data-retention characteristics. Finally, the temperature dependence of the data retention of the chips employing polymetal- and polycide-gates demonstrated the results to be quite comparable to each other.