Power Amplifier Unit Research Articles

Optimizing ultra-wideband balanced power amplifiers through the selection of different output impedance transformation based on SiP techniques

In this paper, two improved ultra-wideband (UWB) balanced power amplifiers based on the flip-chip system-in-package technique and electronic design automation (EDA) are proposed. The conventional approach to system-on-chip (SoC) involves integrating all sub-circuit designs into a single manufacturing process. However, in radio frequency circuits, adopting the SoC approach necessitates intricate matching designs, leading to an increase in development costs. In this study, two types of SiGe unit power amplifiers attempted to achieve a flat S21 response using simpler matching for input/output. The cascode architecture was adopted as the main structure for the first type of unit power amplifier (type I). Subsequently, the design of the second type unit power amplifier was built upon the foundation of the first type, with the only difference being the implementation of two parallel cascode structures (type II), and the primary goal is to enhance both gain and output power compared to the first type. In addition, for this second type unit power amplifier, in conjunction with a quadrature hybrid coupler, the optimal impedance matching value was selected to maintain the flatness of gain across the entire UWB range. Furthermore, the poor performance of S11,22 of these two types of unit power amplifiers was improved by using quadrature hybrid couplers using the WIPD process combined with EDA simulation. Therefore, using flip-chip packaging technology can effectively reduce the increased wafer fabrication costs caused by complex matching designs in active circuits. This improved system has the potential to offer a new practical application for UWB power amplifier design.

Обеспечение качества функционирования блока усилителя мощности передающего устройства радиолокационных станций

The functioning of the power amplifier unit in the transmitting device of a radar station largely depends on the quality of the klystrons used in it. The issues of ensuring efficient operation of the unit by solving two problems are considered. It is necessary to control the stability of klystron parameters: filament voltage and current, control electrode and cathode currents, and others. This problem is solved by using control charts. To ensure the operation of the power amplifier block, it is necessary to be able to predict its characteristics based on the values of the klystron parameters: in this case, machine learning can be used

A Ka-Band Doherty Power Amplifier in a 150 nm GaN-on-SiC Technology for 5G Applications

This paper presents a Ka-band three-stage power amplifier for 5G communications, which has been implemented in a 150 nm GaN-on-SiC technology and adopts a Doherty architecture. The amplifier is made up of a 50 Ω input buffer, which drives a power splitter, thanks to which it delivers its output power to the two power amplifier units of the Doherty topology, namely the main and auxiliary amplifier. Finally, the outputs of the two power amplifiers are properly arranged in a current combining scheme that enables the typical load modulation of the Doherty architecture, alongside allowing power combining at the final output. The proposed amplifier achieves a small signal gain of around 30 dB at 27 GHz, while providing a saturated output power of 32 dBm, with a power-added efficiency (PAE) as high as 26% and 18% at peak and 6 dB output power back-off, respectively.

MPA isolation performance improvement in degraded mode by selective interference injection

Current Multiport Power Amplifier (MPA) architectures call for the installation of additional High Power Amplifier (HPA) units in the redundancy rings to be used when a unit fails. In the event of a unit failure beyond the MPA built-in redundancy scheme, the MPA will operate in a degraded mode with a severe impact in the MPA isolation performance that could prevent its operational use and thus may force it to be declared as failed. A novel technique is presented allowing to improve MPA isolation performance by selective interference injection from a ground station and to eventually re-establish suitable traffic conditions. This technique would help to recover an MPA that had been previously considered as lost for traffic purposes, even if partially and in the perimeter of reduced total output power.

Broadband and Integratable 2 × 2 TWT Amplifier Unit for Millimeter Wave Phased Array Radar

A novel power amplifier unit for a phased array radar with 2 × 2 output ports for a vacuum electron device is proposed. Double parallel connecting microstrip meander-lines are employed as the slow-wave circuits of a large power traveling wave tube operate in a Ka-band. The high frequency characteristics, the transmission characteristics, and the beam–wave interaction processes for this amplifier are simulated and optimized. For each output port of one channel, the simulation results reveal that the output power, saturated gain, and 3-dB bandwidth can reach 566 W, 27.5 dB, and 7 GHz, respectively. Additionally, the amplified signals of four output ports have favorable phase congruency. After fabrication and assembly, transmission tests for the 80-period model are performed preliminarily. The tested “cold” S-parameters match well with the simulated values. This type of integratable amplifier combined with a vacuum device has broad application prospects in the field of high power and broad bandwidth on a millimeter wave phased array radar.

A Fully Integrated 47.6% Fractional Bandwidth GaN MMIC Distributed Efficient Power Amplifier With Modified Input Matching and Power Splitting Network

This article presents a fully integrated distributed efficient power amplifier (DEPA) for fifth-generation (5G) massive multiple-input multiple-output (MIMO) applications. In conventional DEPA, an individual input matching network (IMN), power splitter, and phase compensation line are used for each auxiliary power amplifier (PA) unit, resulting in a large overall size. To facilitate integration, an energy-efficient and compact DEPA with modified input matching and power splitting network is proposed, where a distributed input matching network (DIMN) is used for the auxiliary PA. A broadband input matching, reasonable power splitting, and phase alignment can be achieved simultaneously by adjusting the dimensions of gate transmission lines (TLs) between different auxiliary PA units. An integrated DEPA is implemented in a commercial 0.25- μm GaN-HEMT process to validate the proposed architecture. The fabricated DEPA shows a saturated output power of 40.4-41.7 dBm, an 8-dB back-off drain efficiency (DE) of 35%-50%, and a saturated DE of 46%-56% from 3.2 to 5.2 GHz, with a compact size of 3.4×3.0 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Applying a 100-MHz orthogonal frequency division multiplexing (OFDM) signal with a 7.8-dB peak-to-average power ratio (PAPR), an average efficiency of 35.7%-47% is measured over the entire bandwidth, and the adjacent channel power ratio (ACPR) is better than -46 dBc after digital predistortion (DPD). To the best of our knowledge, the proposed DEPA demonstrates the widest bandwidth among all reported fully integrated back-off efficient PAs without using digital techniques or reconfiguration.

Design of the 3.7 GHz, 1 kW CW solid state driver for LHCD system of the SST-1 tokamak

Abstract Advances in solid state device technologies have seen its use foray into areas such as microwave heating and powering the RF cavities of an accelerator. This paper explores the possibility of use of a solid state source/driver for current drive systems of tokamaks. The design of a modular solid state source to be used as a driver for klystrons in the LHCD system of SST-1 tokamak is presented. It comprises of solid state power amplifier (SSPA) units, driven by voltage controlled oscillator (VCO) and pre-driver (gain) amplifier. The paper discusses about the design methodology and simulation of these individual components. The component and system level computer simulation based on behavioural and file based model was performed using AWR Microwave Office (MWO) software. The linear and non-linear EM analysis of individual components have been carried out to ascertain its performance. The designed VCO delivers an output power of 20.2 dBm and phase noise of -91.64 dB/Hz (100 KHz offset) at 3.7 GHz. The pre-driver stage (gain amplifier) provides a large signal gain of 15.7 dB and return loss of -14 dB at 3.7 GHz. The individual power amplifier draws a continuous wave (CW) output power of 45.2 dBm for an input power of 35 dBm and efficiency of 56.68%. The system simulation results exhibit around 1 kW of output power in ideal conditions.

АВТОМАТИЗАЦІЯ КОНТРОЛЮ ПАРАМЕТРІВ ЕЛЕКТРОДВИГУНА

The technique of the motor control technical characteristics automation is developed in the article. The control of the technical characteristics is to determine and evaluate information on deviation of the actual values from the specified ones. Quality control occupies a special place at all stages of technical products production. Efficiency of production as a whole depends on perfection of quality control, its technical equipment and organization. Automation of the control procedure allows to prevent the production of products that do not meet the requirements of standards, specifications, approved samples, design and technological documentation, while eliminating errors caused by human factors, reduces time costs, provides high reliability of control and reduces the cost of manufacturing and maintenance. The article offers a diagram of the workplace for the study of the motor technical characteristics and a mathematical model for the motor control process automation. The process of control is to compare the actual parameters of the electric motor with the parameters of its reference model. The reference model is formed on the basis of the input signals and technical parameters of the power amplifier units, the electric motor and the angular velocity sensor corresponding to the design documentation. On the difference signals of the output parameter of the reference model and the controlled sample of the motor, a rejection procedure is performed. The electric motor is represented by the first-order aperiodic link transfer function. The motion of the connection "power amplifier – motor – angular velocity sensor" is modeled by a differential equation in continuous and discrete forms. For the implementation of the reference model, the equation of state is used in a discrete form, as all the control and diagnostic procedures in the test equipment are implemented by digital computing devices. The diagnostic feature of the connection functional state is the deviation of the output parameter of the controlled motor from the output parameter of the reference model. Deviation from the reference value in excess of the tolerance is an indirect diagnostic sign of the presence of destabilizing parameters of motor. The dependence of the deviation of the output parameter on the change of the coefficient of transformation кЕM and the time constant TEM is investigated.

Effective power analysis of multi‐tone excitation transmitting system

Inter-modulation would occur when the transmitting system is under multi-tone excitation; therefore, the non-linear response of power amplifier unit should be considered in the system design. Here, by establishing non-linear theory simulation model of the transmitting system, we introduce the channel consistency factor, put forward the concept of effective jamming power, analyse the effective power of the multi-channel array transmitting system under multi-tone excitation, and carry out relevant experiments for verification, thereby providing reference for the design of multi-signal transmitting system.

A Critical Step to Using a Parametric Array Loudspeaker in Mobile Devices.

A parametric array (PA) loudspeaker is a highly directional audio source that might grant one's convenience if it is used with mobile devices. However, conventional PA loudspeakers is almost impossible to apply in mobile devices using a battery because of the large power consumption and large device size. In this study, a PA loudspeaker system (PALS) was fabricated and evaluated to show that those difficulties could be overcome to apply it to mobile devices. In order to construct a PALS for demonstration, a power amplifier and signal-processing unit should also be properly designed and built. The PA source transducer should also be designed and built for a mobile device application. These components were integrated into a single PALS. The PALS generated a 125-dB primary wave and 62 dB of a different frequency wave (DFW) through the PA at 0.45 m in a 3 m × 3 m × 2 m semi-anechoic chamber. We confirmed that the half-power bandwidth (HPBW) formed a 6° beam at 83 kHz of DFW and 90 kHz of the primary wave (PW), and the HPBW formed a 7.3° beam at 5 kHz of DFW and a 7.1° beam at 10 kHz of DFW, respectively. Lastly, the power required was 6.65 W without a matching circuit, and 3.25 W with such a circuit.

DEVELOPMENT OF MICROCONTROLLER BASED BINAURAL DIGITAL HEARING AIDS FOR HEARING-IMPAIRED PEOPLE

This research paper expounds microcontroller based binaural digital hearing aids for hearing-impaired people by making use of ATmega328 microcontroller and other circuitries to process the audio signal input by either increasing or reducing the gain level of input audio signal, filter background noise, frequencies compression, save battery power and minimize circuit by making use of the internal ADC of the microcontroller and two PMW pins of the microcontroller as DAC. Hearing impairment among the youths and adults nowadays are in the increase, due wrong use of phones of which every minute of the day someone’s earphone is on listening to one type of music or the other. In other to solve the problem created so to say this research work was conceived and given birth to. The different stages of digital hearing aid are designed and then simulated first in Proteus software which then was implemented using PCB-board. The main components of this system were the audio input unit which consists of the microphone and its pre-amplifier, the microcontroller (ATmega328) which consists of the ADC, the DAC and the audio signal processing, the filter stage and control codes (frequencies compression codes, power saver codes, acoustic feedback control codes, signal level control and adaptive adjustment codes etc.), the power amplifier and volume control unit and then the earphones (output). The control codes were written in C language while Ardinuo Uno compiler was used to write the codes into ATmega328. The prototype has an overall system gain of 27dB and the power output of 32.5mW. The prototype was tested with a patient that has a hearing impairment and the patient was satisfactory with the device. http://dx.doi.org/10.4314/njt.v36i3.34

DEVELOPMENT OF MICROCONTROLLER BASED BINAURAL DIGITAL HEARING AIDS FOR HEARING-IMPAIRED PEOPLE

This research paper expounds microcontroller based binaural digital hearing aids for hearing-impaired people by making use of ATmega328 microcontroller and other circuitries to process the audio signal input by either increasing or reducing the gain level of input audio signal, filter background noise, frequencies compression, save battery power and minimize circuit by making use of the internal ADC of the microcontroller and two PMW pins of the microcontroller as DAC. Hearing impairment among the youths and adults nowadays are in the increase, due wrong use of phones of which every minute of the day someone’s earphone is on listening to one type of music or the other. In other to solve the problem created so to say this research work was conceived and given birth to. The different stages of digital hearing aid are designed and then simulated first in Proteus software which then was implemented using PCB-board. The main components of this system were the audio input unit which consists of the microphone and its pre-amplifier, the microcontroller (ATmega328) which consists of the ADC, the DAC and the audio signal processing, the filter stage and control codes (frequencies compression codes, power saver codes, acoustic feedback control codes, signal level control and adaptive adjustment codes etc.), the power amplifier and volume control unit and then the earphones (output). The control codes were written in C language while Ardinuo Uno compiler was used to write the codes into ATmega328. The prototype has an overall system gain of 27dB and the power output of 32.5mW. The prototype was tested with a patient that has a hearing impairment and the patient was satisfactory with the device. http://dx.doi.org/10.4314/njt.v36i3.34

The Study on Resonant Multi-Frequency Array Electrical Logging System

Multi-frequency array induction logging method using a combination of high and low frequency can keep both vertical stratification and probing depth capabilities of logging instrument, and in order to reach a certain field strength in strata, the transmission circuit need provide greater current to the transmitter coil system. This paper studied resonant multi-frequency electrical logging system using resonant transmission mode, it mainly researched multi-frequency, high-frequency signal generator unit, power amplifier unit and analysed induced electromotive force calculation method of receiving coil. Combining the transmission and reception experiment, parameters such as the emission current and induced electromotive force of receiving coil have been achieved, those can verify theoretical derivation. The paper provides good design method of excitation source and analysis of receiving characteristics, at the meanwhile, it can play an important role in development and application of multi-frequency array electrical logging methods.

200 Hz repetition frequency joule-level high beam quality Nd:YAG nanosecond laser

A joule-level Nd:YAG nanosecond laser of high repetition frequency and high beam quality is developed out. The laser is designed as a MOPA system mainly including single longitudinal mode seed, pre-amplifier unit an d power amplifier unit. In order to obtain the high-quality laser beam output, phase conjugation is adopted to compensate the laser beam distortion. Under the condition of 200Hz high repetition frequency and 8.19μJ single pulse energy injected by the single longitudinal mode seed, 1.53J output energy is gained. The output laser beam is of 9mm diameter, 7.41ns pulse width, the far field beam spot 1.32 times the value of the diffraction limit, 1.2% energy stability (RMS) and less than 13μrad far field beam spot angle shift.

Performance Limits, Design and Implementation of mm-Wave SiGe HBT Class-E and Stacked Class-E Power Amplifiers

<?Pub Dtl=""?> Design equations and performance limits of Class-E power amplifiers at mm-waves, including the limitations imposed by active and passive devices in a given technology, are presented in this paper. A beyond nominal breakdown voltage Class-E design methodology for SiGe HBT power amplifiers is proposed to generate high output power while maintaining high Class-E efficiency. A mm-wave SiGe stacked Class-E architecture is also introduced to increase the overall voltage swing, with each series stacked device operating in the beyond nominal breakdown mode. The mm-wave beyond <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$BV_{\rm CEO}$</tex></formula> operation of SiGe HBTs has been demonstrated experimentally in an integrated 45 GHz Class-E power amplifier fabricated in a 0.13 µm SiGe BiCMOS process with 20 dBm measured output power at 31.5% peak power-added efficiency (PAE). The series stacking of mm-wave Class-E power amplifier concept is also verified by fabricating double-stacked and triple-stacked SiGe HBT power amplifiers in 0.13 µm SiGe BiCMOS process which demonstrate a measured output power of 23.4 dBm at 41 GHz with peak PAE of 34.9%. High power, highly efficient, switching power amplifier unit cells presented in this paper can facilitate realization of efficient Watt-level mm-wave digital polar transmitters.

Flow Rate and Graphite Foam Thermal Management for a Power Amplifier Array

Computational fluid dynamics software has been extensively employed in the design of thermal management systems for electronics. There continues to be a need for experimental evaluation of thermal management systems to validate the results of the computational fluid dynamics simulations. This primarily experimental research explores several heat transfer enhancing inserts for a liquid cooled base plate channel design applied to an array of generic power amplifier units. Several different channel insert configurations (both geometric and material type) are investigated as miniheat exchangers using both copper fins and graphite foam. Experimental data were recorded measuring the chip temperatures as a function of volume flow rate. Computational fluid dynamics simulations were also conducted to guide the experimental program. This work has a focus on the volume flow rate impact on the thermal management of a tightly packed array of power amplifiers using liquid cooling.

Foam, Fin, and Nanoparticle Thermal Management of Power Amplifiers Using Liquid Cooling

This work explores several variations of a liquid cooled base plate channel design for a high packing density array of generic power amplifier units. Several different channel insert configurations are investigated as mini-heat exchangers using graphite foam, copper fins or nanoparticles dispersed within the cooling fluid. Experiments were conducted measuring the chip temperatures as a means of determining the effectiveness of the various cooling schemes. CFD simulations were conducted to guide the experimental program. Effective heat transfer coefficients were also reverse-engineered using CFD software and the experimental results. The results presented are useful for thermal designers seeking effective thermal management alternatives and which may be most effective for a given application.

Thermal Management of a High Packing Density Array of Power Amplifiers Using Liquid Cooling

The increasing demand for smaller more compact electronic systems as well as the need to handle higher levels of power dissipation has lead to an increase in necessity for more innovative cooling designs. In recent years, computational fluid dynamics (CFD) software has been used extensively in the design of thermal control systems for electronics. In many cases, there remains a need for experimental evaluation of cooling systems in order to validate the results of the CFD simulations. The present work investigates several variations of a liquid cooled base plate channel design for an array of generic power amplifier units. Several different channel insert configurations are investigated as miniheat exchangers using both copper fins and graphite foam. Experiments were conducted measuring the chip temperatures as well as the inlet liquid temperature. CFD simulations were also conducted to guide the experimental program. Effective heat transfer coefficients were also reverse-engineered using CFD software and the experimental results.

Temperature Independent Biasing을 사용한 DTV 중계기용 100Watt급 단위 전력증폭기의 구현

본 논문에서는 DTV 중계기용 Temperature Independent Biasing을 이용한 100 watt급 단위 전력증폭기를 설계한 후, 제작하였다. <TEX>$20^{\circ}C$</TEX>에서 <TEX>$100^{\circ}C$</TEX>까지의 온도변화에 대하여 단위 전력증폭기의 DC 동작점은 능동 바이어스에 의해서 고정되며, 증폭기의 소모전류의 변화량이 0.6A 이하의 우수한 특성을 얻었다. 제작된 단위 전력증폭기는 12dB 이상의 이득, <TEX>$\pm$</TEX>0.5dB 이하의 이득 평탄도, DTV 중계 주파수범위(470-806 MHz)에 걸쳐 15dB 이하의 입.출력 반사손실을 나타내었다. 100 Watt 단위 전력증폭기는 출력 전력이 100 watt일 때 2MHz의 오프셋에서 32dBc 이상의 상호 변조 왜곡(IMD)을 나타내었다. In this paper, the 100 watt unit ower amplifier using temperature independent biasing for DTV (Digital Television) repeater application is designed and fabricated. The DC operation point of this unit power amplifier at temperature variation from <TEX>$20^{\circ}C$</TEX> to <TEX>$100^{\circ}C$</TEX> is fixed by active bias circuit. The variation of current consumption in the 100 watt unit power amplifier has an excellent characteristics of less than 0.6A. The implemented unit power amplifier has the gain over 12dB, the gain flatness of less than 0.5dB and input and output return, loss of than 15dB over the DTV repeater frequency range (470~806MHz). This unit power amplifier yields intermodulation distortion(IMD) of more than 32dBc at 2MHz offset, which satisfies the IMD at output power of 100 watt (50dBm).

RF Power System for the Separated-Orbit Cyclotron Experiment

The SOCE is designed with 11 radio frequency cavities (injector - 3, buncher - 2, SOC - 6), each requiring up to 15 kW of rf drive power under full beam loading. A separate three-stage power amplifier unit using an Eimac 4CW25, 000A tetrode as the final amplifier is provided for each cavity. Each unit is provided with automatic servo tuning, and with precise phase and amplitude regulation. A master signal generator supplies a common 50-MHz drive signal, which also serves as the phase reference. Although requirements vary from one cavity to another, all power amplifier units are identical and connected to a single set of dc power supplies and controls. The components were designed conservatively so that the rf system could be operated at greatly increased power levels for high intensity beam studies, with only the addition of an auxiliary dc plate power supply. Most of the design features in the SOCE's multiple-amplifier radio frequency system will be directly applicable to later SOC-type accelerators, even for a much higher total rf power requirement.