Post-quantum Cryptographic Algorithms Research Articles

Enhancing Blockchain Security and Efficiency through FPGA-Based Consensus Mechanisms and Post-Quantum Cryptography

Introduction: Blockchain technology has revolutionized data management and transaction recording, extending its application beyond cryptocurrencies to various sectors, including Central Bank Digital Currencies (CBDCs) Method: This distributed ledger technology offers a transparent, immutable, and secure transaction platform, reducing the risk of data tampering and increasing resistance to attacks. However, challenges such as performance, scalability, and security continue to exist; these challenges are particularly concerning consensus mechanisms like Proof of Work (PoW). Field-Programmable Gate Arrays (FPGAs) present a promising solution to enhance the efficiency and security of blockchain consensus mechanisms. Result: This study explores the implementation of blockchain in embedded systems using FPGAs and discusses the post-quantum cryptographic algorithms to ensure long-term protection. Conclusion: The research highlights the potential of FPGA-based implementations to revolutionize blockchain applications, emphasizing the need for continuous adaptation and vigilance to address evolving security threats, particularly those posed by quantum computing.

Lightweight ASIP Design for Lattice-Based Post-quantum Cryptography Algorithms

Lightweight ASIP Design for Lattice-Based Post-quantum Cryptography Algorithms

An Example of Parallel Merkle Tree Traversal: Post-Quantum Leighton-Micali Signature on the GPU

The hash-based signature (HBS) is the most conservative and time-consuming among many post-quantum cryptography (PQC) algorithms. Two HBSs, LMS and XMSS, are the only PQC algorithms standardised by the National Institute of Standards and Technology (NIST) now. Existing HBSs are designed based on serial Merkle tree traversal, which is not conducive to taking full advantage of the computing power of parallel architectures such as CPUs and GPUs. We propose a parallel Merkle tree traversal (PMTT), which is tested by implementing LMS on the GPU. This is the first work accelerating LMS on the GPU, which performs well even with over 10,000 cores. Considering different scenarios of algorithmic parallelism and data parallelism, we implement corresponding variants for PMTT. The design of PMTT for algorithmic parallelism mainly considers the execution efficiency of a single task, while that for data parallelism starts with the full utilisation of GPU performance. In addition, we are the first to design a CPU-GPU collaborative processing solution for traversal algorithms to reduce the communication overhead between CPU and GPU. For algorithmic parallelism, our implementation is still 4.48 × faster than the ideal time of the state-of-the-art traversal algorithm. For data parallelism, when the number of cores increases from 1 to 8192, the parallel efficiency is 78.39%. In comparison, our LMS implementation outperforms most existing LMS and XMSS implementations.

A lightweight hardware implementation of CRYSTALS-Kyber

The security of cryptographic algorithms based on integer factorization and discrete logarithm will be threatened by quantum computers in future. Since December 2016, the National Institute of Standards and Technology (NIST) has begun to solicit post-quantum cryptographic (PQC) algorithms worldwide. CRYSTALS-Kyber was selected as the standard of PQC algorithm after 3 rounds of evaluation. Meanwhile considering the large resource consumption of current implementation, this paper presents a lightweight architecture for ASICs and its implementation on FPGAs for prototyping. In this implementation, a novel compact modular multiplication unit (MMU) and compression/decompression module is proposed to save hardware resources. We put forward a specially optimized schoolbook polynomial multiplication (SPM) instead of number theoretic transform (NTT) core for polynomial multiplication, which can reduce about 74% SLICE cost. We also use signed number representation to save memory resources. In addition, we optimize the hardware implementation of the Hash module, which cuts off about 48% of FF consumption by register reuse technology. Our design can be implemented on Kintex-7 (XC7K325T-2FFG900I) FPGA for prototyping, which occupations of 4777/4993 LUTs, 2661/2765 FFs, 1395/1452 SLICEs, 2.5/2.5 BRAMs, and 0/0 DSP respective of client/server side. The maximum clock frequency can reach at 244 ​MHz. As far as we know, our design consumes the least resources compared with other existing designs, which is very friendly to resource-constrained devices.

A fast NTRU software implementation based on 5-way TMVP

The fast and efficient operation of post-quantum cryptographic algorithms has become an important research topic, especially with the recent developments and the process of the PQC Standardization Project by NIST. Various algorithms based on lattices are chosen to be finalists in this project. Number Theoretic Transform (NTT), Toom–Cook, Karatsuba, and Toeplitz matrix–vector product (TMVP) are considered in order to efficiently perform multiplications in quotient polynomial rings required by the cryptographic schemes based on lattices. In this paper, we propose a 5-way split TMVP-based algorithm for multiplication in polynomial quotient rings and determine its computational complexity. The new algorithm is derived from a 5-term polynomial multiplication algorithm using 13 multiplications with coefficients of only 1 or -1 that provide efficiency. We also implement it for all parameter sets of NTRU. The results show that we have up to 34%, 35%, and 157% speed-up against Toom4-Karatsuba implementation in key generation, encapsulation, and decapsulation, respectively.

Lightweight Computational Complexity Stepping Up the NTRU Post-Quantum Algorithm Using Parallel Computing

The Nth-degree Truncated polynomial Ring Unit (NTRU) is one of the famous post-quantum cryptographic algorithms. Researchers consider NTRU to be the most important parameterized family of lattice-based public key cryptosystems that has been established to the IEEE P1363 standards. Lattice-based protocols necessitate operations on large vectors, which makes parallel computing one of the appropriate solutions to speed it up. NTRUEncrypt operations contain a large amount of data that requires many repetitive arithmetic operations. These operations make it a strong candidate to take advantage of the high degree of parallelism. The main costly operation that is repeated in all NTRU algorithm steps is polynomial multiplication. In this work, a Parallel Post-Quantum NTRUEncrypt algorithm called PPQNTRUEncrypt is proposed. This algorithm exploits the capabilities of parallel computing to accelerate the NTRUEncrypt algorithm. Both analytical and Apache Spark simulation models are used. The proposed algorithm enhanced the NTRUEncrypt algorithm by approximately 49.5%, 74.5%, 87.6%, 92.5%, 93.4%, and 94.5%, assuming that the number of processing elements is 2, 4, 8, 12, 16, and 20 respectively.

A Programmable Crypto-Processor for National Institute of Standards and Technology Post-Quantum Cryptography Standardization Based on the RISC-V Architecture

The advancement of quantum computing threatens the security of conventional public-key cryptosystems. Post-quantum cryptography (PQC) was introduced to ensure data confidentiality in communication channels, and various algorithms are being developed. The National Institute of Standards and Technology (NIST) has initiated PQC standardization, and the selected algorithms for standardization and round 4 candidates were announced in 2022. Due to the large memory footprint and highly repetitive operations, there have been numerous attempts to accelerate PQC on both hardware and software. This paper introduces the RISC-V instruction set extension for NIST PQC standard algorithms and round 4 candidates. The proposed programmable crypto-processor can support a wide range of PQC algorithms with the extended RISC-V instruction set and demonstrates significant reductions in code size, the number of executed instructions, and execution cycle counts of target operations in PQC algorithms of up to 79%, 92%, and 87%, respectively, compared to RV64IM with optimization level 3 (-O3) in the GNU toolchain.

A novel homomorphic polynomial public key encapsulation algorithm

Background: One of the primary drivers in development of novel quantum-safe cryptography techniques is the ongoing National Institute of Standards and Technology (NIST) Post-Quantum Cryptography (PQC) competition, which aims to identify quantum-safe algorithms for standardization. Although NIST has recently announced candidates to be standardized, the development of novel PQC algorithms remains desirable to address the challenges of quantum computing. Furthermore, to enhance security and improve performance. Methods: This paper introduces a novel public key encapsulation algorithm that incorporates an additional layer of encryption during key construction procedure, through a hidden ring. This encryption involves modular multiplication over the hidden ring using a homomorphism operator that is closed under addition and scalar multiplication. The homomorphic encryption key is comprised of two values - one used to create the hidden ring and the other to form an encryption operator. This homomorphic encryption can be applied to any polynomials during key construction over a finite field with their coefficients considered private. Particularly, the proposed homomorphic encryption operator can be applied to the public key of the Multivariate Public Key Cryptography schemes (MPKC) to hide the structure of its central map construction. Results: This paper presents a new variant of the MPKC with its public key encrypted using the proposed homomorphic operator. This novel scheme is called the Homomorphic Polynomial Public Key (HPPK) algorithm, which simplifies MPKC central map to two multivariate polynomials constructed from polynomial multiplications. The HPPK algorithm employs a single polynomial vector for the plaintext and a multi-variate noise vector associated with the central map. In contrast, in MPKC, a single multivariate vector is created by segmenting the secret plaintext over a small finite field. The HPPK algorithm is Indistinguishability Under Chosen-Plaintext Attack (IND-CPA) secure, and its classical complexity for cracking is exponential in the size of the prime field GF(p).

A Comparative Study of Post-Quantum Cryptographic Algorithm Implementations for Secure and Efficient Energy Systems Monitoring

The Internet of Things (IoT) has assumed a pivotal role in the advancement of communication technology and in our daily lives. However, an IoT system such as a smart grid with poorly designed topology and weak security protocols might be vulnerable to cybercrimes. Exploits may arise from sensor data interception en route to the intended consumer within an IoT system. The increasing integration of electronic devices interconnected via the internet has galvanized the acceptance of this technology. Nonetheless, as the number of users of this technology surges, there must be an aligned concern to ensure that security measures are diligently enforced within IoT communication systems, such as in smart homes, smart cities, smart factories, smart hospitals, and smart grids. This research addresses security lacunae in the topology and configuration of IoT energy monitoring systems using post-quantum cryptographic techniques. We propose tailored implementations of the Rivest–Shamir–Adleman (RSA), N-th degree Truncated Polynomial Ring Units (NTRU), and a suite of cryptographic primitives based on Module Learning With Rounding (Saber) as post-quantum cryptographic candidate algorithms for IoT devices. These aim to secure publisher–subscriber end-to-end communication in energy system monitoring. Additionally, we offer a comparative analysis of these tailored implementations on low-resource devices, such as the Raspberry Pi, during data transmission using the Message Queuing Telemetry Transport (MQTT) protocol. Results indicate that the customized implementation of NTRU outperforms both SABER and RSA in terms of CPU and memory usage, while Light SABER emerges as the front-runner when considering encryption and decryption delays.

First end‐to‐end PQC protected DPU‐to‐DPU communications

AbstractThe appearance of quantum computing in the short foreseeable future and its capability to break conventional cryptographic algorithms forces to change the paradigm of secure real‐time communications. Thus, government organizations, data centers, and enterprises among others are migrating their public key infrastructure towards using post‐quantum cryptography (PQC) algorithms in order to mitigate the security threats posed by quantum computers. This letter presents the first quantum resilient secure end‐to‐end communication link based on PQC algorithms operating between two data‐processing units DPU. Both data‐processing units employ on‐board ARM processors to perform the computationally expensive cryptographic building blocks—in that case CRYSTALS‐Kyber as a key encapsulation mechanism and CRYSTALS‐Dilithium for digital signature scheme in combination with advanced encryption standard with 256‐bit key.

Error Detection Schemes Assessed on FPGA for Multipliers in Lattice-Based Key Encapsulation Mechanisms in Post-Quantum Cryptography

Advances in quantum computing have brought the need for developing public-key cryptosystems secure against attacks potentially enabled by quantum computers. In late 2017, the National Institute of Standards and Technology (NIST) launched a project to standardize one or more quantum computer-resistant public-key cryptographic algorithms. Among the main post-quantum algorithm classes, lattice-based cryptography is believed to be quantum-resistant. The standardization efforts including that of the NIST which will be concluded in 2022-2024 also affirm the importance of such algorithms. In this work, we propose error detection schemes for lattice-based key encapsulation mechanisms (KEMs). As our case study, we apply such schemes to the hardware accelerators for three post-quantum cryptographic algorithms that have advanced to the third round of the NIST PQC standardization process, i.e., FrodoKEM, Saber, and NTRU. The merit of the proposed schemes is that they can be applied to other applications and cryptographic algorithms that use multiplications in their hardware accelerators. The schemes proposed in this paper are based on recomputing with shifted, negated, and scaled operands. Moreover, we implement our fault detection schemes on field-programmable gate array (FPGA) family Kintex Ultrascale+ device xcku5p-sfvb784-1LV-i to benchmark the overheads induced and the performance degradation of the proposed approaches when added to the original architectures. The results show acceptable overhead and high error coverage for all three studied NIST PQC finalists.

Side-channel attacks on CRYSTALS-KYBER, countermeasures and comparison with SKELYA (DSTU 8961-2019)

Although the mathematical problems used in post-quantum cryptography algorithms appear to be mathematically secure, a class of attacks known as side-channel attacks may prove to be a threat to the security of such algorithms. Side-channel attacks affect the hardware on which the cryptographic algorithm runs, they are not attacks on the algorithm itself.
 The good news is that side-channel analysis on new post-quantum cryptographic algorithms started early, even before the algorithms were standardized, given that older algorithms still face side-channel problems.
 Kyber is a lattice-based post-quantum algorithm based on the complexity of the M-LWE problem. Kyber offers a secure public key encryption (PKE) scheme against a chosen plaintext attack (CPA) and a secure key encapsulation mechanism against a chosen ciphertext attack (CCA).
 This paper provides a study of side-channel and fault-injection attacks on lattice-based schemes, with focus on the Kyber (KEM).
 Considering the wide range of known attacks, the protection of the algorithm requires the implementation of individual countermeasures. The paper presents and tests a number of countermeasures capable of providing/improving protection against existing SCA/FIA for Kyber KEM.
 The obtained results show that the presented countermeasures incur a reasonable performance cost. Therefore, the use of special countermeasures in real implementations of lattice-based schemes, either alone or as an augmentation of general countermeasures, is necessary.

Efficient GPU Implementations of Post-Quantum Signature XMSS

The National Institute of Standards and Technology (NIST) approved XMSS as part of the post-quantum cryptography (PQC) development effort in 2018. XMSS is currently one of only two standardized PQC algorithms, but its performance limits its use. For example, the fastest record for some standardized parameters still takes more than a minute to generate a keypair. In this article, we present the first GPU implementation for XMSS and its variant XMSS <inline-formula><tex-math notation="LaTeX">$^{\mathsf {MT}}$</tex-math></inline-formula> . The high parallelism of GPUs is especially effective for reducing latency in key generation and improving throughput for signing and verifying. In order to meet various application scenarios, we provide three parallel XMSS schemes: <i>algorithmic parallelism</i> , <i>multi-keypair data parallelism</i> , and <i>single-keypair data parallelism</i> . For these schemes, we design custom parallel strategies that use more than 10,000 cores for all parameters provided by NIST. In addition, we analyze the availability of most previous serial optimizations and explore numerous techniques to fully exploit GPU performance. Our evaluations are made with the XMSSMT-SHA2_20/2_256 parameter set on a GeForce RTX 3090. The result shows the key generation latency is 3.20 ms, a speedup of 21,899× compared to the GPU ported version, which is also 54× speedup faster than the fastest work (174 ms). When 16384 tasks are executed, the throughput (task/s) for signing/verifying in the single-key and multi-key cases is 311,424/415,100 and 145,100/419,887, respectively. Compared to the throughput for signing/verifying (1695/4000) of the fastest work, we obtain a speedup of 184×/104× and 86×/105× in single-key and multi-key cases, respectively.

Accelerating Falcon Post-Quantum Digital Signature Algorithm on Graphic Processing Units

Since 2016, the National Institute of Standards and Technology (NIST) has been performing a competition to standardize post-quantum cryptography (PQC). Although Falcon has been selected in the competition as one of the standard PQC algorithms because of its advantages in short key and signature sizes, its performance overhead is larger than that of other lattice-based cryptosystems. This study presents multiple methodologies to accelerate the performance of Falcon using graphics processing units (GPUs) for server-side use. Direct GPU porting significantly degrades performance because the Falcon reference codes require recursive functions in its sampling process. Thus, an iterative sampling approach for efficient parallel processing is presented. In this study, the Falcon software applied a fine-grained execution model and reported the optimal number of threads in a thread block. Moreover, the polynomial multiplication performance was optimized by parallelizing the number-theoretic transform (NTT)-based polynomial multiplication and the fast Fourier transform (FFT)-based multiplication. Furthermore, dummy-based parallel execution methods have been introduced to handle the thread divergence effects. The presented Falcon software on RTX 3090 NVIDA GPU based on the proposed methods with Falcon-512 and Falcon-1024 parameters outperform at 35.14, 28.84, and 34.64 times and 33.31, 27.45, and 34.40 times, respectively, better than the central processing unit (CPU) reference implementation using Advanced Vector Extensions 2 (AVX2) instructions on a Ryzen 9 5900X running at 3.7 GHz in key generation, signing, and verification, respectively. Therefore, the proposed Falcon software can be used in servers managing multiple concurrent clients for efficient certificate verification and be used as an outsourced key generation and signature generation server for Signature as a Service (SaS).

Post-quantum cryptographic algorithm identification using machine learning

This research presents a study on the identification of post-quantum cryptography algorithms through machine learning techniques. Plain text files were encoded by four post-quantum algorithms, participating in NIST's post-quantum cryptography standardization contest, in ECB mode. The resulting cryptograms were submitted to the NIST Statistical Test Suite to enable the creation of metadata files. These files provide information for six data mining algorithms to identify the cryptographic algorithm used for encryption. Identification performance was evaluated in samples of different sizes. The successful identification of each machine learning algorithm is higher than a probabilistic bid, with hit rates ranging between 73 and 100%.

The Future of Cybersecurity in the Age of Quantum Computers

The first week of August 2022 saw the world’s cryptographers grapple with the second shocker of the year. Another one of the four post-quantum cryptography (PQC) algorithms selected by the NIST (National Institute of Standards and Technology) in a rigorous 5-year process was cracked by a team from Belgium. They took just 62 min and a standard laptop to break the PQC algorithm to win a USD 50,000 bounty from Microsoft. The first shocker came 6 months earlier, when another of the NIST finalists (Rainbow) was taken down. Unfortunately, both failed PQC algorithms are commercially available to consumers. With 80 of the 82 PQC candidates failing the NIST standardization process, the future of the remaining two PQC algorithms is, at best, questionable, placing the rigorous 5-year NIST exercise to build a quantum-safe encryption standard in jeopardy. Meanwhile, there is no respite from the quantum threat that looms large. It is time we take a step back and review the etiology of the problem de novo. Although state-of-the-art computer security heavily relies on cryptography, it can indeed transcend beyond encryption. This paper analyzes an encryption-agnostic approach that can potentially render computers quantum-resistant. Zero-vulnerability computing (ZVC) secures computers by banning all third-party permissions, a root cause of most vulnerabilities. ZVC eliminates the complexities of the multi-layered architecture of legacy computers and builds a minimalist, compact solid-state software on a chip (3SoC) that is robust, energy-efficient, and potentially resistant to malware as well as quantum threats.

Post Quantum Design in SPDM for Device Authentication and Key Establishment

The Security Protocol and Data Model (SPDM) defines a set of flows whose purpose includes the authentication of a computing device’s hardware identity. SPDM also allows for the creation of a secure session wherein data communication between two devices has both confidentiality and integrity protection. The present version of SPDM, namely version 1.2, relies upon traditional asymmetric cryptographic algorithms, and these algorithms are known to be vulnerable to quantum attacks. This paper describes the means by which support for post-quantum (PQ) cryptography can be added to the SPDM protocol in order to prepare SPDM for the upcoming world of quantum computing. As part of this paper, we examine the SPDM 1.2 protocol and discuss various aspects of using PQC algorithms, including negotiation of the use of post-quantum cryptography (PQC) algorithms, support for device identity reporting, mechanisms for device authentication, and establishing a secure session. We consider so-called “hybrid modes” where both classical and PQC algorithms are used to achieve security properties, especially given the fact that these modes are important during the transition period from the classical to the quantum computing regime. We also share our experience with implementing a software embodiment of PQC in SPDM, namely “PQ-SPDM”, and we provide benchmarks that evaluate a subset of the winning NIST PQC algorithms.

Transitioning organizations to post-quantum cryptography.

Quantum computers are expected to break modern public key cryptography owing to Shor's algorithm. As a result, these cryptosystems need to be replaced by quantum-resistant algorithms, also known as post-quantum cryptography (PQC) algorithms. The PQC research field has flourished over the past two decades, leading to the creation of a large variety of algorithms that are expected to be resistant to quantum attacks. These PQC algorithms are being selected and standardized by several standardization bodies. However, even with the guidance from these important efforts, the danger is not gone: there are billions of old and new devices that need to transition to the PQC suite of algorithms, leading to a multidecade transition process that has to account for aspects such as security, algorithm performance, ease of secure implementation, compliance and more. Here we present an organizational perspective of the PQC transition. We discuss transition timelines, leading strategies to protect systems against quantum attacks, and approaches for combining pre-quantum cryptography with PQC to minimize transition risks. We suggest standards to start experimenting with now and provide a series of other recommendations to allow organizations to achieve a smooth and timely PQC transition.

Secure IoT in the Era of Quantum Computers-Where Are the Bottlenecks?

Recent progress in quantum computers severely endangers the security of widely used public-key cryptosystems and of all communication that relies on it. Thus, the US NIST is currently exploring new post-quantum cryptographic algorithms that are robust against quantum computers. Security is seen as one of the most critical issues of low-power IoT devices—even with pre-quantum public-key cryptography—since IoT devices have tight energy constraints, limited computational power and strict memory limitations. In this paper, we present, to the best of our knowledge, the first in-depth investigation of the application of potential post-quantum key encapsulation mechanisms (KEMs) and digital signature algorithms (DSAs) proposed in the related US NIST process to a state-of-the-art, TLS-based, low-power IoT infrastructure. We implemented these new KEMs and DSAs in such a representative infrastructure and measured their impact on energy consumption, latency and memory requirements during TLS handshakes on an IoT edge device. Based on our investigations, we gained the following new insights. First, we show that the main contributor to high TLS handshake latency is the higher bandwidth requirement of post-quantum primitives rather than the cryptographic computation itself. Second, we demonstrate that a smart combination of multiple DSAs yields the most energy-, latency- and memory-efficient public key infrastructures, in contrast to NIST’s goal to standardize only one algorithm. Third, we show that code-based, isogeny-based and lattice-based algorithms can be implemented on a low-power IoT edge device based on an off-the-shelf Cortex M4 microcontroller while maintaining viable battery runtimes. This is contrary to much research that claims dedicated hardware accelerators are mandatory.

Analysing the potential of transport triggered architecture for lattice-based cryptography algorithms

Lattice-based structures offer numerous possibilities for post-quantum cryptography. Recently, many post-quantum cryptography algorithms have been built on hard lattice problems. The three of the remaining four algorithms in the final round of the NIST Standardization Process rely on lattice-based methods. However, suitable processor architectures for these algorithms have not been sufficiently investigated. This study examines the potential advantages of transport triggered architecture for these algorithms. We compare popular 64-bit RISC-V processors with our conceptual transport triggered architecture processor over reference software implementations. Our processor provides better results than RISC-V competitors, regardless of the algorithm. It seems to be up to 3× faster, 1.6×-2× smaller, and consumes 1.3×-3.6× less energy than the compared RISC-V cores. Thus, an alternative base architecture is proposed for post-quantum cryptography processor development for embedded systems. The most critical shortcoming of the proposed architecture is the lack of compatible intellectual property core support for system-on-chip designs. We share comparative analyses with test results for different core configurations.