Polygonal Voltage Space Vector Structure Research Articles

Modulating Wave-Based Timing Calculation for a Multilevel 24-Sided Polygonal Voltage Space Vector Structure With Similar Triangles

This article proposes a multilevel 24-sided polygonal voltage space vector structure (VSVS), eliminating lower order harmonics up to 19th order and suppressing higher order harmonics in motor phase voltage throughout the modulation range. Unlike switched average vectors in literature, the proposed scheme generates real active vectors that have the advantage of less switching frequency operation. The proposed VSVS consists of two concentric polygons divided into similar triangles resulting in a simple modulation algorithm. Instantaneous error in phase voltage reduces due to the multilevel property of the proposed VSVS. The proposed scheme extends the dc bus utilization and linear range of operation. The proposed scheme is implemented on an open-end winding induction motor fed with primary and secondary inverters from either end. This article also presents a modulating wave-based method to compute nearest vector timings using sampled reference waves only. Unlike conventional methods, the proposed timing calculation method does not require trigonometric operations, sorting algorithms, and iterative search algorithms. Experimental verification of the proposed scheme is performed to validate the concept. Switching loss and Fourier analysis comparison with some existing schemes is also presented.

A Fault-Tolerant Inverter Circuit to Generate Thirteen-Level 24-Sided Voltage Space Vector Structure for Open-End Winding Induction Motor Drive

An inverter circuit to generate a 13-level 24-sided polygonal voltage space vector structure (VSVS) comprised of 288 real active vectors and a zero vector is proposed in this article. The proposed scheme eliminates lower order harmonics up to 19th order and suppresses higher order harmonics from motor phase voltage in the full modulation range. The 48-step operation of the proposed scheme highly improves phase voltage quality at full speed. The dc bus utilization of the proposed scheme is improved to 99.42% compared to 90.6% multilevel hexagonal VSVS. The proposed topology has inherent capacitor balancing in every sampling interval at any loading condition using pole voltage redundancies. Multilevel property of the proposed scheme reduces instantaneous error in phase voltage compared to two-level 24-sided polygonal VSVS. Generation of real active vectors reduces instantaneous error in phase voltage and reduces switching frequency compared to switched average techniques existing in the literature. Fault-tolerant feature of the proposed scheme improves the availability of the drive system. Experimental results are provided to validate the steady-state operation, capacitor balancing, transient performance, and fault-tolerant capability of the proposed scheme. The comparison of switching loss and harmonic performance of the proposed scheme is performed with existing topologies.

A Fault-Tolerant 24-Sided Voltage Space Vector Structure for Open-End Winding Induction Motor Drive

This article proposes a method of generating 24-sided polygonal voltage space vector structure composed of 24 real active vectors and a zero vector. Each active vector is a real vector in contrast to switched average vectors in literature. Generation of real 24-sided vectors minimizes switching losses and improves quality of phase voltage compared to switched averaged vectors technique. An important feature of the presented scheme is elimination of lower order harmonics up to 19th order from motor phase voltage throughout the modulation range that gives reduction in torque pulsation and near sinusoidal phase current. The proposed scheme extends the linear modulation range till 99.42 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\%$</tex-math></inline-formula> . Open-end winding induction motor is fed with primary and secondary inverters from either ends. Primary and secondary inverters are implemented by cascading two-level inverters. DC sources for both the inverters are realized using a simple star-delta transformer combination. The proposed concepts are verified with laboratory prototype and the respective results during the steady-state, transient, and fault scenario are presented. The supporting loss analysis and harmonic performance of the proposed drive is performed with existing topologies.

A Very High Resolution 30-Sided Space Vector Generation From a Single DC-Link for Induction Motor Drives

A voltage source inverter generating a polygonal voltage space vector structure (SVS) having 117- concentric 30-sided polygons of different radii are proposed. Modulation using a 30-sided SVS eliminates lower order harmonics till 25th order from motor phase voltage. The proposed scheme combines the advantages of a 30-sided SVS with that of a multilevel inverter. The topology consists of two cascaded five-level inverters feeding from either end of the open-end induction motor stator windings. One of the cascaded five-level inverter is connected to an active dc source and delivers the required active power for the scheme, while the other is capacitor fed and acts as a switched capacitive filter. In this article, nonaligned 30-sided polygons, i.e., regular 30-sided polygons that are not symmetric with respect to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\alpha$</tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\beta$</tex-math></inline-formula> axis are also considered for inverter operation. The harmonic analysis of such nonaligned 30-sided polygons is investigated in this article. Nearest level switching is employed throughout the modulation range, enabling further reduction of switching loss in the system. Extensive hardware experimentations are carried out to validate the proposed scheme and the results are included in the article.

A Twelve Concentric Multilevel Twenty-Four Sided Polygonal Voltage Space Vector Structure for Variable Speed Drives

Generating dense multilevel voltage space structure using polygons of higher sides is one of the novel and elegant method to suppress low-order harmonics and to obtain refined sinusoidal voltages using voltage source inverters for variable frequency drive application without passive filters. Apart from the advantages of conventional multilevel inverter topologies, schemes generating polygonal voltage space vector structure can equip full dc-bus utilization, low switching frequency strategies to eliminate low-order harmonics, and increased linear modulation range. In this paper, an induction motor drive scheme generating a highly dense multilevel 24-sided polygonal voltage space vector structure using a single dc source, which can eliminate harmonics till 23rd order from phase voltages, is presented. Cascaded power circuit topology with a flying capacitor inverter fed with a dc source and two low voltage floating capacitor fed H-bridge inverters is used. Detailed experimentally validated results, under scalar as well as indirect rotor field oriented control of induction motor are provided. Studies on voltage ripple and reactive energy in various floating capacitors, harmonic performance of output voltage for wide range of speed operation, are also included.

A Switched Capacitive Filter-Based Harmonic Elimination Technique by Generating a 30-Sided Voltage Space Vector Structure for IM Drive

This paper proposes a novel polygonal voltage space vector structure (SVS) having 30 sides, for a star-connected induction motor drive. The SVS eliminates the presence of harmonics up to 25th order from motor phase voltage throughout the entire modulation range, providing a torque profile devoid of lower order pulsations. Linear modulation is extended till 99.63% of base speed without exceeding the motor phase voltage rating. Topology consists of a dc-link fed primary inverter and two equal low voltage modular capacitor fed secondary inverters. Here the harmonics generated by the primary inverter is canceled by the secondary inverter which acts as a switched capacitive filter. Detailed description of the SVS generation and timing calculations are provided in this paper. Effectiveness of the proposed scheme is validated using experimental results, inverter loss calculations, and harmonic analysis.

A 24-Sided Voltage Space Vector Based IM Drive with Low-Order Harmonic Elimination for the Full Speed Range

This paper proposes an inverter topology to generate a 24-sided polygonal voltage space vector structure for variable speed drives using a single dc source. The topology consists of a two-level inverter cascaded with two low-voltage floating capacitor-fed H-bridge cells. The 24-sided structure eliminates harmonics up to and including seventeenth and nineteenth orders from phase voltage output resulting in a smooth torque profile over the entire speed range. This structure also enhances the linear modulation range to 99.42% of the base speed. A reduced switching sequence based pulse width modulation technique achieves minimum pole voltage transitions for the two-level inverter, thereby controlling switching losses. The lower order harmonics are eliminated by switching action of low-voltage H-bridge cells. Experimental results, simulation studies on inverter losses, and harmonic performance validate the effectiveness of proposed drive scheme.

Eighteen-sided polygonal voltage space-vector-based PWM control for an induction motor drive

An inverter scheme with 18-sided polygonal voltage space-vector structure is proposed for induction motor drive applications. An open-end winding configuration is used for the drive scheme. The motor is fed from one end with a conventional two-level inverter and from the other end with a three-level inverter, realised by cascading two conventional two-level inverters. The inverters are fed with asymmetrical DC-link voltages. A simple linear PWM control scheme up to 18-step mode is proposed, based only on the motor reference phase amplitudes. The proposed scheme gives an increased modulation range with the elimination of the 5th, 7th, 11th and 13th-order harmonics, for the entire modulation range, when compared with any conventional schemes. The absence of low-order harmonics gives nearly sinusoidal currents throughout the modulation range, and makes PWM control of voltage very simple, with low inverter switching frequencies, especially in the extreme modulation range.

Multilevel inverter with 12-sided polygonal voltage space vector locations for induction motor drive

Multilevel inverters are preferred over two-level inverters in high-voltage, high-power applications mainly because low-switching-frequency PWM schemes can be implemented with power devices of low-voltage ratings. Common multilevel inverter structures such as NPC, H-bridge and flying capacitor will produce a hexagonal voltage space vector structure. In the overmodulation range a multilevel inverter with a hexagonal voltage space vector structure will produce high amplitude 5th and 7th harmonic voltages in the output voltages. The maximum phase peak fundamental voltage is 0.637 Vdc in six-step mode operation (where Vdc is the radii of the hexagonal voltage space vector structure). A 12-sided polygonal voltage space vector structure will have a maximum phase peak fundamental voltage of 0.64 Vdc in the linear modulation range itself (where Vdc is the radii of the 12-sided polygonal voltage space vector structure), which is more than the output in six-step operation in the over-modulation range for a conventional multilevel structure. Also with a 12-sided polygonal space vector structure, an additional boost of the fundamental phase voltage is possible in the 12-step operation with the elimination of the 5th- and 7th- order harmonics (6n +/- 1, n = 1, 3, 5... etc). A multilevel inverter structure with 12-sided polygonal voltage space vector structure is proposed for an induction motor drive. The proposed inverter structure is realised by cascading three conventional two-level inverters. This makes the power bus structure very simple.