Pole Voltage Research Articles

A Novel Leg-Integrated Switched Capacitor Inverter Topology for Three-Phase Induction Motor Drives

This paper presents an optimized leg-integrated switched capacitor inverter (LISCI) topology for 3-φ induction motor driven home appliance applications where a switched capacitor (SC) network, used for voltage boosting, is integrated with one of the inverter legs (phase-A leg). This results in a reduced semiconductor requirement as the voltage ratings of the phase-A switches are reduced by half. Moreover, due to the unique structure of the proposed topology, it can produce 3-level pole voltage corresponding to phase-A, even though the pole voltages of phases B and C remain 2-level. This kind of performance, referred to as quasi 3-level performance, results in an unusual space vector (SV) hexagon with 12 SVs, which is implemented by using a novel PWM method. A comparison study of the proposed topology with the existing SC based 3-φ inverter topologies reveals that the former has the lowest semiconductor requirement, highly improved harmonic performance and very low losses. All the claims are supported by experimental validations performed on a 3φ induction motor (3φIM) drive.

DYNAMIC ANALYSIS OF THE VISCOELASTIC MICROTWEEZER UNDER ELECTROSTATIC FORCES AND THERMAL FIELDS

This is the first study to examine the nonlinear dynamic behavior of a microtweezer under electrostatic forces by taking into account viscoelastic effects and linear and nonlinear thermal stresses. The van der Waals (vdW) forces and Casimir intermolecular forces have been included in order to consider more realistic assumptions. Hamilton's principle is applied to derive the nonlinear equations governing the system. A nonlinear partial differential equation has been converted into an ordinary nonlinear differential equation using the Galerkin method. The equations are numerically solved and the results are analyzed at different values of the effective parameters, such as the coefficients of the Casimir force and the vdW forces. Results indicate that the increase in the small size parameter and Casimir and vdW forces results in a decrease in the equivalent stiffness and, therefore, a decrease in the pole's voltage. In addition, the viscoelastic behavior causes a significant change in the stability behavior of the microbeams, and with an increase in damping, the resonance frequency increases by about 33%. Therefore, it is essential to take into account the effect of viscous damping when designing a microtweezer.

Improved Dual Active Bridge DC–DC Converter With Symmetric Bipolar Output by Utilizing a Switched-Capacitor Circuit for Bipolar DC Distribution System

The bipolar dc distribution system is a promising solution due to its advantages in efficiency and reliability, but there are also challenges of pole voltage imbalance. By using a simple switched-capacitor circuit, this paper presents a semi-dual active bridge converter with symmetrical bipolar output characteristics. The converter is capable of single-stage power conversion, offering the advantages of low cost and high-power conversion efficiency. Moreover, the symmetrical bipolar output voltage can be achieved without an additional voltage balancer and feedback control under unbalanced load conditions, which reduces system cost and control system complexity. In addition, the proposed converter also has a significant advantage over existing solutions in terms of the number of semiconductor devices and magnetic components. A detailed analysis of the proposed converter is presented, including the operation principle, steady-state performance, soft-switching performance, voltage gain, voltage/current stresses, efficiency and loss analysis, and control method. Finally, a 1-kW prototype is developed and tested to verify the performance of the proposed converter.

Open circuit fault diagnosis for a five-level neutral point clamped inverter in a grid-connected photovoltaic system with hybrid energy storage system

Introduction. Recently, the number of high and medium voltage applications has increased dramatically. The connection between these different applications requires series-parallel combinations of power semiconductors. Multilevel converter topologies provide major advantages to these applications. In this paper, a grid-connected photovoltaic system with a hybrid energy storage system using a five-level neutral point clamped inverter is studied. Although the multilevel inverter has many advantages over the two-level inverter, it has a high probability of experiencing an open circuit fault. In this context, the five-level inverter has 24 controllable switches, one of which may experience an open circuit fault at any time. Therefore, it plays an important part in the reliability and robustness of the whole system. The novelty of this paper presents an approach to accurately detect the open circuit fault in all insulated gate bipolar transistors of a five-level neutral point clamped inverter in a photovoltaic power generation application with a hybrid energy storage system. Purpose. Before using fault-tolerant control to ensure service continuity, fault diagnosis techniques must first be used, which are the crucial phase of reliability. Methods. A detection method based on the maximum and minimum error values is proposed. These errors are calculated using the expected and measured line-to-line pole voltages. Results. The open circuit fault detection method is implemented using MATLAB/Simulink. Simulation results showed the accuracy of detecting the open circuit fault in all insulated gate bipolar transistors in a short time. Moreover, this method is adaptable to several applications and is also robust to transient regimes imposed by solar irradiation and load variations.

A CB-PWM Technique for Eliminating CMV in Multilevel Multiphase VSI

A generalized Carrier-Based Pulse Width Modulation (CB-PWM) scheme is proposed here for the elimination of common-mode voltage (CMV) in a multilevel multiphase voltage source inverter (VSI). In this CB-PWM scheme, the switching function of x-level, q-phase VSI is obtained from the switching function of virtual y-level and (y+1) level, q-phase VSI, where y = (x+1)/2 when x is odd and y = x/2 when x is even. It is established here that the pole voltages of q-phase x-level VSI thus obtained generate zero CMV. The proposed CB-PWM technique is computationally less intensive and hence can be easily implemented in hardware. Extensive simulation and experimental results are presented to validate the proposed CMV elimination technique in 3-phase 7-level VSI, 5-phase 5-level VSI, and 6-phase 4-level VSI. A comparative study of the proposed PWM scheme with the existing technique shows the superiority of the proposed technique in eliminating CMV.

A fully balanced first order high-pass filter

The topic of this article is the design of a fully balanced first-order high-pass filter and its two circuits. The first circuit is a fully balanced current-tunability first-order high-pass filter consisting of four NPN transistors and a single capacitor, which is a simple design and quite compact. The pole frequency can be adjusted with a bias current. The results of the first circuit shows the phase and gain responses, the phase and gain responses when adjusted with a bias current, the time-domain response, and the harmonic spectrum. However, this circuit found a flaw in the temperature that affects the pole frequency, and total harmonic distortion is relatively high. Therefore, the second circuit improves defects by the CAPRIO technique to reduce the total harmonic distortion, and the resistors in the circuit are added to the design to replace the resistance and the effect of temperature on the properties of the transistor. This circuit consists of four NPN transistors, four resistors, and a single capacitor. The resistors in this circuit can be adjusted to change the pole frequency and voltage gain. The results of the second circuit show the gain and phase responses of the proposed circuits, the phase and gain responses when adjusted to the value of the resistor, the phase and gain responses at various temperatures, as well as their time-domain responses and total harmonic signal distortion. The all-pass filter is also made using the filter introduced in the second circuit because of its voltage gain-adjustable property. So, if the suggested circuit is constructed in combination with a buffer circuit to make it feasible to function as an all-pass filter, the result will be an all-pass filter. In accordance with the results of this study, we have introduced a design for a high-pass filter to reduce total harmonic distortion and the effect of temperature

Rolling Average-Decision Tree-Based Fault Detection of Neutral Point Clamped Inverters

Multilevel inverters (MLI) with many switches, which are assets for EVs and other high and medium power applications are prone to switch faults. To ensure the reliable operation of MLI, simple, effective, and automatic fault monitoring and localization techniques are warranted. This paper focus on pole voltage rolling average (RA) based generalized open switch fault detection (FD) of neutral point clamped (NPC) MLI. The RA contributes advantage of smoothing the input, thus reducing the false alarm due to switching transients and standard deviation of averaged pole voltage serves as a good fault feature to distinguish between inner and outer switch faults for single switch fault case and the correct switch pair for double switch fault case. The proposed method based on pole voltage RA is fast and load-independent and uses decision tree tuned with random search as the classification tool for 12+1 and 78+1 classes, i.e., all possible chances of single and double switch fault combinations with training accuracy of 99% and 97.5% for three- level NPC. The paper also includes an analysis of how the DT classifier is affected by overfitting as the tree's depth increases.

A Family of Symmetrical Bipolar Output Converters Based on Voltage-Multiplying Rectifiers for Interfacing Renewable Energy With Bipolar DC Microgrid

The bipolar dc microgrid system is considered a greatly promising solution to interface various renewable energy sources and emerging loads due to its advantages in efficiency and reliability. However, pole voltage imbalance and lack of superior bipolar power conversion topologies limit the development and application of bipolar DC microgrid systems. In this context, this paper proposes a family of multi-port converters based on voltage-multiplying rectifiers to achieve symmetrical bipolar output voltage and power conversion between renewable energy sources and bipolar buses. In the proposed topologies, single-stage power conversion, without voltage balance feedback control, and a low number of components are obtained. Furthermore, the bulky balancing inductor is eliminated to improve conversion efficiency and reduce the volume of the system. Moreover, the higher voltage gain, smaller input current ripple, and lower voltage stress of semiconductor devices make it ideal for interfacing renewable energy sources with bipolar DC microgrids. The derivation method for the proposed topology family is first introduced. Then, a typical topology in the proposed converter family is analyzed in detail as an example, including the operation principle, steady-state performance, parasitic parameter effects, design considerations, efficiency analysis, control method, loop designing, etc. Finally, a 1-kW prototype is developed and tested to verify the performance of the proposed converter.

0.3-V Voltage-Mode Versatile First-Order Analog Filter Using Multiple-Input DDTAs.

This paper presents a versatile first-order analog filter using differential difference transconductance amplifiers (DDTAs). The DDTA employs the bulk-driven (BD) multiple-input MOS transistors technique (MI-MOST) operating in the subthreshold region. This results in low-voltage and low-power operational capability. Therefore, the DDTA, designed using 130 nm CMOS technology from UMC in the Cadence environment, operates with 0.3 V and consumes 357.4 nW. Unlike previous works, the proposed versatile first-order analog filter provides first-order transfer functions of low-pass, high-pass, and all-pass filters within a single topology. The non-inverting, inverting, and voltage gain of the transfer functions are available for all filters. Furthermore, the proposed structure provides high-input and low-output impedance, which is required for voltage-mode circuits. The pole frequency and voltage gain of the filters can be electronically controlled. The total harmonic distortion of the low-pass filter was calculated as -39.97 dB with an applied sine wave input signal of 50 mVpp@ 50 Hz. The proposed filter has been used to realize a quadrature oscillator to confirm the advantages of the new structure.

A simplified dual-stage model predictive controller for modular multilevel converters

The Modular Multi-Level Converter (MMC) topology is suitable for use in medium and high voltage applications. To cater to the multi-objective control requirements of the MMC, several Model-Predictive Control techniques have been developed. However, most of the available MPCs do not sufficiently address the simplification of the apparently complex switching logic of the MMC in regard to its practical implementation. To fill this gap, a modulated dual stage MPC is proposed here that controls the ac output current using a few simple steps, while maintaining sufficient control over the circulating current. The two MPC controller stages are used in a cascaded manner. The first stage calculates the voltage reference for grid current control and the second stage MPC selects the appropriate switching state to ensure circulating current control. The proposed technique uses carrier-based PD-PWM to retain its superior harmonic performance and ensures 2N+1 output pole voltage levels. While avoiding use of any cost function, a generalized fixed step approach is also presented that is independent of N value. The dual stage MPC presented in this paper is executed once in every switching time period to maintain a fixed switching frequency operation. Simulation and experimental studies show satisfactory performance of 25-level and 7-level MMC respectively, in a grid connected mode. Transient case study is also shown to demonstrate fast dynamic performance of the proposed controller.

A single‐ended protection method for flexible DC distribution grid

AbstractConsidering that no current limiting inductances (CLIs) are installed at the end of the DC line in the flexible DC distribution grid, the protections relying on line boundary are no longer applicable. To overcome this problem, the paper proposes a single‐ended protection method independent of line boundary. Firstly, the Peterson equivalent circuit is applied to analyze the amplitude‐time ratio of initial voltage travelling wave (ARIVTW) under internal and external faults. Secondly, the fault direction criterion based on the fault component current and the fault type criterion based on the pole voltage are built. Subsequently, the fault identification criterion is constructed by using the ARIVTW, and the corresponding protection method is formed. Finally, the flexible DC distribution grid is built in PSCAD to verify the proposed method. The simulation results show that the method is robust to fault resistance and noise. Besides, the method realizes the protection of the whole line, which has good selectivity and engineering applicability.

A Generalized Multilevel Inverter With Extended Linear Modulation Range and Instantaneously Balanced DC-Link Series Capacitors for an Induction Motor Drive

The voltage drift control of series-connected capacitors across a single dc-link is the major challenge for a multineutral point-clamped (NPC) converter. This drifting is caused due to uneven currents drawn from the neutral points (NPs) during the PWM operation. This work presents the working principle of instantaneous voltage control of “ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$n$ </tex-math></inline-formula> ” dc-link series-connected capacitors for an induction machine load. The mechanism of instantaneous voltage balancing is realized by ensuring zero instantaneous currents at each dc-link NP. To get zero instant currents at a dc-link NP branch, the phase terminals tapping on the dc-link are manipulated with the help of cascaded hybrid bridges (CHBs). Charge balancing of CHB capacitors is also taken care of by proper utilization of pole voltage redundancies. The detailed results are presented for a small-scaled inverter (nine-level) with three NPs (four dc-link capacitors). The simulation and experimental results reflect the capability and limitations of such inverters. The results are presented at all modulation indexes operated under low-power-factor (LPF) and high-power-factor (HPF) load conditions. It is found that the linear modulation range (LMR) can be increased to full base speed even for an HPF load.

Performance Improvement of DTC-SVM of PMSM with Compensation for the Dead Time Effect and Power Switch Loss Based on Extended Kalman Filter

Two algorithms have been extensively studied for motor control: Field Oriented Control (FOC) and Direct Torque Control (DTC). Both control algorithms use a Voltage Source Inverter (VSI) to drive a Permanent Magnet Synchronous Motor (PMSM). To prevent short-arm short-circuit accidents when driving PMSM using VSI, a dead time is used to turn off the TOP and BOTTOM switches of each arm at the same time. However, this dead-time technique causes an unexpected pole voltage to be applied to the PMSM on the VSI output voltage, causing distortion and resulting in control nonlinearity. The disturbance voltage that causes nonlinearity is difficult to measure directly with the sensor. Therefore, this paper analyzes the nonlinearity of the controller due to the distorted voltage caused by the dead time during PMSM operation using the DTC algorithm and predicts the distorted output voltage using the extended Kalman Filter (EKF) to improve control stability. As a result, The algorithm proposed in this paper has verified the improvement of torque ripple and stator flux ripple through experiments and simulations.

Per-Phase Analysis, Efficient Implementation and Performance Evaluation of a 24-Sector Discontinuous PWM for Split-Phase Induction Motor Drives

Space vector-based 24-sector pulse width modulation (PWM) techniques for split-phase induction motor (SPIM) drive offer better performance than the 12-sector PWM methods; however, these methods are complex to implement. This paper analyses a space vector based 24-sector discontinuous PWM from a per-phase perspective. Analysis of three-phase average pole voltages, pertaining to this method, shows that each phase is clamped for a 60 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$^\circ$</tex-math></inline-formula> interval in each half cycle, which is divided into three sub-intervals of 15 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$^\circ$</tex-math></inline-formula> , 30 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$^\circ$</tex-math></inline-formula> and 15 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$^\circ$</tex-math></inline-formula> , respectively. The common-mode voltage is shown to be related to the fundamental voltage of one of the phases in each sector and to that of different phases in different sectors. This analysis leads to an understanding of the offset voltages to be added to the two sets of three-phase sinusoidal modulating signals for generating the equivalent modulating signals for the two inverters driving the SPIM. Further analysis of the switching sequences suggests appropriate carrier waves for the modulating signals to be compared against. The computationally efficient implementation of the 24-sector discontinuous PWM (DPWM-1), thus developed, is validated on a 6-kW laboratory prototype SPIM drive. Stator flux ripple-based analysis is used to evaluate stator current distortion and rms torque ripple of different PWM techniques. Simulated instantaneous torque ripple and torque harmonic spectra of the different techniques are compared. The proposed method offers lower THD at high speeds and lower switching loss at high power factors than the 24-sector continuous space vector PWM with significantly low computational effort.

THD Minimization under Low Switching Frequency for Superior Two Level Three Phase Inverter Performance

The total number of switching pulses permitted in one-quarter of the fundamental-cycle of an inverter is restricted due to the restrictions of switching losses in high-power inverter devices. The elimination of major low-order dominating harmonics using SHEPWM (Selective Harmonic Elimination) is suggested in this research paper. The positive or negative voltage transition at the instant where fundamental voltage has the greatest positive slope distinguishes the various types of waveforms. Due to the switching loss limitations, two forms of the pole voltage PWM waveforms i.e., type A, type B, were studied in this research at lower pulse number (P = 5). For a two-level three-phase inverter, an ideal Pulse Width Modulated (PWM) waveform is developed for whole modulation index range in terms of least total harmonic distortion (THD). MATLAB simulation and practical experiments are performed for a two-level inverter to support the theoretical analysis and results.

A New Three-Phase Inverter Topology for Reducing the dv/dt and Peak-to-Peak Value of Common Mode Voltage

Existing dc and ac bypass-assisted two-level three-φ inverter topologies can only reduce the peak-to-peak (P-to-P) common mode voltage (CMV) value by 66.6%. However, the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dv</i> / <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dt</i> of CMV remains unchanged. This issue can be easily addressed by using a multilevel inverter but it increases the size, cost, and complexity of the system. As an alternative, this article proposes a novel three-phase inverter topology where one leg (out of three) of the inverter is configured to produce three-level pole voltage while the other two legs produce two-level pole voltages. This results in a unique space vector (SV) diagram with 12 SVs, whereas a 2-level inverter has only 8 SVs. A new pulsewidth modulation scheme is proposed that can utilize the SV diagram in such a way that <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dv</i> / <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dt</i> of CMV is reduced by 50% along with a 66.6% reduction in CMV P-to-P value in each switching cycle. Another advantage of the proposed topology is the reduced conduction losses due to fewer switches conducting at any given time. The proposed topology is compared with the existing solutions to prove its advantages. Simulation and experimental results are presented for a three-phase induction motor load to validate the various claims.

A Multilevel Inverter With Inherent Common Coupling Point Voltage Balancing of Stacked Capacitors Across a Single DC-Link for Induction Motor Drives

In this article, a nine-level multilevel topology is proposed by stacking of low voltage basic inverter cells and then cascading with H-bridges. The dc-link is split into four equal halves by series-connected capacitors from a common dc-link. Three common coupling points (CCPs) are formed due to the stacking of four capacitors, which are connected across the dc-link. The CCP voltage balancing is ensured by drawing or injecting zero instantaneous currents from each of these points at any instant. A six-phase symmetrical IM is used to generate equal and opposite instantaneous phase currents by applying exactly equal and opposite phase voltages for two opposite phases from the six-phase inverter. Simultaneously, the capacitor voltage balancing of H-bridge inverter cells is also achieved by proper selection of redundancies from the available pole voltage redundancies. The concept is verified with a nine-level inverter laboratory prototype, which consists of a five-level stacked inverter, and followed by two low voltage cascaded H-bridge inverters in each phase. Detailed experimental results of steady-state and transient conditions are included to validate the proposed scheme.

Novel Method for Instantaneous Neutral Point Voltage Balancing for a Stacked Multilevel Inverter-Fed Six-Phase Induction Motor Drives

This article proposes a novel method for instantaneous neutral point (NP) balancing for a six-phase stacked multilevel inverter (MLI)-fed induction motor (IM) drive. A stacked inverter requires as many dc sources as the number of stackings. A single dc source is ensured with instantaneous NP balancing although there are two stackings of MLIs. A single dc-link enables direct back-to-back power conversion and power can be fed back to mains at the desired power factor. Instantaneous NP balancing is achieved by ensuring that at any instant, no midpoint current is drawn from the NP (dc-link capacitor midpoint). This work shows that the midpoint is used only as a tapping point to generate the different pole voltage levels and no current needs to be drawn from it. V/f experiment is conducted on a six-phase IM with a nine-level stacked MLI, which is developed by stacking two five-level inverters where each of the five-level is developed by cascading a flying capacitor with a capacitor fed cascaded H-bridge. The results ensured that the proposed method for zero instantaneous NP current is valid for both steady-state and transient conditions of a six-phase IM drive using stacked MLI.

Design of a Decoupled Sliding Mode Control for Four-Leg Distribution Static Compensator

In the conventional sliding mode control, the four-leg distribution static compensator (DSTATCOM) currents are controlled based on a current error in each phase. However, the four currents in a four-wire system can not be independently controlled variables and hence one of the four controllers is redundant in conventional schemes. Further, the current dynamics of a DSTATCOM converter are coupled through converter pole voltages in the natural reference frame. This leads to cross-coupling in the sliding variable equations with respect to four manipulated input variables. Considering the above points, in this paper, the current due to Thevenin’s equivalent load neutral-point voltage is considered as a fourth independent controlled variable and the corresponding system dynamic equations are presented. To get a decoupled feature, a new sliding surface function is structured. The performance of a DSTATCOM with the proposed control scheme under various operating conditions is validated through a detailed simulation study and experimental results, obtained from a laboratory prototype of four-leg DSTATCOM.

A Fault-Tolerant Inverter Circuit to Generate Thirteen-Level 24-Sided Voltage Space Vector Structure for Open-End Winding Induction Motor Drive

An inverter circuit to generate a 13-level 24-sided polygonal voltage space vector structure (VSVS) comprised of 288 real active vectors and a zero vector is proposed in this article. The proposed scheme eliminates lower order harmonics up to 19th order and suppresses higher order harmonics from motor phase voltage in the full modulation range. The 48-step operation of the proposed scheme highly improves phase voltage quality at full speed. The dc bus utilization of the proposed scheme is improved to 99.42% compared to 90.6% multilevel hexagonal VSVS. The proposed topology has inherent capacitor balancing in every sampling interval at any loading condition using pole voltage redundancies. Multilevel property of the proposed scheme reduces instantaneous error in phase voltage compared to two-level 24-sided polygonal VSVS. Generation of real active vectors reduces instantaneous error in phase voltage and reduces switching frequency compared to switched average techniques existing in the literature. Fault-tolerant feature of the proposed scheme improves the availability of the drive system. Experimental results are provided to validate the steady-state operation, capacitor balancing, transient performance, and fault-tolerant capability of the proposed scheme. The comparison of switching loss and harmonic performance of the proposed scheme is performed with existing topologies.