Plasma-enhanced Chemical Vapor Deposition SiN Research Articles

Effects of hydrogen content in films on the etching of LPCVD and PECVD SiN films using CF4/H2 plasma at different substrate temperatures

AbstractThe dependences of etching characteristics on substrate temperature (Ts, from –20 to 50°C) of the plasma‐enhanced chemical vapor deposition (PECVD) SiN films (PE‐SiN) and low‐pressure chemical vapor deposition (LPCVD) SiN films (LP‐SiN) with CF4/H2 plasma were investigated. The Fourier‐transform infrared spectroscopy shows that both film types were N–H bond‐rich films, but in different hydrogen contents (PE‐SiN 22.7 at% and LP‐SiN 3.8 at%) from the Rutherford backscattering spectroscopy analyses. A higher hydrogen content led to a thinner fluorocarbon thickness because of the reaction between hydrogen outflux and C and N to form an HCN byproduct. The etch rates (ER) for the PE‐SiN were higher than that of the LP‐SiN at all Ts, due to the different FC thickness and etching mechanisms proposed. The formation of the N−Hx layer on PE‐SiN at low temperature caused the decrease in ER. For the LP‐SiN, the weak dependences of Ts on surface structure and ER were observed.

128-pixel arrays of 4H-SiC UV APD with dual-frequency PECVD SiNx passivation.

In this paper, high-performance 1×128 linear arrays of 4H-SiC ultraviolet (UV) avalanche photodiode (APD) with dual-frequency plasma enhanced chemical vapor deposition (PECVD) passivation are demonstrated for the first time. The results show that SiNx dielectric deposited by dual-frequency PECVD can effectively reduce the leakage current at high bias voltages. Due to the improved 4H-SiC epi-layer material and SiNx passivation, the fabricated 22 mm-long 1×128 4H-SiC APD linear arrays exhibit an excellent performance with a high pixel yield of 100% and a small breakdown voltage variation of 0.2 V, which is the best result ever reported. At room temperature, the pixels have a gain of over 105 and a maximum quantum efficiency of 53.5% @ 285 nm. Besides the high uniformity of breakdown voltage for 128 pixels, the dark currents at 95% of breakdown voltage are all below 1 nA.

Reduced reverse gate leakage current for GaN HEMTs with 3 nm Al/40 nm SiN passivation layer

An obvious increase in the gate leakage current has been commonly observed in GaN HEMTs, after Plasma-enhanced chemical vapor deposition (PECVD) SiN passivation has been observed to obviously increase. This paper presents an Al/SiN stack layer passivation structure. The high gate leakage current in GaN HEMTs caused by the PECVD SiN passivation is distinctly reduced by 2 to 3 orders of magnitude by introducing a thin Al layer. It is mainly attributed to the Al layer blocking and minimizing the damage for the (Al)GaN surface in the build-up of the luminance process of PECVD SiN and then reducing the surface trap density. TEM mapping and SRIM software simulation reveal that neither damage nor inter-diffusion is demonstrated at the Al/AlGaN interface, where a continuous crystalline region is observed. The moderate current collapse suppression and 32.8% improvement in VBR are achieved in GaN HEMTs with Al/SiN passivation.

Gettering Effects of Silicon Nitride Films From Various Plasma-Enhanced Chemical Vapor Deposition Conditions

This paper investigates and compares the impurity gettering effects of silicon nitride (SiN x ) films that are synthesized by plasma-enhanced chemical vapor deposition (PECVD) under various conditions. Both industrial- and laboratory-scale PECVD systems are employed to deposit SiN x films with a wide range of properties (with refractive indices from 1.93 to 2.45 at 632 nm), which covers the entire range of SiN x used for silicon solar cells. The gettering effects are quantified by monitoring the reduction kinetics of the interstitial iron concentration in the silicon wafer bulk as iron becomes gettered to the surface SiN x layers during cumulative annealing at 400 °C. The results show that the very different SiN x films generate similar gettering kinetics, indicating that the impurity gettering effect is likely present in most PECVD SiN x films for silicon solar cells. The gettering kinetics and the SiN x film properties of refractive index, Si–N, Si–H, N–H bond densities, and H content, are found to have no clear correlations.

Investigation of <italic>In Situ</italic> SiN as Gate Dielectric and Surface Passivation for GaN MISHEMTs

In this paper, we present a systematic investigation of metal–organic chemical vapor deposition-grown in situ SiN as the gate dielectric and surface passivation for AlGaN/GaN metal insulator semiconductor high electron mobility transistors (MISHEMTs). The dielectric constant and breakdown field of the in situ SiN were extracted from devices with varied gate dielectric thicknesses. Using frequency-dependent capacitance–voltage and parallel conductance methods, we obtained a low trap density of $\sim 3\times 10^{12}$ cm $^{-2}$ eV $^{-1}$ at the SiN/AlGaN interface. The MISHEMTs with a source–drain distance of $3~\mu \text{m}$ show a maximum drain current of 1560 mA/mm and a high on/off current ratio of $10^{9}$ . The device threshold voltage ( ${V}_\textsf {th}$ ) stability was assessed by means of both negative and positive gate stress measurements, as well as temperature-dependent $ {I}_\textsf {D}$ – ${V}_\textsf{G}$ measurements. We observed a minimal $ {V}_\textsf{th}$ shift of ~0.4 V under both 3000 s gate stress of ${V}_\textsf {GS}= 4$ V and up to 200 °C thermal stimulation. Furthermore, combining the in situ SiN with plasma-enhanced chemical vapor deposition SiN, we developed a bilayer passivation scheme for effective suppression of current collapse. Employing the high-quality in situ SiN, we have demonstrated large-area GaN MISHEMTs on Si with a gate width of 20 mm, showing a low off-state leakage of $2~\mu \text{A}$ /mm at 600 V and a low dynamic/static ON-resistance ratio. The device results show great advantages of employing in situ SiN in D-mode GaN MISHEMTs for high-efficiency power switching applications.

Advances in AlGaN/GaN HEMT Surface Passivation

The high efficiency and power density of AlGaN/GaN high electron mobility transistors (HEMTs) can be limited by parasitic charge trapping at sites on the semiconductor surface. Trapped electrons at the surface deplete the two-dimensional electron gas (2DEG), resulting in effects known as current collapse, increased dynamic on-resistance, DC-RF dispersion, among others. A SiN layer is conventionally implemented as surface passivation for GaN HEMTs, however the properties of this SiN layer and the impact of this layer on current collapse depend drastically on the deposition conditions of this film. Although passivation of GaN HEMTs has been studied extensively, the specific details behind the SiN passivation deposition are not frequently provided in literature. In this work, we investigate several passivation techniques and study their performance under dynamic switching conditions, under off-state stress, and implement hyperspectral electroluminescence imaging to identify electric field nonunifornities. We investigate plasma enhanced chemical vapor deposition (PECVD) SiN, a common GaN HEMT passivation method, and demonstrate how to optimize the deposition conditions to effectively passivate the HEMT. Generally, a mixed frequency PECVD SiN process is used, where a combination of low frequency (LF) e.g. 100-360 kHz and high frequency (HF) 13.56 MHz plasmas are used to create the SiN film. However, the LF step could create undesirable damage to the surface of the AlGaN barrier from N+ ion bombardment, degrading device performance. We developed a bilayer PECVD process, where a 10 nm thick layer is deposited using HF plasma only in order to protect the AlGaN surface, followed by a HF/LF mixed frequency SiN deposition. Annealing the 10 nm thick HF layer densified the film and resulted in a HEMT with significantly improved current collapse. On the other hand, SiN layers grown in situ during MOCVD growth of the GaN/AlGaN layers have also been demonstrated to serve as an effective protective layer for subsequent HF/LF PECVD SiN deposition, yielding HEMTs with low current collapse. Atomic layer epitaxy (ALE) deposition of a thin (10 nm) AlN layer is evaluated, and is shown to serve well as a passivation layer. This is particularly advantageous, since the thin layer is beneficial for reducing gate capacitance for high frequency operation. Finally, a nanocrystalline diamond (NCD) layer is incorporated on the surface of the GaN HEMT, primarily to improve thermal management, but this also is effective as a surface passivation layer, mitigating surface charge trapping. Effective passivation of the AlGaN/GaN HEMT surface is essential for mitigating current collapse, and we demonstrate recent advancements in passivation technology.

Initial Transient Phenomena Impact on Plasma CVD of Ultrathin Silicon Nitride and Silicon Carbon Nitride Dielectrics for Nano Devices Cu-Low k Interconnects

The initial transient (ITS) phenomena in plasma enhanced Chemical Vapor Deposition (PECVD) process was identified in early 1980’s (1). This ITS phenomenon has impact on the bonding structure and composition of plasma deposited silicon nitride (1) and amorphous silicon (2) films at the initial film-substrate interface. When the deposited film is in micron thickness, the ITS impact is generally smaller. The shrinking of semiconductor devices and the corresponding push to increase device density is continuing in the quest for improved performance of integrated circuits. Nano scale thickness low temperature plasma CVD dielectric films such as silicon nitride and silicon carbon nitride used as cap materials (3) for Cu interconnects that are expected to reach to sub-10 nm dimension next few years. The compositional variation in PECVD films at the interface by ITS which had a relatively small impact in past semiconductor technologies is becoming a significant factor in film’s properties as we scale film thickness down to sub-10nm. In this paper, we will present in detail the impact of the initial transient plasma in CVD process on the ultrathin nano thick cap and-low k dielectric films that are being used for advanced device interconnect fabrication, We will show that we can modify the current standard PECVD process to alleviate the impact of ITS phenomena. Some ITS impact on nano thick film are: a) PECVD silicon nitride / silicon carbon nitride dielectric cap films are normally deposited with a mixture of silane/ammonia or other carbosilane/ammonia precursors. The initial breakdown of silane is strongly affected by the plasma conditions and the dissociation thermodynamic of the precursors. Deposition rates can be different on Cu versus dielectric surfaces due differences in charging effects (see Figure 1). Additionally, the silane molecule is relatively unstable and more reactive as compared to ammonia, and typically dissociate rapidly first to form more conformal SiHx deposition radicals before the plasma reaches a steady state. Subsequently, PECVD with SiH4/NH3 precursors will normally produce a Si-rich silicon nitride composition at the interface. Silicon carbon nitride films can be deposited from more stable carbosilane precursors. In this case, the thickness of the Si-rich interface zone can be reduced, and a C-rich film surface may be deposited under specific deposition condition. This modulation may be exploited to control electrical (k, breakdown/leakage) and adhesion properties of the film for Cu low k interconnect structures. For a very thin dielectric cap deposited on a patterned structure of Cu and ultra-low k dielectric, the film thickness deposited on Cu versus the dielectric surface will be slightly different due to the differential local plasma charging effect during initial transient deposition period as shown in fig 1. This deposition rate difference will impact the film’s barrier and electrical properties, gap fill performance and subsequent in Cu-low k fabrication. In this case, plasma ITS charging is the principle mechanism that cause differences in film’s thickness. b) For typical PECVD SiN deposition process, the initial dissociation of SiH4 and/or NH3 will create reactive species that subsequently etch the deposited ultra-low k pSiCOH dielectric surface. These reactive species can produce substantial damage to pSiCOH, increase dielectric constant and subsequently poor reliability in final electronic devices. This damage can be reduced significantly by using an initially low rf plasma power and then increasing to a higher rf plasma power for the remainder of the deposition (4). ITS negative impact to devices and mitigation method will be discussed. c) For ultrathin cap films for Cu interconnects, such as SiN, variations in film composition at the interface will cause significant variation in electrical properties and conformality. To mitigate the ITS effect, a cyclic, multi-step deposition process utilizing plasma surface treatment was developed. A multilayers film with better conformality and consistent film’s properties was achieved. Using this novel cyclic process, high quality dielectrics SiN and SiNO at sub-10 nm thickness can be deposited consistently and reproducibly for Cu-low k interconnect fabrication as showed in Figure 2. In summary, the ITS phenomena on plasma CVD, its impact in nano thick film fabrication and methods to mitigate the ITS’s negative impact will be presented in the paper.

Advances in AlGaN/GaN HEMT Surface Passivation

The high efficiency and power density of AlGaN/GaN high electron mobility transistors (HEMTs) can be limited by parasitic charge trapping at sites on the semiconductor surface. Trapped electrons at the surface deplete the two-dimensional electron gas (2DEG), resulting in effects known as current collapse, increased dynamic on-resistance, DC-RF dispersion, among others. A plasma-enhanced chemical vapor deposition (PECVD) SiN layer is conventionally implemented as surface passivation for GaN HEMTs, however the properties of this SiN layer and the impact of this layer on current collapse depend drastically on the deposition conditions of this film. Although passivation of GaN HEMTs has been studied extensively, the specific details behind the SiN passivation deposition are not commonly provided within literature. In this work, we investigate several passivation PECVD SiN passivation schemes and study their performance under dynamic switching conditions, under off-state stress, and implement electroluminescence imaging to identify electric field nonunifornities.

Impact of Surface Passivation on the Dynamic ON-Resistance of Proton-Irradiated AlGaN/GaN HEMTs

Radiation tolerance of AlGaN/GaN high-electron mobility transistors (HEMTs) is studied with 2-MeV protons, up to a fluence of $6 \times 10^{14}$ H+/cm2 (about 200 times of typical Si MOSFET rating). The increase in dynamic ON-resistance ( $R_{{\textit{ONDYN}}})$ after radiation is observed to be much more severe than that of static ON-resistance. Radiation-induced donorlike traps located near the two-dimensional electron gas trap electrons, which is responsible for the phenomenon. Compared with the devices passivated by conventional plasma-enhanced chemical vapor deposition (PECVD) SiN, GaN HEMTs with 10 nm of in situ SiN before the PECVD SiN step demonstrate much less increase in $R_{{\textit{ONDYN}}}$ from 2300% to only 300%. The in situ SiN is believed to reduce the process damage by PECVD, improving radiation tolerance.

Multilayer MoS2 Thin-film Transistors Employing Silicon Nitride and Silicon Oxide Dielectric Layers

Bottom-gate molybdenum disulfide (MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) TFTs, having plasma-enhanced chemical vapor deposition (PECVD) gate-dielectric thin films, were fabricated from 80-100 nm thick mechanically exfoliated MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> multilayers. Three separate gate dielectric structures were investigated consisting of: 1) a single PECVD SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> layer; 2) a dual PECVD SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> /SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> layer; and 3) a reference thermal SiO2 layer. The devices fabricated on the bi-layer dielectric had a field-effect mobility (μ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">e</sub> ) of ~12 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs and an ON/OFF ratio of ~10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sup> , while the TFTs on SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> or thermal SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> dielectric had μ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">e</sub> ~ 4 to 5 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs and an ON/OFF ratio ~10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> to 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sup> . The calculated interface trap density for the bi-layer dielectric devices was found to be 10× less than the SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> devices and 2x less than the thermal SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> devices. The variation in the defect density was due to localized trap states in the dielectric/semiconductor interface.

(Invited) Radiation-Induced Defect Mechanisms in GaN HEMTs

GaN high electron mobility transistors (HEMTs) have the potential to be extremely tolerant of space and weapons of mass destruction radiation found in space and resulting from weapons of mass destruction. AlGaN/GaN HEMTs were fabricated on Si substrates and passivated with plasma enhanced chemical vapor deposition (PECVD) SiN, also HEMTs with in situ SiN and additional PECVD SiN were compared. These samples were exposed to 2 MeV protons, up to 6x1014 cm-2, which resulted in decreased mobility, decreased sheet carrier density, and an increase in dynamic ON-resistance. High resolution scanning transmission electron microscopy revealed roughening of the AlGaN/GaN interface. Off-state pulsed quiescent voltage stress was used to investigate the dynamic ON-resistance of GaN HEMTs before and after radiation. HEMTs with in situ SiN plus PECVD SiN shows improved radiation hardness for dynamic ON-resistance.

Suppression of Dispersive Effects in AlGaN/GaN High-Electron-Mobility Transistors Using Bilayer SiN x Grown by Low Pressure Chemical Vapor Deposition

A bilayer SiN x passivation scheme has been developed using low pressure chemical vapor deposition (LPCVD), which effectively suppresses the dispersive effects in AlGaN/GaN high-electron-mobility transistors (HEMTs) for microwave power operation. The bilayer LPCVD passivation is compared with in-situ SiN x passivations by metal-organic chemical vapor deposition (MOCVD) and ex-situ SiN x passivations by plasma-enhanced chemical vapor deposition (PECVD). The HEMTs were fabricated and characterized in terms of pulsed IV, transient drain current, and load pull. The devices passivated with in-situ MOCVD SiN x or PECVD SiN x exhibit significant current slump ( $\sim 40$ % and knee-voltage walkout, while the bilayer LPCVD SiN x passivated device shows negligible current slump ( $\sim 6$ % and knee-voltage walkout. These characteristics are directly reflected in the large signal operation, where HEMTs with bilayer LPCVD SiN x have the lowest dynamic ON-state resistance and highest output power (5.4 W/mm at 3 GHz).

InAlN/AlN/GaN Field-Plated MIS-HEMTs with a Plasma-Enhanced Chemical Vapor Deposition SiN Gate Dielectric

We report the studies of In0.15Al0.85N/AlN/GaN metal-insulator-semiconductor (MIS) high electron mobility transistors with a field plate (FP) and a plasma-enhanced chemical vapor deposition (PECVD) SiN layer as the gate dielectric as well as the surface passivation layer (FP-MIS HEMTs). Compared with conventional In0.15Al0.85N/AlN/GaN high electron mobility transistors (HEMTs) of the same dimensions, the FP-MIS HEMTs exhibit a maximum drain current of 1211 mA/mm, a breakdown voltage of 120V, an effective suppression of current collapse, about one order of magnitude reduction in reverse gate leakage, as well as more than five orders of magnitude reduction in forward gate leakage. These results confirm the potential of PECVD SiN in the application of the InAlN/AlN/GaN FP-MIS HEMTs.

Electrical characterization of MIS devices using PECVD SiN x :H films for application of silicon solar cells

The surface passivation of crystalline silicon solar cells using plasma enhanced chemical vapor deposition (PECVD), hydrogenated, silicon-nitride (SiNx:H) thin films has become significant due to a low-temperature, low-cost and very effective defect passivation process. Also, a good quality antireflection coating can be formed. In this work, SiNx:H thin films were deposited by varying the gas ratio R (=NH3/SiH4+NH3) and were annealed by rapid thermal processing (RTP). Metal-insulator-semiconductor (MIS) devices were fabricated using SiNx:H thin films as insulator layers and they were analyzed in the temperature range of 100–400 K by using capacitance-voltage (C-V) and current-voltage (I–V) measurements. The annealed SiNx:H thin films were evaluated by using the electrical properties at different temperature to determine the effect of surface passivation. We achieved an energy conversion efficiency of 18.1% under one-sun standard testing conditions for large-area (156 mm × 156 mm) crystalline-silicon solar cells.

InGaAs/InP Tunnel FETs With a Subthreshold Swing of 93 mV/dec and $I_{\rm ON}/I_{\rm OFF}$ Ratio Near $\hbox{10}^{6}$

Vertical n-channel tunnel field-effect transistors (TFETs) with tunneling normal to the gate based on an n+ In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">∞=0.53-&gt;;1</sub> GaAs/p <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> InP heterojunction have been demonstrated to exhibit simultaneously a high I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ratio of 6 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sup> , a minimum subthreshold swing (SS) of 93 mV/dec, and an on-current of 20 μA/μm at V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> = 0.5 V and a gate swing of 1.75 V at 300 K, a record TFET performance. The significant improvement in device performance is ascribed to the adoption of a thin equivalent oxide thickness (EOT) of ~1.3 nm for improved electrostatics and the use of plasma-enhanced chemical vapor deposition SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">∞</sub> mesa passivation to preserve the integrity of the thin exposed semiconductor layers.

Surface passivation of n-type Czochralski silicon substrates by thermal-SiO2/plasma-enhanced chemical vapor deposition SiN stacks

The surface passivation properties of thermal-SiO2/plasma-enhanced chemical vapor deposition SiN stacks on 2.5 Ω cm n-type Czochralski silicon substrates have been investigated. By annealing these stacks in air we achieve surface recombination velocities (SRV) lower than 2.4 cm/s for thin SiO2 layers. We find a clear correlation between the thickness of the oxide layers and the annealing duration. We also show that the absolute passivation quality of the SiO2/SiN stacks correlates to the SiO2 thickness. We find that the SRV increases with increasing oxide thickness. We also present data of the surface passivation of these SiO2/SiN stacks after storage in the dark for several weeks.

Effects of a Thermal CVD SiN Passivation Film on AlGaN/GaN HEMTs

In AlGaN/GaN high electron mobility transistors (HEMTs), drain current reduction by current collapse phenomenon is a big obstacle for a high efficient operation of power amplifier application. In this study, we investigated the effects of SiN passivation film quality on the electrical characteristics of AlGaN/GaN HEMTs. First, we conducted some experiments to investigate the relationship between electrical characteristics of AlGaN/GaN HEMTs and various conditions of SiN passivation film by plasma enhanced chemical vapor deposition (PE-CVD). We found that both gate current leakage and current collapse were improved simultaneously by SiN passivation film deposited by optimized condition of NH3 and SiH4 gas flow. It is found that the critical parameter in the optimization is a IN-H/ISi-H ratio measured by Fourier transforms infrared spectroscopy (FT-IR) spectra. Next, a thermal CVD SiN was applied to the passivation film to be investigated from the same point of view, because a thermal CVD SiN is well known to have good quality with low hydrogen content and high IN-H/ISi-H ratio. We confirmed that the thermal CVD SiN passivation could improve much further both of the gate leakage current and the current collapse in AlGaN/GaN-HEMTs. Furthermore, we tried to apply the thermal CVD SiN to the gate insulator in MIS (Metal Insulator Semiconductor) structure of AlGaN/GaN HEMTs. The thermal CVD SiN passivation was more suitable for the gate insulator than PE-CVD SiN passivation in a view of reducing current collapse phenomena. It could be believed that the thermal CVD SiN film is superior to the PE-CVD SiN film to achieve good passivation and gate insulator film for AlGaN/GaN HEMTs due to the low hydrogen content and the high IN-H/ISi-H ratio.

New Observation of Mobility and Reliability Dependence on Mechanical Film Stress in Strained Silicon CMOSFETs

This paper shows that dc device performance and reliability characteristics of CMOSFETs do not have the same dependence on the film stress of contact etch stopping layers (CESLs) in strained silicon technology. Two kinds of CESLs, namely, plasma-enhanced chemical vapor deposition (PE-CVD) SiN and low-pressure CVD SiON, with tensile and compressive stresses, respectively, were used to induce channel stress. To further analyze the effects of stress, the film stress of PE-CVD SiN was intentionally split into compressive stress and tensile stress. It is shown that the initial Dit of NMOS with a tensile stress film is less than that with a compressive stress, whereas in the case of PMOS, compressive stress demonstrated less Dit than the tensile-stress film. However, device degradation by hot and cold carriers is heightened more by tensile stress than by compressive stress for both NMOS and PMOS. Therefore, the compressive stress is desirable to improve hot-carrier immunity in NMOSFETs, whereas the tensile stress is necessary to improve the dc device performance. Hence, the simultaneous consideration of reliability characteristics and dc device performance is highly necessary in the stress engineering of nanoscale CMOSFETs.

Reversible Degradation of Ohmic Contacts on p-GaN for Application in High-Brightness LEDs

This paper analyzes the high-temperature long-term stability of ohmic contacts on p-type gallium nitride (p-GaN). The contributions of the ohmic contacts and semiconductor material degradation are separated by adopting the transmission line method (TLM). Before stress, the current-voltage (I-V) curves measured at the pads of the TLMs showed a linear shape, indicating a good ohmic behavior of the contacts. Thermal treatment at 250degC was found to induce the worsening of the electrical characteristics of the contacts: identified degradation modes consist of a shift of the I-V curves toward higher voltages and strong nonlinearity of the characteristics around zero. This paper shows that the high-temperature instabilities of ohmic contacts on p-GaN are related to the interaction between the device surface and the plasma-enhanced chemical vapor deposition SiN passivation layer. Hydrogen contained in the passivation layer is supposed to play an important role in the degradation process: the interaction with the acceptor dopant at the metal/semiconductor interface induces the decrease of the effective acceptor concentration. As a consequence, both the ohmic contact characteristics and the semiconductor sheet resistance are worsened.

SAW-based gas sensors with rf sputtered InO x and PECVD SiN x films: Response to H 2 and O 3 gases

Surface acoustic wave (SAW)-based sensors, with InO x and SiN x layers on 36° YX LiTaO 3 substrates were investigated for the detection of hydrogen (H 2) and ozone (O 3) gases at different operating temperatures. SiN x films with different thicknesses were deposited using the plasma enhanced chemical vapour deposition (PECVD) method. The InO x sensing layer was deposited using an rf magnetron sputterer. The sensors’ performance was analyzed in terms of their frequency shifts as a function of different gas concentrations. The chemical–physical characterization of the deposited films was carried out by X-ray photoelectron spectroscopy (XPS). High sensitivities and excellent repeatabilities were observed towards both gases.