Planar Busbar Research Articles

Develop Parasitic Inductance Model for the Planar Busbar of an IGBT H Bridge in a Power Inverter

This paper first analyzes the current paths on a planar busbar based on insulated-gate bipolar transistor bridge switching states and dc-link capacitor configurations. The busbar's circuit models which include both self- and mutual inductances are developed based on the identified current paths. The inductance circuit models are analyzed and reduced for different switching states, transition states, and dc-link capacitor configurations. Inductance and current sharing is analyzed based on circuit theory. Both simulations and measurements are conducted to verify the developed technique.

Reduced layer planar busbar for voltage source inverters

Planar busbars are used widely in modern high power inverters and have been shown to provide a good way for minimizing stray inductance and overshoot voltage. Planar busbars, which consist of multilayer copper sheets and dielectric insulators, offer significant advantages such as low impedance, improved thermal characteristic and reduced system cost compared with other interconnection approaches. A common problem of hard switched inverters is stray inductance, which needs to be minimized to reduce the effect of overvoltages. This paper presents a new physical structure for a voltage source inverter with symmetrical planar busbar structure, which minimizes the variation in stray inductance for different switching states. Three-dimensional (3-D) finite element simulations and experimental tests verify the theory.

Low stray inductance bus bar design and construction for good EMC performance in power electronic circuits

Ten years after the publication of the EC Directive 89/336 on electromagnetic compatibility, the impact of this directive on design and lay-out of modern electrical and electronic equipment can be observed. Many research and development studies have proposed and evaluated detailed improvements in the area of component design, component selection, circuit lay-out, shielding and active and passive filtering. New and innovative solutions to minimize noise, especially common mode conducted electromagnetic interference (EMI), in power electronic circuits continue to be developed. In this paper, the authors investigate to what extent EMI caused by power electronic devices in hard switching inverter topologies can be minimized using ultra-low inductive planar busbars. The concept followed in this study is to tackle EMI directly at the source where most EMI is generated; in other words, to reduce the parasitic magnetic energy stored in the inverter DC link to reduce high voltage spikes during switching. A planar busbar was built, tested and analyzed. Measurements show the validity of the theoretical, but simple, design procedure for planar busbars in power converters.