Pixel Geometry Research Articles

Characterization of analogue Monolithic Active Pixel Sensor test structures implemented in a 65 nm CMOS imaging process

Analogue test structures were fabricated using the Tower Partners Semiconductor Co. CMOS 65 nm ISC process. The purpose was to characterize and qualify this process and to optimize the sensor for the next generation of Monolithic Active Pixels Sensors for high-energy physics. The technology was explored in several variants which differed by: doping levels, pixel geometries and pixel pitches (10–25 μm). These variants have been tested following exposure to varying levels of irradiation up to 3 MGy and 1016 1 MeV neq cm−2. Here the results from prototypes that feature direct analogue output of a 4 × 4 pixel matrix are reported, allowing the systematic and detailed study of charge collection properties. Measurements were taken both using 55Fe X-ray sources and in beam tests using minimum ionizing particles. The results not only demonstrate the feasibility of using this technology for particle detection but also serve as a reference for future applications and optimizations.

Characterisation of analogue MAPS fabricated in 65 nm technology for the ALICE ITS3

The ALICE ITS3 project foresees the use of ultra-light MAPS, developed in the 65 nm imaging process, for the vertex detector in the ALICE experiment at the LHC to drastically improve the vertexing performance. This new development, initiated by an international consortium of the ALICE ITS3 collaboration and the CERN EP R&D project, enhances the overall MAPS performance.Small-scale prototypes are designed to study the analogue properties of the TPSCo 65 nm technology and compare the charge collection performance in different processes, pitches, pixel geometries, and irradiation levels. Recent results from lab and test-beam characterisation detailing the efficiency and the spatial resolution of the APTS with different pixel geometries and pitches satisfy the ALICE ITS3 requirements. A quantitative evolution of the charge collection and sharing among pixels is evident in the CE-65 with different in-pixel readouts. Attaining a spatial resolution better than 3μm with a 10μm pitch and over 99% efficiency in the moderate irradiation environment of ALICE also supports the viability of using 65 nm MAPS for FCC-ee vertex detectors.

Etching-free pixel definition in InGaN green micro-LEDs

The traditional plasma etching process for defining micro-LED pixels could lead to significant sidewall damage. Defects near sidewall regions act as non-radiative recombination centers and paths for current leakage, significantly deteriorating device performance. In this study, we demonstrated a novel selective thermal oxidation (STO) method that allowed pixel definition without undergoing plasma damage and subsequent dielectric passivation. Thermal annealing in ambient air oxidized and reshaped the LED structure, such as p-layers and InGaN/GaN multiple quantum wells. Simultaneously, the pixel areas beneath the pre-deposited SiO2 layer were selectively and effectively protected. It was demonstrated that prolonged thermal annealing time enhanced the insulating properties of the oxide, significantly reducing LED leakage current. Furthermore, applying a thicker SiO2 protective layer minimized device resistance and boosted device efficiency effectively. Utilizing the STO method, InGaN green micro-LED arrays with 50-, 30-, and 10-µm pixel sizes were manufactured and characterized. The results indicated that after 4 h of air annealing and with a 3.5-μm SiO2 protective layer, the 10-µm pixel array exhibited leakage currents density 1.2 × 10−6 A/cm2 at −10 V voltage and a peak on-wafer external quantum efficiency of ~6.48%. This work suggests that the STO method could become an effective approach for future micro-LED manufacturing to mitigate adverse LED efficiency size effects due to the plasma etching and improve device efficiency. Micro-LEDs fabricated through the STO method can be applied to micro-displays, visible light communication, and optical interconnect-based memories. Almost planar pixel geometry will provide more possibilities for the monolithic integration of driving circuits with micro-LEDs. Moreover, the STO method is not limited to micro-LED fabrication and can be extended to design other III-nitride devices, such as photodetectors, laser diodes, high-electron-mobility transistors, and Schottky barrier diodes.

Linear image sensor with triangular pixel geometry specialized for the light section method

Linear image sensor with triangular pixel geometry specialized for the light section method

Rapid and Direct Detection of Trimethylamine N-oxide Using an Off-Chip Capacitance Biosensor with Readout SoC for Early-Stage Thrombosis and Cardiovascular Disease.

A demonstration of an off-chip capacitance array sensor with a limit of detection of 1 μM trimethylamine N-oxide (TMAO) to diagnose a chronic metabolism disease in urine is presented. The improved Cole-Cole model is employed to determine the parameters of R_catalyzed, C_catalyzed, and Rp_catalyzed, enabling the prediction of the catalytic resistance of enzyme, reduction effects of the analyte, and characterize the small signal alternating current properties of ionic strength caused by catalysis. Based on the standard solutions, we investigate the effects of pixel geometry parameters, driving electrode width, and sensing electrode width on the electrical field change of the off-chip capacitance sensor; the proposed off-chip sensor with readout system-on-chip exhibits a high sensitivity of 21 analog-to-digital converter counts/μM TMAO (or 2.5 mV/μM TMAO), response time of 1 s, repetition of 98.9%, and drift over time of 0.5 mV. The proposed off-chip sensor effectively discriminates TMAO in a phosphate-buffered saline solution based on minute changes in capacitance induced by the TorA enzyme, resulting in a discernible 2.15% distinction. These measurements have been successfully corroborated using the conventional cyclic voltammetry method, demonstrating a mere 0.024% variance. The off-chip sensor is crafted with a specific focus on detecting TMAO, achieved by excluding any reduction reactions between the TMAO-specific enzyme TorA and the compounds creatine and creatinine present in urine. This deliberate omission ensures that the sensor's attention remains solely on TMAO, thereby enhancing its precision in achieving accurate and reliable TMAO detection.

First experimental evaluation of count-rate performance for micrometre resolution deep silicon detector

Objective. An ultra-fine-pitch deep silicon detector has been developed for clinical photon-counting computed tomography (CT). With a small pixel size of 14 × 650 μm2, it has shown potential to reach micrometre spatial resolution in previous simulation studies. A detector prototype with such geometry has been manufactured, and we report on the first experimental evaluation of its count-rate performance. Approach. The measurement was carried out at MAX IV synchrotron laboratory with 35 keV monochromatic x-rays. By inserting tungsten attenuators of 50, 75, 100, 150, 200, 225, 325 μ m-thicknesses into the beam, the response of the detector to fluence rates from 3.3 × 107 to 1.3 × 1011 mm−2 s−1 was characterized. Main results. The measurement result showed that the detector exhibited count rate linearity up to 6.66 × 108 mm−2 s−1 with 13% count loss and was still functional at count rate up to 2.9 × 1010 mm−2 s−1. A semi-nonparalyzable dead-time model was fitted to the count-rate behaviour of the detector, showing great agreement with the measured data, with an estimated nonparalyzable dead time of 2.9 ns. Significance. This is the first experimental evaluation of the count-rate performance for a deep silicon detector with such small pixel geometry. The results suggest that this type of detector shows the potential to be used at fluence rates encountered in clinical CT with little count loss due to pile-up.

Novel sensor developments for photon science at the MPG semiconductor laboratory

The world of photon science experiences significant advancements since the advent of synchrotron light sources with unprecedented brilliance, intensity and pulse repetition rates, with large implications on the detectors used for instrumentation. Here, an overview about the work on this field carried out at the semiconductor laboratory of the Max-Planck-Society (MPG HLL) is given. Main challenges are high dynamic range to resolve faint features at the fringes of scatter images as well as structures in bright peaks, and high bandwidth to fully exploit the fast timing capability of the source. A newly developed device to improve the signal-to-noise-ratio (SNR) at high bandwidths is the so-called MARTHA (Monolithic Array of Reach-Through Avalanche Photodiodes) structure, which integrates an array of APDs on a monolithic substrate. The reach-through architecture assures near 100% fill factor and allows implementing a thin entrance window with optimized quantum efficiency for low energy X-rays. The structures operate in proportional mode with adjustable gain, and can serve as a drop-in replacement for PAD detectors in hybrid pixel systems. A more sophisticated solution for low to medium frame rate applications with high contrast requirement are pnCCDs with high dynamic range in the pixel area featuring DEPFET based readout nodes with non-linear amplification (NLA). The high dynamic range mode has been demonstrated for pnCCD devices with a pixel size down to 75 μm2. Framerates of up to 1 kHz are possible for a 1 Megapixel detector. Small size prototypes of these structures have recently been manufactured. Modified DEPFET structures with build-in non-linear amplification are also used to implement active pixel detectors optimized for high dynamic range. Successfully prototyped for the DSSC sensors (DEPFET Sensor with Signal Compression) at the XFEL, these structures are increasingly being used in applications requiring high contrast and intensity, e.g., TEM imaging. Charge handling capability and output characteristics can be tailored to the requirements, as well as pixel geometry and size. The large intrinsic gain of the DEPFET provides excellent SNR even at fast timing. Pixels can be read with a speed of 100 ns, the resulting frame rate depends on the degree of readout parallelization.

Simulation of unsteady flow around bluff bodies using knowledge-enhanced convolutional neural network

The unsteady flow with massive separation poses challenges to accurately and efficiently simulate wind effects on civil structures, especially in the search for optimal aerodynamic shapes during the preliminary design stage. To this end, an encoding-transformation-decoding convolutional neural network (CNN) architecture is developed in this study to take the pixelated geometry of a bluff body as the input and instantly output the corresponding unsteady aerodynamic flow (represented by a sequence of consecutive flow snapshots). First, a unique (shared) encoding part is used to extract the low-resolution features from the structural shapes and associated initial flow conditions. Then, the transformation part consecutively maps the encoded features (originated from encoder) to a prediction of next flow snapshot in high-level feature space while the separate decoding part unravels the abstract features (from corresponding transformer) to pixelated velocity and pressure fields. Prior domain knowledge is leveraged at various stages of machine learning pipeline to enhance the learning efficiency and accuracy of the proposed convolutional encoder-transformer-decoder. Specifically, the qualitative knowledge that the flow fields vary on a very small length scale within the boundary layer is used to empirically design a nonuniform grid for CNN image inputs and outputs. In addition, the equation-free quantitative knowledge learned from previous flow snapshot (i.e., high-level features from the transformer and filters in the decoder) is employed in the learning of current flow snapshot as the CNN initial conditions based on transfer learning technique. Furthermore, the equation-based quantitative knowledge of both mass and momentum conservation laws is utilized to augment the CNN loss function. Numerical examples suggest good performance of the proposed knowledge-enhanced CNN for unsteady flow simulation of bridge decks. Effects of these three types of knowledge on the performance of the convolutional encoder-transformer-decoder are also examined to highlight their high efficacy to facilitate the training efficiency and simulation accuracy.

Radiation hardness of a wide spectral range SiPM with quasi-spherical junction

New pixel geometries are on the rise to achieve high sensitivity in near-infrared wavelengths with silicon photomultipliers (SiPMs). We test prototypes of the tip avalanche photo-diodes, which feature a quasi-spherical p-n junction and a high photodetection efficiency over a wide spectral range, and analyze the performance after neutron irradiation. The observed increase in dark count rate is significantly smaller than for a SiPM with a conventional design, indicating a good radiation hardness of the pixel geometry.

Design of an analog monolithic pixel sensor prototype in TPSCo 65 nm CMOS imaging technology

A series of monolithic active pixel sensor prototypes (APTS chips) were manufactured in the TPSCo 65 nm CMOS imaging process in the framework of the CERN-EP R&D on monolithic sensors and the ALICE ITS3 upgrade project. Each APTS chip contains a 4 × 4 pixel matrix with fast analog outputs buffered to individual pads. To explore the process and sensor characteristics, various pixel pitches (10 µm–25 µm), geometries and reverse biasing schemes were included. Prototypes are fully functional with detailed sensor characterization ongoing. The design will be presented with some experimental results also correlating to some transistor measurements.

Digital geometry on a cubic stair-case mesh

• The cubic grid Z 3 plays important role in the (digital) world. • Meshes obtained by cutting Z 3 by oblique planes can display 2d images. • The dual semi-regular grid, the rhombille tiling is an oblique cubic mesh. • Shortest path algorithm and digital distance are computed on the rhombille tiling. • The rhombille tiling can be used as a digital canvas and for RGB pixel geometry. In this paper, we investigate digital geometry on the rhombille tiling, D(6,3,6,3), that is the dual of the semi-regular tiling called hexadeltille T(6,3,6,3) tiling and also known as trihexagonal tiling. In fact, this tiling can be seen as an oblique mesh of the cubic grid giving practical importance to this specific grid both in image processing and graphics. The properties of the coordinate systems used to address the tiles are playing crucial roles in the simplicity of various algorithms and mathematical formulae of digital geometry that allow to work on the grid in image processing, image analysis and computer graphics, thus we present a symmetric coordinate system. This coordinate system has a strong relation to topological/combinatorial coordinate system of the cubic grid. It is an interesting fact that greedy shortest path algorithm may not be used on this grid, despite to this, we present algorithm to provide a minimal-length path between each pair of tiles, where paths are defined as sequences of neighbor tiles (those are considered to be neighbors which share a side). We also prove closed formula for computing the digital, i.e., path-based distance, the length (the number of steps) of a/the shortest path(s). Some example pictures on this grid are also presented, as well as its possible application as pixel geometry for color images and videos on the hexagonal grid. To create your abstract, type over the instructions in the template box below. Fonts or abstract dimensions should not be changed or altered.

Quality Control (QC) of FBK preproduction 3D Si sensors for ATLAS HL-LHC Upgrades

The challenging demands of the ATLAS High Luminosity (HL-LHC) Upgrade aim for a complete swap of new generation sensors that should cope with the ultimate radiation hardness. FBK has been one of the prime foundries to develop and fabricate such radiation-hard 3D silicon (Si) sensors. These sensors are chosen to be deployed into the innermost layer of the ATLAS Inner Tracker (ITk). Recently, a pre-production batch of 3D Si sensors of 50 × 50 μm2 pixel geometry, compatible with the full-size ITKPix (RD53B) readout chip, was fabricated. Two wafers holding temporary metal were diced at IZM, Germany, and a systematic QC test campaign was carried out at the University of Trento electronics laboratory. The paper briefly describes the 3D Si sensor design for ATLAS ITk and the required QC characterization setups. It comprises electrical tests (i.e., I-V, C-V, and I-T) of non-irradiated RD53B sensors. In addition, the study of several parametric analyses, i.e., oxide charge density, oxide thickness, inter-pixel resistance, inter-pixel capacitance, etc., are reported with the aid of Process Control Monitor (PCM) structures.

Performance of radiation hard 3D pixel sensors for the upgrade of the ATLAS Inner Tracker

The Inner Detector of the ATLAS experiment at CERN will be replaced by a completely new Inner Tracker (ITk) to exploit the performance of the High Luminosity upgrade of the LHC accelerator (HL-LHC). The new detector will have to operate in an unprecedented radiation environment. In particular, the hybrid pixel detectors of the innermost layer of the ITk will be exposed to a particle fluence of about 1.7 × 1016 neq/cm2 before being replaced. A novel 3D pixel sensor technology featuring thin active substrates and small pixel cells has been selected to instrument the innermost barrel layer and rings of the ATLAS ITk. Prototypes of 3D pixel sensors produced at CNM in Barcelona, Spain, including 3D pixelated test structures as well as half-size sensors coupled to the RD53A ASIC prototype for HL-LHC, have been irradiated with protons and neutrons up to the radiation doses expected for the innermost layers of ITk. Their performance in terms of leakage current, power dissipation and hit efficiency of different pixel geometries after irradiation have been investigated and compared to the requirements for ITk.

Recent results with radiation-tolerant TowerJazz 180 nm MALTA sensors

To achieve the physics goals of future colliders, it is necessary to develop novel, radiation-hard silicon sensors for their tracking detectors. We target the replacement of hybrid pixel detectors with Depleted Monolithic Active Pixel Sensors (DMAPS) that are radiation-hard, monolithic CMOS sensors. We have designed, manufactured and tested the MALTA series of sensors, which are DMAPS in the 180 nm TowerJazz CMOS imaging technology. MALTA have a pixel pitch well below current hybrid pixel detectors, high time resolution (<2ns) and excellent charge collection efficiency across pixel geometries. These sensors have a total silicon thickness of between 50–300 μm, implying reduced material budgets and multiple scattering rates for future detectors which utilise such technology. Furthermore, their monolithic design bypasses the costly stage of bump-bonding in hybrid sensors and can substantially reduce detector costs. This contribution presents the latest results from characterisation studies of the MALTA2 sensors, including results demonstrating the radiation tolerance of these sensors.

A 4D diamond detector for HL-LHC and beyond

Tracking detectors for the future hadronic machines are expected to stand an extreme level of radiation and to provide at the same time high space and time resolutions. Diamond detectors satisfy both of the latter requirements and, in addition, a 3D geometry with thin columnar resistive electrodes orthogonal to the diamond surface enhances the natural radiation tolerance and response speed of this material. We report on the timing characterization of a 3D pixel diamond detector prototype fabricated, by laser graphitization with a 55 × 55 μm2 pixel geometry, in Firenze. Results of a tests beam provide a time resolution well below 100 ps with an efficiency larger than 99%.

Design and characterization of depleted monolithic active pixel sensors within the RD50 collaboration

The CERN RD50 CMOS working group is designing and characterizing depleted monolithic active pixel sensors (DMAPS) for use in high radiation environments fabricated in the LFoundry 150 nm HV-CMOS process. The first iteration of this chip, RD50-MPW1, suffered from high leakage current, low breakdown voltage and crosstalk. In order to mitigate these shortcomings, an improved version with improved pixel geometry was designed. The RD50-MPW2 integrates a matrix of 8 × 8 pixels with analog front-end, but no digital readout. It was delivered in early 2020 and characterized within lab-measurements, an irradiation campaign and test beams. To read out the chips the Caribou DAQ system is used with a custom chipboard as well as specific firmware and software modules. A third iteration of the chip, the RD50-MPW3, has been submitted to LFoundry in December 2021 and is expected to be delivered in May 2022. It will keep the well working analog part of its predecessor, completed by an in-pixel digital logic and an optimized peripheral readout for effective pixel configuration and fast serial data transmission. The chip will comprise a matrix of 64 × 64 pixels arranged in 32 double-columns. We will present an overview of the RD50 HV-CMOS activities focusing on the measurement results of RD50-MPW2 chip, as well as the design and readout of the RD50-MPW3.

Characterization of a CMOS pixel sensor for charged particle tracking

A prototype of the CMOS pixel sensor named Supix-1 has been fabricated and tested in order to investigate the feasibility of a pixelated tracker for a proposed Higgs factory, namely, the Circular Electron-Positron Collider (CEPC). The sensor, taped out with a 180 nm CMOS Image Sensor (CIS) process, consists of nine different pixel arrays varying in pixel pitches, diode sizes and geometries in order to study the particle detection performance of enlarged pixels. The test was carried out with a 55Fe radioactive source. Two soft X-ray peaks observed were used to calibrate the charge to voltage factor of the sensor. The pixel-wise equivalent noise charge, charge collection efficiency and signal-to-noise ratio were evaluated. A reconstruction method for clustering pixels of a signal has been developed and the cluster-wise performance was studied as well. The test results show that pixels with the area as large as of 21 × 84 μm have satisfactory noise level and charge collection performance, meeting general requirements for a pixel sensor. This contribution demonstrates that the CMOS pixel sensor with enlarged pitches, using the CIS technology, can be used in tracking for upcoming collider detectors akin to the CEPC.

Compact MIMO Systems Utilizing a Pixelated Surface: Capacity Maximization

Compact MIMO systems often suffer from degraded channel capacity due to spatial correlation. To overcome this issue, we propose a formulation for the channel capacity of a compact MIMO system that directly links it to the geometry of a pixelated surface embedded into the MIMO system. This formulation allows us to maximize the channel capacity of the MIMO system and straightforwardly obtain the optimum geometry for the pixelated surface that reduces spatial correlation. The key step in obtaining the formulation is to link the pixelated surface geometry to an impedance matrix that allows us to obtain an expression for the systems channel capacity. The formulation is general and can be applied to a wide variety of MIMO antenna systems and geometries. To demonstrate the versatility of the approach, we include a design for a compact 4-port planar inverted-F antenna (PIFA) array integrated with a pixelated surface. Simulations and experiments are provided to evaluate the performance of the compact MIMO system with and without optimization of the surface. It is shown that optimizing the geometry of the pixelated surface can increase channel capacity by 13% and energy efficiency by 19.9% compared to the system without optimization. The importance of the approach is that it provides a link between communication and electromagnetic formulations of MIMO antenna systems.

Cheap, versatile, and turnkey fabrication of microfluidic master molds using consumer-grade LCD stereolithography 3D printing

The recent development of 3D printers allowed a lot of limitations in the field of microfabrication to be circumvented. The ever-growing chase for smaller dimensions has come to an end in domains such as microfluidics, and the focus now shifted to a cost-efficiency challenge. In this paper, the use of a high-resolution stereolithography LCD 3D printer is investigated for fast and cheap production of microfluidic master molds. More precisely, the UV LED array and the LCD matrix of the printer act as an illuminator and a programmable photomask for soft lithography. The achieved resolution of around 100 μm is mainly limited by the pixel geometry of the LCD matrix. A tree-shape gradient mixer was fabricated using the presented method. It shows very good performances despite the presence of sidewall ripples due to the uneven pixel geometry of the LCD matrix. Any design can be brought from concept to realization in under 2 h. Given its sub-€1000 cost, this method is a very good entry point for labs wishing to explore the potential of microfluidic devices in their experiments, as well as a teaching tool for introducing students to microfluidics.

Inverse Design of Diffractive Relativistic Meta‐Sails via Multi‐Objective Optimization

AbstractPhotonic propulsion of light sails using the radiation pressure of an intense laser beam is a promising route to achieve relativistic velocities for deep space exploration. A successful photonic design of such relativistic sails requires efficient acceleration and maintaining stability of the beam‐riding across a Doppler‐broadened propulsion band due to considerable red‐shift of the wavelength in the frame of the moving sail. While efficient acceleration of the sail requires maximizing the optical force along the beam propagation direction, the stability degree of the sail depends on the magnitude of lateral forces in the transverse plane of the beam. This establishes a trade‐off between these two requirements which calls for their synergistic engineering. In this work, an evolutionary multi‐objective optimization technique for the inverse design of diffractive relativistic meta‐sails with a genetic pixelated geometry is adopted. The goal is to identify a set of Pareto optimal solutions which provides the designer with an intuitive understanding of the ultimate trade‐off between acceleration and stability degree of the sail in a vast design space, and allows for a well‐informed decision on the best design given the requirements for the acceleration time and distance as well as the tolerance with respect to mispointings and misalignments.