Piezoelectric Energy Harvesting Interface Circuit Research Articles

A Fully Autonomous SSHIC Interface Circuit With Configurable Multi-Step Bias-Flip for Piezoelectric Energy Harvesting

This brief presents a piezoelectric energy harvesting interface circuit with a multi-step bias-flip strategy to boost the energy extraction capability. The optimized parallel synchronized switch on inductor and capacitor (SSHIC) technique is adopted. Except for the external inductor and capacitors, the proposed interface circuit is designed for fully integrated control without any external adjustment during the bias-flip process. Moreover, the steps for bias-flip can be configured flexibly, and the circuit can work even without an inductor. The interface circuit has been designed and implemented with 0.18- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mu }\text{m}$ </tex-math></inline-formula> CMOS technology. With the 5-step bias-flip SSHIC topology and a 1-mH inductor, the simulated whole current dissipation is 106 nA, the measured maximum flipping efficiency is 90.3%, and the measured maximum power efficiency improvement is 642% compared to the ideal full bridge rectifier (FBR).

A Highly Adaptive and Flipping-Time Optimized Piezoelectric Energy Harvesting Interface IC With Synchronized Triple Bias-Flip

This article presents a piezoelectric energy harvesting interface circuit with high adaptability to external inductors, transducer types, and vibration frequencies. High output power can be obtained with the help of triple bias-flip and optimal flipping time control. The triple bias-flip enables both higher efficiency and the use of an inductor with lower volume compared to conventional bias-flip topologies. Besides, owing to the highly adaptive circuit design and reverse current reduction in the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LC</i> resonant loop, the proposed interface circuit not only automatically adjusts flipping time according to external inductance and piezoelectric transducer, but also reduces the reverse current of the inductor effectively. Also, an active rectifier that can reduce conduction loss of the diode-based rectifier has been implemented. The prototype integrated circuit has been fabricated in 180-nm CMOS technology and the chip area is 0.646 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The measurement results show that the proposed circuit achieves cold start-up without any external power supply, and can work with high efficiency when the external inductor is varying from 0 to 10 mH, transducer capacitance is changing from 20 to 90 nF, and vibration frequency is ranging from 35 to 200 Hz. The measured maximum output power of the proposed design can achieve as high as 473% enhancement to the full-bridge rectifier.

Efficient self-powered piezoelectric energy harvesting interface circuit with wide rectified voltage

Synchronized Switching Harvesting on Inductor (SSHI) and Synchronous Electric Charge Extraction (SECE) are two classic interface circuit techniques for Piezoelectric energy harvesting. But the former has high peak output power with narrow rectified voltage range, while the latter has wide rectified voltage range with lower peak output power. This paper presents a self-powered interface circuit for piezoelectric energy harvesting to achieve a good balance between the two. The proposed interface circuit is based on the Series-SSHI (S–SSHI) and SECE. The circuit proposed can harvest energy through S–SSHI and SECE in positive and negative half cycles, respectively. Moreover, the figure of merit (FOM), optimal rectified voltage range (ORVR) and region of interest (SRoI) of simulation and experiment results are discussed. The maximum FOM of the proposed circuit is as high as 2.15, which is 1.68 times that of the SECE, and it can reach 6 times the ORVR of the S–SSHI. SRoI factor of the proposed circuit show that the proposed method has better performance. In addition, the circuit shows a simpler implementation compared with state-of-the-art designs.

A self-powered piezoelectric energy harvesting interface circuit with efficiency-enhanced P-SSHI rectifier * * Project supported by the National Natural Science Foundation of China (Nos. 61574103, U1709218) and the Key Research and Development Program of Shaanxi Province (No. 2017ZDXM-GY-006).

The key to self-powered technique is initiative to harvest energy from the surrounding environment. Harvesting energy from an ambient vibration source utilizing piezoelectrics emerged as a popular method. Efficient interface circuits become the main limitations of existing energy harvesting techniques. In this paper, an interface circuit for piezoelectric energy harvesting is presented. An active full bridge rectifier is adopted to improve the power efficiency by reducing the conduction loss on the rectifying path. A parallel synchronized switch harvesting on inductor (P-SSHI) technique is used to improve the power extraction capability from piezoelectric harvester, thereby trying to reach the theoretical maximum output power. An intermittent power management unit (IPMU) and an output capacitor-less low drop regulator (LDO) are also introduced. Active diodes (AD) instead of traditional passive ones are used to reduce the voltage loss over the rectifier, which results in a good power efficiency. The IPMU with hysteresis comparator ensures the interface circuit has a large transient output power by limiting the output voltage ranges from 2.2 to 2 V. The design is fabricated in a SMIC 0.18 μm CMOS technology. Simulation results show that the flipping efficiency of the P-SSHI circuit is over 80% with an off-chip inductor value of 820 μH. The output power the proposed rectifier can obtain is 44.4 μW, which is 6.7× improvement compared to the maximum output power of a traditional rectifier. Both the active diodes and the P-SSHI help to improve the output power of the proposed rectifier. LDO outputs a voltage of 1.8 V with the maximum 90% power efficiency. The proposed P-SSHI rectifier interface circuit can be self-powered without the need for additional power supply.

A Self-Powered Piezoelectric Energy Harvesting Interface with Wide Input Range in 65 nm CMOS Process

ABSTRACTA self-powered piezoelectric energy harvesting interface circuit (PEHIC) with wide input range and good performance is presented in this paper. The proposed PEHIC consists of a two-stage active charge pump rectifier and an ultra-low power intermittent power management unit (IPMU). Active diodes based on unbalanced-biased comparators improve the reverse leakage current problem that conventional active diodes faced. By limiting the output voltage between 1.2 and 0.8 V, the IPMU working in intermittent mode can provide an expanded input range and ensure that the interface circuit has a large transient output power. Implemented in a 65 nm standard complementary metal oxide semiconductor (CMOS) technology, the PEHIC has been simulated and verified. Simulation results show that an AC signal with amplitude ranging from 0.32 to 1.5 V and frequencies of 20 Hz–3 kHz can be rectified. The maximum output current is as large as 5 mA. The peak power conversion efficiency is up to 81% when the input voltage is 0.8 V at 200 Hz. The PEHIC can be self-powered without the need for additional power supply.