Photonic Analog-to-digital Converter Research Articles

Measurement and Data Correction of Channel Sampling Timing Walk-Off of Photonic Analog-to-Digital Converter in Signal Recovery.

A two-channel, time-wavelength interleaved photonic analog-to-digital converter (PADC) system with a sampling rate of 10.4 GSa/s was established, and a concise method for measuring and data correcting the channel sampling timing walk-off of PADCs for signal recovery was proposed. The measurements show that for the two RF signals of f1 = 100 MHz and f2 = 200 MHz, the channel sampling timing walk-off was 12 sampling periods, which results in an ENOB = -0.1051 bits for the 100 MHz directly synthesized signal, while the ENOB improved up to 4.0136 bits using shift synthesis. In addition, the peak limit method (PLM) and normalization processing were introduced to reduce the impacts of signal peak jitter and power inconsistency between two channels, which further improve the ENOB of the 100 MHz signal up to 4.5668 bits. All signals were analyzed and discussed in both time and frequency domains. The 21.1 GHz signal was also collected and converted using the established two-channel PADC system with the data correction method, combining the PLM, normalization, and shift synthesis, showing that the ENOB increased from the initial -0.9181 to 4.1913 bits, which demonstrates that our method can be effectively used for signal recovery in channel-interleaved PADCs.

Scalable Photonic Digital-to-Analog Converters

This work introduces a novel architecture for implementing a parallel coherent photonic digital-to-analog converter (PDAC), designed to transform parallel digital electrical signals into corresponding analog optical output, convertible to analog electrical signals using photodiodes. The proposed architecture incorporates microring resonator-based modulators (MRMs), phase shifters, and symmetric multimode interference couplers. Efficient modulation is achieved by MRMs utilizing carrier depletion-induced refractive index changes, while metal heaters facilitate tuning of the ring resonator resonance wavelength. The proposed architecture is scalable to higher bit resolutions and exhibits a dynamic range limited by MRM’s sensitivity to applied bias and noise levels. Experimental results of the fabricated chip in the silicon-on-insulator (SOI) platform showcase the successful realization of a 4 GSample/sec conversion rate in a 2-bit resolution operation, along with a stationary conversion of four parallel DC digital signals into 16 analog intensity levels in a 4-bit PDAC configuration. The study encompasses a proof-of-concept experimental demonstration of 8 Gbps data conversion, along with a 50 Gbps data conversion rate using the optimized design in the simulation, affirming the accuracy and quality of the PDAC architecture. These findings contribute to the advancement of PDAC technology, providing insights into performance characteristics, limitations, and potential applications.

Effects of Optical Sampling Pulse Power, RF Power, and Electronic Back-End Bandwidth on the Performance of Photonic Analog-to-Digital Converter.

The effects of optical sampling pulse power, RF power, and electronic back-end bandwidth on the performance of time- and wavelength-interleaved photonic analog-to-digital converter (PADC) with eight-channel 41.6 GHz pulses have been experimentally investigated in detail. The effective number of bits (ENOB) and peak-to-peak voltage (Vpp) of converted 10.6 GHz electrical signals were used to characterize the effects. For the 1550.116 nm channel with 5.2 G samples per second, an average pulse power of 0 to -10 dBm input to the photoelectric detector (PD) has been tested. The Vpp increased with increasing pulse power. And the ENOB for pulse power -9~-3 dBm was almost the same and all were greater than four. Meanwhile, the ENOB decreased either when the pulse power was more than -2 dBm due to the saturation of PD or when the pulse power was less than -10 dBm due to the non-ignorable noise relative to the converted weak signal. In addition, RF powers of -10~15 dBm were loaded into the Mach-Zehnder modulator (MZM). The Vpp increased with the increase in RF power, and the ENOB also showed an increasing trend. However, higher RF power can saturate the PD and induce greater nonlinearity in MZM, leading to a decrease in ENOB, while lower RF power will convert weak electrical signals with more noise, also resulting in lower ENOB. In addition, the back-end bandwidths of 0.2~8 GHz were studied in the experiments. The Vpp decreased as the back-end bandwidth decreased from 8 to 3 GHz, and remained nearly constant for the bandwidth between the Nyquist bandwidth and the subsampled RF signal frequency. The ENOB was almost the same and all greater than four for a bandwidth from 3 to 8 GHz, and gradually increased up to 6.5 as the back-end bandwidth decreased from the Nyquist bandwidth to 0.25 GHz. A bandwidth slightly larger than the Nyquist bandwidth was recommended for low costs and without compromising performance. In our experiment, the -3 to -5 dBm average pulse power, about 10 dBm RF power, and 3 GHz back-end bandwidth were recommended to accomplish both a high ENOB more than four and large Vpp. Our research provides a solution for selecting optical sampling pulse power, RF power, and electronic back-end bandwidth to achieve low-cost and high-performance PADC.

Decoupling and one-time elimination of the timing skew in a time-demultiplexing photonic analog-to-digital converter for high-resolution wideband signal acquisition.

Temporal alignment between the demultiplexing signal and sampled signal for complex wideband signals greatly increases the difficulty of designing high-speed and high-resolution photonic analog-to-digital converters (PADCs). We present a vector description to decouple the timing skew from the phase frequency response in time-demultiplexing PADC. We demonstrate that the calibration can be optically implemented with true time delay effects and the broadband input can be one-time calibrated through several single-frequency signals. For verification, we configure out a 40 GSa/s PADC with eight-interleaved sub-channels. The timing skew-induced spurs across the whole Nyquist band are effectively suppressed, making the PADC acquire a wideband signal with 16 GHz instantaneous bandwidth. The spurious-free dynamic range (SFDR) is enhanced to ∼55 dB, and the effective number of bits (ENOB) is improved from ∼5.5 bits to ∼8 bits within 20 GHz. It is nearly 1 bit better than the recently reported time-demultiplexing PADC under the comparable input frequencies.

Experimental demonstration of a dynamic range enhancement method for a phase-shifted PADC by using a modulo operation.

We propose what we believe to be a novel approach to enhance the dynamic range of a photonic analog-to-digital converter (PADC) without the need of additional custom-designed circuits or components. The method utilizes the unique characteristic of our previously reported multimode interference (MMI) coupler-based optical quantizer that exploits the periodicity of the optical phase to realize a modulo operation. Experiments were carried out to verify the effectiveness of the proposed method on our phase-shifted optical quantization ADC (PSOQ-ADC) chip. Experimental results show that our proposed method enhance the dynamic range from [-V π, V π] to [-2V π, 2V π] and has the potential to be further extended. Additionally, we successfully reconstructed radio frequency (RF) signals at a sampling rate of 30 Gs/s. Our work provides a promising solution for achieving a high dynamic range in on-chip PSOQ-ADC.

Instantaneous bandwidth expansion of photonic sampling analog-to-digital conversion for linear frequency modulation waveforms based on up-sampling and fractional Fourier transform signal processing.

An approach to expanding the instantaneous bandwidth of a photonic sampling analog-to-digital converter (ADC) for receiving linear frequency modulation waveforms (LFMWs) is proposed and experimentally demonstrated based on up-sampling and filtering in the fractional Fourier domain. Through twice zero interpolation, the equivalent sampling rate is quadrupled, which also quadruples the nominal instantaneous bandwidth of the photonic sampling ADC. In addition, with the assistance of bandpass filtering in the fraction Fourier domain, the image signals and the harmonic distortions generated in the interpolation process are filtered out. As a result, the effective instantaneous bandwidth of the photonic sampling ADC is doubled. In the experiment, the instantaneous bandwidth of a photonic sampling ADC with a sampling rate of 5 GSa/s for receiving LFMWs is increased from 2.5 GHz to 5 GHz by using the proposed method. Input LFMWs within the frequency range of 24-27 GHz and 30-33 GHz, i.e., with an instantaneous bandwidth of 3 GHz, are digitized without frequency-domain aliasing. Besides, the ability of the proposed method to enhance the ranging accuracy in a broadband radar system is demonstrated. This method reduces the hardware complexity of the photonic sampling ADC for receiving broadband LFMWs in radar systems.

A ‘DOMZM–Filter–BPD’-Based Microwave Photonic Link for Eliminating Even Harmonics Distortion

The ‘Mach-Zehnder modulator (MZM)–wavelength division demultiplexer (WDM)–photodetector (PD)’ structure in photonic analog-to-digital converters (PADCs) may result in residual even harmonics after photodetection. In this paper, we build the model for the ‘Dual-output MZM (DOMZM)–filter–balanced PD (BPD)’-based microwave photonic link, where the amplitude and the phase responses of the filter can be arbitrary. It is proved that this link can eliminate the aforementioned even harmonics. Theoretical analysis is verified by the simulation and experimental results. By using this structure, the spur-free dynamic range (SFDR) limited by the even harmonics can be improved and the sampling frequency range can be expanded for the PADCs. As the spectrum contains only odd harmonics, the inverse cosine transform for calibrating the nonlinearity of the MZM can be applied to further improve the SFDR.

Broadband Signal Digitization Based on Low-Speed Non-Uniform Photonic Sampling

A new non-uniform photonic sampling (NPS) strategy and its special signal reconstruction algorithm are proposed to achieve digital acquisition of broadband periodic signals at a low sampling rate. Compared with the existing schemes, the NPS strategy can largely reduce the sampling number to acquire identical signal information as that obtained by using its equivalent high-speed uniform photonic sampling, which is beneficial for reducing the sampling time and the data volume of the NPS-based analog-to-digital converter (ADC). In addition, the calculation time of the proposed algorithm is millions of times lower than that of the digital alias-free signal processing (DASP) algorithm used before, which benefits from the fast Fourier transform calculation of a one-dimensional data array instead of a two-dimensional data array calculation in the DASP algorithm. A simulation is performed to validate the feasibility of the proposed scheme. In the simulation, a single-channel NPS-based ADC with an average sampling rate of 1 GSa/s is demonstrated by using the proposed NPS strategy and signal reconstruction algorithm. The results indicate the reconstructed signal information for a single-tone microwave signal at 9.9 GHz and a linear frequency modulation signal in the frequency range of 1 GHz to 9 GHz are identical to those obtained by using its equivalent high-speed uniform photonic sampling-based ADC with a sampling rate of 20 GSa/s.

Photocurrent-Summation-Based High-Speed Integrated Photonic Digital-to-Analog Converter

Achieving ultra high-speed arbitrary signal generation with conventional electronic digital-to-analog converters (DACs) is becoming extremely challenging, owing to the inherent bandwidth limitations due to interconnect and device parasitics in electronic circuits. Using optical techniques, and leveraging the advantages of photonic integration, a power-efficient solution for high-speed high-precision digital-to-analog conversion is proposed. A framework presenting resolution, power consumption and bandwidth tradeoffs for performance analysis of the photonic digital-to-analog converter (PDAC) with different configurations, is shown. The proposed PDAC concept is demonstrated in a proof-of-concept experimental setup, generating multi-level signals at up to 21.5 GBd.

Photonic ADC-based scheme for joint wireless communication and radar by adopting a broadband OFDM shared signal.

We propose and demonstrate a novel, to the best of our knowledge, joint wireless communication and radar system based on a photonic analog-to-digital converter (PADC), which can receive broadband radio-frequency (RF) signals. Owing to this property, a broadband orthogonal frequency division multiplexing (OFDM) shared signal, which owns obvious advantages in communication applications, can be adopted to realize efficient data communication and high-performance target detection simultaneously. In the experiment, a communication rate of 6 Gbit/s is achieved. Inverse synthetic aperture radar (ISAR) imaging is demonstrated with a two-dimensional (2D) resolution of 3.97 cm × 2.94 cm. Finally, it is verified that high-accuracy radial resolution and high-speed communication can be maintained while increasing the pulse repetition period to detect remote target at around 374.6 m.

Photonic sampling analog-to-digital conversion based on time and wavelength interleaved ultra-short optical pulse train generated by using monolithic integrated LNOI intensity and phase modulator.

High-speed analog-to-digital conversion (ADC) is experimentally demonstrated by employing a time and wavelength interleaved ultra-short optical pulse train to achieve photonic sampling and using wavelength division demultiplexing to realize speed matching between the fast optical front-end and the slow electronic back-end. The sampling optical pulse train is generated from a cavity-less ultra-short optical pulse source involving a packaged device that monolithically integrates an intensity modulator and a phase modulator into a chip based on lithium niobate on insulator (LNOI). In the experiment, the fiber-to-fiber insertion loss of the packaged modulation device is measured to be 6.9 dB. In addition, the half-wave voltages of the Mach-Zehnder modulator and the phase modulator in the LNOI-based modulation device are measured to be 3.6 V and 3.4 V at 5 GHz, respectively. These parameters and the device size are superior to those based on cascaded commercial devices. Through using the packaged modulation device, two ultra-short optical pulse trains centered at 1541.40 nm and 1555.64 nm are generated with time jitters of 19.2 fs and 18.9 fs in the integral offset frequency range of 1 kHz to 10 MHz, respectively, and are perfectly time interleaved into a single pulse train with a repetition rate of 10 GHz and a time jitter of 19.8 fs. Based on the time and wavelength interleaved ultra-short optical pulse train, direct digitization of microwave signals within the frequency range of 1 GHz to 40 GHz is demonstrated by using a two-channel wavelength demultiplexing photonic ADC architecture, where the effective number of bits are 5.85 bits and 3.75 bits for the input signal at 1.1 GHz and 36.3 GHz, respectively.

Equivalence of photonic sampling to signal holding in channel-interleaved photonic ADCs by controlling photo-detection response.

Substantial interests have been attracted in the use of photonic sampling and electronic digitizing for photonic analog-to-digital converter (PADC). However, the nature of that photo-detection with signal holding effects has not been well established. This paper analyzes the equivalence of photonic sampling to signal holding by controlling photo-detection response. In the frequency domain, the high-frequency components generated by the sampling pulse train are folded back into the Nyquist band resulting the signal holding response when the output is digitized. We proposed an approximate response of the photodetector (PD) to verify the theoretical analysis. It is found that the photonic sampling serves as the conventional switch-based sample-and-hold (S&H) circuit in channel-interleaved photonic analog-to-digital converter. In the experiment, the signal holding directly inhibits the timing mismatch without sophisticated calibrations.

High-resolution ISAR imaging based on photonic receiving for high-accuracy automatic target recognition.

A scheme of high-resolution inverse synthetic aperture radar (ISAR) imaging based on photonic receiving is demonstrated. In the scheme, the linear frequency modulated (LFM) pulse echoes with 8 GHz bandwidth at the center frequency of 36 GHz are directly sampled with the photonic analog-to-digital converter (PADC). The ISAR images of complex targets can be constructed without detection range swath limitation due to the fidelity of the sampled results. The images of two pyramids demonstrate that the two-dimension (2D) resolution is 3.3 cm × 1.9 cm. Furthermore, the automatic target recognition (ATR) is employed based on the high-resolution experimental dataset under the assistance of deep learning. Despite of the small training dataset containing only 50 samples for each model, the ATR accuracy of three complex targets is still validated to be 95% on a test dataset with the equal number of samples.

Photonic analog-to-digital conversion based on time-to-frequency mapping

A novel photonic analog-to-digital conversion (ADC) scheme based on time-to-frequency mapping is proposed and experimentally demonstrated. In the approach, the amplitude of the input analog signal is firstly converted into a time-varying signal by pulse position modulation, then the time variation is mapped into the optical spectrum with the help of time-to-frequency mapping offered by the chirped optical pulse. The optical spectral information can be directly encoded by using interleaving filters and a binary receiver array, which outputs the digital records of the input analog signal. Compared with the existing photonic ADC schemes, the proposed approach greatly simplifies the system configuration and uses only one modulator with a dispersive element to achieve 2N quantization levels. Meanwhile, it also avoids the limitation of optical nonlinearity and realizes the linear mapping between the analog voltage and optical spectrum. A proof-of-concept experiment of the proposed approach based on time-to-frequency mapping is successfully carried out to verify the feasibility of the scheme. In addition, we also discuss the performance limitations induced by the frequency ambiguity in chirped spectra and the timing jitter in sampling.

Visualizing and simplifying convolutional recurrent autoencoder for mismatch compensation of channel-interleaved photonic analog-to-digital converter

Deep learning (DL) has been used to successfully solve numerous problems and challenges in a wide range of fields. The architecture of DL is complex and treated as a black box, making it difficult to understand the principles behind it. Here, we visualize the process of compensating for time mismatches for a two-channel photonic analog-to-digital converter (PADC) by a convolutional recurrent autoencoder (CRAE) with excellent generalizability and robustness. Besides, we explore the effects of different modules of the CRAE on the generalizability. Based on the analysis of the above two operations, we simplify the CRAE and then apply it to a four-channel PADC, which is a more complex channel-interleaved system. Consequently, for both PADC systems, the performance of the simplified CRAE is as good as that of the original CRAE. Moreover, for the two-channel PADC, after simplification, the frame rate of the CRAE is increased from 460 frames/second to 975 frames/second, 20,000 points in each frame. For the four-channel PADC, the spur-free dynamic range is enhanced to 24.6 dBc from 5.2 dBc.

Electronic Bottleneck Suppression in Next‐Generation Networks with Integrated Photonic Digital‐to‐Analog Converters

Digital-To-Analog Converters In article number 2000033, Volker J. Sorger and co-workers demonstrate a novel photonic digital-toanalog converter (DAC) that bypasses the usually deployed optical-to-electrical-to-optical conversions. Furthermore, this novel parallel binary-weighted DAC offers high sampling efficiencies and compact form-factor and is exceptionally suited to be deployed at network-edges and peripheral sensors. (Image designed by Dr. Mario Miscuglio)

Optimization of optical signal-to-distortion ratio in a channel-interleaved photonic ADC via a coherent multi-frequency RF driver

A microwave-chip-based coherent multi-frequency RF driver is developed for a channel-interleaved photonic analog-to-digital converter (PADC) system, which comprises a multi-class optical demultiplexer and supports a sampling speed of 40 GSa/s. The generated signals from the RF driver are adjustable in both amplitude and phase. We analyze the relationship between the characteristics of the generated RF driver signals and the demultiplexing performance in theory based on the optical signal-to-distortion ratio (OSDR). It is the most effective parameter to evaluate the performance of the demultiplexer in a PADC system without an electronic analog-to-digital converter. By precisely adjusting the amplitude and phase of signals, the OSDR is optimized. The results verify the compatibility between the RF driver and the PADC system.

Photonic analog-to-digital converter powered by a generalized and robust convolutional recurrent autoencoder.

We propose a convolutional recurrent autoencoder (CRAE) to compensate for time mismatches in a photonic analog-to-digital converter (PADC). In contrast of other neural networks, the proposed CRAE is generalized to untrained mismatches and untrained category of signals while remaining robust to system states. We train the CRAE using mismatched linear frequency modulated (LFM) signals with mismatches of 35 ps and 57 ps under one system state. It can effectively compensate for mismatches of both LFM and Costas frequency modulated signals with mismatches ranging from 35 ps to 137 ps under another system state. When the spur-free dynamic range (SFDR) of the unpowered PADC decreases from 10.2 dBc to -3.0 dBc, the SFDR of the CRAE-powered PADC is over 31.6 dBc.

High-accuracy automatic target recognition scheme based on a photonic analog-to-digital converter and a convolutional neural network.

We propose a high-accuracy automatic target recognition (ATR) scheme based on a photonic analog-to-digital converter (PADC) and a convolutional neural network (CNN). The adoption of the PADC enables wideband signal processing up to several gigahertz, and thus high-resolution range profiles (RPs) are attained. The CNN guarantees high recognition accuracy based on such RPs. With four centimeter-sized objects as targets, the performance of the proposed ATR scheme based on the PADC and CNN is experimentally tested in different range resolution cases. The recognition result reveals that high-range resolution leads to high accuracy of ATR. It is proved that when dealing with centimeter-sized targets, the ATR scheme can acquire a much better recognition accuracy than other RP ATR solutions based on electronic schemes. Analysis results also show the reason why higher recognition accuracy is attained with higher-resolution RPs.

Real-time jitter correction in a photonic analog-to-digital converter.

A real-time jitter meter is used to measure and digitally sample the pulse-to-pulse timing error in a laser pulse train. The jitter meter is self-referenced using a single-pulse delay line interferometer and measures timing jitter using optical heterodyne detection between two frequency channels of the pulse train. Jitter sensitivity down to 3×10-10fs2/Hz at 500 MHz has been demonstrated with a pulse-to-pulse noise floor of 1.6 fs. As a proof of principle, the digital correction of the output of a high-frequency photonic analog-to-digital converter (PADC) is demonstrated with an emulated jitter signal. Up to 23 dB of jitter correction, down to the noise floor of the PADC, is accomplished with radio-frequency modulation up to 40 GHz.