A 2.5 Gbps transimpedance amplifier (TIA) with the feedback resistance self-adaptively adjusted is designed for the application of optical receivers in passive optical network and implemented in Global Foundries (GF) 0.18 [Formula: see text]m CMOS standard process. The main structure of the circuit consists of an improved three-stage current multiplexing push-pull inverter. With the diode-connected-transistor placed at each end of the inverter, the extra pole will be pulled away in order to increase the stability of the loop system. The feedback resistance of TIA is connected in parallel with the NMOS transistor, and the gate voltage of the tube is adjusted automatically to control the resistance value of this parallel structure in order to overcome the defect of the inverter which will work in the linear region on the condition of excessive optical power. A low-dropout linear regulator (LDO) is adopted from the power supply to the TIA to isolate power supply noise. The measured results demonstrate that the fabricated TIA with a photodetector capacitance of 3.2 pF has a transimpedance gain of 41.64 dB[Formula: see text] with a current signal frequency of 2.5 Gbit/s, and a −3 dB bandwidth of 2.35 GHz. The average input-referred noise current spectral density within the bandwidth is185 pA/Hz[Formula: see text], signal rise time is 195 ps, fall time is 227 ps, eye diagram height is 28 mV, optical sensitivity is −30.6 dBm, and power consumption is only 52 mW at 3.3 V power supply voltage, the chip area is [Formula: see text] mm2.