Phosphorus-doped Polysilicon Films Research Articles

Exploration of Phosphorus Oxide in Heavily Phosphorus-Doped Polysilicon Films of Tunneling Oxide Passivation Contact Solar Cells

Exploration of Phosphorus Oxide in Heavily Phosphorus-Doped Polysilicon Films of Tunneling Oxide Passivation Contact Solar Cells

Growth and electrical properties of in situ phosphorus-doped polycrystalline silicon films using Si3H8 and PH3

In situ phosphorus-doped polycrystalline silicon (polysilicon) films grown on silicon oxide layers using trisilane (Si3H8) and phosphine (PH3) as precursors are investigated as a function of the Si3H8/PH3 gas flow ratio and the growth temperature. At a high flow rate for Si3H8 in the temperature range of 600–700 °C, the deposition process is controlled by the rate of desorption of hydrogen molecules on the surface, which has an activation energy of 1.13 eV. For a low Si3H8 flow rate at growth temperatures >650 °C, however, the deposition is limited by the diffusion of Si3H8 gas to the surface. The presence of phosphorus decreases the crystallization temperature of the polysilicon layers during growth. In addition, the ratio of phosphorus incorporated into the polysilicon decreases with increasing growth temperature because of the increase in the growth rate. The resistivity of the phosphorus-doped polysilicon films decreases with increasing deposition temperature at the same phosphorus concentration, indicating that the use of a high growth temperature results in an enhancement in the activation of phosphorus in the polysilicon films during growth.

Faceting of twin tips in polysilicon films

The faceting of tips of twin plates in the interior of grains under annealing in phosphorus-doped polysilicon films, produced by low-pressure chemical vapor deposition, has been investigated by transmission electron microscopy. It has been shown that the facet types and number of facets depend on the annealing temperature. The stability diagram for the different facet types has been constructed. Three kinds of faceting transitions that take place on the twin tips have been studied. The transformation of curved grain boundary into a grain boundary facet with increasing temperature has been observed for the first time.

Optical surface roughness evaluation of phosphorus-doped polysilicon films

The surface roughness of phosphorus-doped polycrystalline silicon (polysilicon) film is widely believed to be related to its electrical property. In this work, the roughness of polysilicon films prepared in situ under varied processing conditions, is determined using an optical technique that is based on measuring the spectral absorbance of specularly reflected light. The roughness measurements attained are found to follow the logical trend of roughness anticipated from phosphorus-doped polysilicon prepared under controlled variations of temperature, pressure and phospine/silane flow ratio.

Highly reliable ECR N2O-plasma polyoxide grown on heavily phosphorus-doped polysilicon films

Reliability of polyoxide grown by electron cyclotron resonance (ECR) N2O-plasma on heavily phosphorus-doped polysilicon has been investigated for the interpoly dielectrics (IPDs) of nonvolatile memories (NVMs). ECR N2O-plasma polyoxide grown on polysilicon with phosphorus of 1 × 1021 cm−3 exhibits a significantly high breakdown field of 10 MV/cm and low electron trapping rate of 0.5 V, which are regardless of phosphorus concentration. The improvements are attributed to the smooth polyoxide/polysilicon interface, low phosphorus concentration, and nitrogen-rich layer with strong silicon-nitrogen bonds at the polyoxide/polysilicon interface.

Fabrication of on-chip barium strontium titanate capacitors by metallo-organic decomposition

Metallo-organic thin film decomposition (MOD) was used in forming barium strontium titanate (BST) thin film capacitors on phosphorus doped polysilicon films deposited on 4 in. silicon wafers. A single step deposition process yielded highly uniform, crack-free BST films ranging up to 0.25 εm in thickness and having various step heights and dimensional area. Scanning electron microscopy (SEM) showed very good step coverage and planarization of the BST. The capacitors had capacitance densities above 200 nF/cm2, leakage current densities less than 1.55 εA/cm2 at a bias voltage of 10 V, and a dielectric breakdown field above 1 MVycm. Small temperature coefficients of capacitance and dissipation (tan δ) were also observed. Frequency response measurements were made using the BST capacitors and on-chip resistors in low pass and high pass circuit configurations. A plot of relative gain and phase angle versus frequency showed excellent agreement with predicted results.

Highly phosphorus-doped polysilicon films with low tensile stress for surface micromachining using POCl 3 diffusion doping

Stress in highly phosphorus-doped polysilicon films for surface micromachining using diffusion doping with POCl 3 as dopant source is investigated. The deposition temperature is varied in the range 565 to 620°C, and doping is done at 950 and 850°C, respectively. Wafer curvature measurements and micromachined indicator structures are used to determine the residual stress. A process sequence yielding highly phosphorus-doped polysilicon films with low tensile stress is presented. As no additional high-temperature annealing step is necessary, the films are suitable for integrating surface-micromachined sensors and actuators with microelectronics.

The mechanism of secondary grain growth in polysilicon films

Secondary grain growth in 0.5 μm thick undoped and phosphorus-doped polysilicon films, produced by low-pressure chemical vapour deposition, is investigated by transmission electron microscopy. Analysis shows that the driving force for secondary grain growth in phosphorus-doped polysilicon films is the difference in dislocation density in the normal and secondary grains for the early stages of secondary grain growth; the driving force is due to surface energy anisotropy for the subsequent growth stages. The most probably secondary grain formation mechanism is grain coalescence assisted by dislocation climb.

Fabrication of N/sup +/-N iso-type diodes with LPCVD-grown polysilicon on silicon structures

We report the results of fabricating low cut-in voltage, n/sup +/-n iso-type diodes using in situ phosphorus-doped polysilicon films on n-type Si substrates. The electrical characteristics of these structures show exponential current-voltage (I-V) behavior. The temperature dependence of the current is used to extract the energy barrier at the film-substrate interface. The formation of the energy barrier is assumed to be due to the presence of energy states at the polysilicon-substrate interface. A simple phenomenological model, which takes into account the interface charge, is presented to explain the formation of the energy barrier. An energy barrier height of about 0.18 eV is extracted from the results of I-V characteristics at different ambient temperatures.

Scanning tunneling microscopy investigation of phosphorus-doped polycrystalline silicon films

Scanning tunneling microscopy (STM) in air has been used to investigate the surface of highly phosphorus-doped polysilicon films produced by low pressure chemical vapour deposition (LPCVD). It has been found that, even when working in air, the technique gives detailed information about microroughness and mean grain size. Distinguishing between two different length scales, values for inter — and intra-grain roughness as a function of phosphorus doses are reported.

In situ phosphorus-doped polysilicon for excitation and detection in micromechanical resonators

Low-pressure chemical vapour deposited (LPCVD) in situ phosphorus-doped polysilicon films have been grown from a 60:30:300sccm silane:phosphine (2000 ppm):nitrogen mass-flow mixture at 625 °C under varied process conditions. Thickness uniformity, grain size, dopant concentration, resistivity, temperature coefficient of resistivity, longitudinal strain gauge factor and the temperature coefficient of the gauge factor are determined. A growth rate with a non-uniformity (3σ) of 5% is obtained, yielding films with a grain size of 20–30nm and a surface roughness of 12 nm (peak-to-valley heights), both before and after annealing, and a dopant concentration of (2–3) × 10 20 cm −3. Resistivities of the order of 1 mΩ cm can be obtained with a temperature coefficient close to zero after annealing at 900 °C for 30 min, with a longitudinal gauge factor of −20 and a temperature coefficient of the gauge factor of −0.25%/°C. Amechanism incorporating the diffusion of dislocations during annealing is proposed to explain the observed effect. The films are appropriate for application as resistors for thermal excitation and piezoresistive detection in resonating micromechanical devices.

Low-temperature crystallization of in situ phosphorus-doped low-pressure chemical-vapour deposited amorphous silicon

A method has been developed for producing low-resistivity phosphorus-doped polysilicon films with a minimum thermal budget. The method involves low-pressure chemical-vapor deposition of amorphous silicon at 560 °C followed by crystallization at 650 °C. Films formed in this manner are compared to films deposited polycrystalline at 627 °C. In both cases, in situ doping is achieved by addition of PH3 diluted in SiH4 to the gas mixture. For a given SiH4: PH3 flow ratio, the phosphorus concentration determined from secondary-ion mass spectroscopy is four times larger in the amorphous-deposited material. Moreover, the resistivity is substantially lower in this material even when the dopant concentrations are similar. The latter result may be due in part to reduced dopant segregation to grain boundaries. The internal strain determined from the Raman line width is larger in the polycrystalline-deposited material but could be reduced by high-temperature annealing.

Microstructures of Polysilicon

ABSTRACTSome typical microstructural studies of polycrystalline silicon using transmission electron microscopy (TEM) are described, including the application of this material for assisting TEM investigations themselves. Examples include oxidation and realignment of polysilicon thin films, the structure of polysilicon in EEPROM devices, polysilicon in trench capacitors and measurement of SiO2 layer thicknesses with polysilicon overlayers. It is also shown tha grain growth in heavily phosphorus doped polysilicon films can be followed by in situ heating in the TEM.

Interpretation of dc characteristics of phosphorus-doped polycrystalline silicon films: Conduction across low-barrier grain boundaries

Current–voltage curves of phosphorus-doped polycrystalline silicon films of Lee and Cheng are reanalyzed with the same trapping model of thermionic and thermionic-field emission across symmetrical Schottky barriers between grains. The analysis yields unexpectedly low values of the effective number of grains Neff in the conducting path. Values of Neff/Ngeo decreases from 0.5 at 20 K to 0.1 at 300 K, where Ngeo =(film length)/(typical grain size). A dc conduction model is proposed. Carriers in phosphorus-doped polysilicon films travel extensively across low-barrier grain boundaries, where electrons from segregated phosphorus are abundant enough to fill most of the electron traps. The model can also explain an observed current–temperature relation i∝T3 at low bias voltages and yield values of barrier resistance comparable to reported data on polycrystalline silicon neutron-transmutation doped with phosphorus measured by a small-area traveling potential probe.