Phase Shifter Topology Research Articles

Reflection Phase Shifter Topology With 180° Tuning Range Using Impedance Transforming Coupler and Series Resonant Load for K-Band Phased Arrays

Reflection Phase Shifter Topology With 180° Tuning Range Using Impedance Transforming Coupler and Series Resonant Load for <i>K</i>-Band Phased Arrays

A Simplified Vector-Sum Phase Shifter Topology With Low Noise Figure and High Voltage Gain

An simplified vector-sum phase shifter (VSPS) topology is proposed in this article. The proposed VSPS topology employs only one 90° coupler to perform as both an I/Q generator and a vector summer. Compared with the literaturally reported VSPS, the proposed VSPS features a simpler topology and improved noise figure (NF) performance. Moreover, active baluns based on the self-calibration technique are employed to provide antiphase signals and improve the gain performance of the VSPS. For demonstration, a 24–30-GHz VSPS based on the proposed topology is implemented in the 65-nm CMOS process, exhibiting 3.5° rms phase error and 0.9-dB rms gain error. The average gain of the implemented VSPS is as high as 9 dB at the central frequency of 27 GHz. The NF ranges from 4.8 to 9 dB from 24 to 30 GHz, and the core chip size is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.36\times0.59$ </tex-math></inline-formula> mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

Continuously Tunable True-Time-Delay Phase Shifter With Extended Tuning Range

A continuously tunable true-time-delay phase-shifter topology based on switchable varactor-tuned transmission lines is presented. By introducing p-i-n diodes to switch different varactor-tuned transmission lines, the phase shift tuning range can be doubled compared with the conventional design, which results in 50% size reduction. For verification, two cascaded four-unit and eight-unit microstrip phase shifters are designed and fabricated on a 0.787-mm-thick Rogers RT/Duroid 5880 substrate with $\varepsilon _{r} =2.2$ and tan $\delta =0.0009$ . The measured microstrip phase shifts of the four-unit and eight-unit phase shifters are about 107° and 191° at 4 GHz, respectively, with insertion loss of less than 2.4 and 3.6 dB. The return loss is better than 15 dB from 0.5 to 4.65 GHz for all states.

A Compact 26.5–29.5-GHz LNA-Phase-Shifter Combo With 360° Continuous Phase Tuning Based on All-Pass Networks for Millimeter-Wave 5G

This article presents a compact integrated receiver front-end for phased-arrays at 5G n257/n261 band (26.5-29.5 GHz) employing both a low-noise amplifier (LNA) and a novel passive phase-shifter based on variable-phase all-pass networks. The proposed phase-shifter topology is analysed and designed using 0.25 μm BiCMOS achieving continuous tuning capabilities with 360° phase range over a 25-33 GHz frequency range under 0.1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> of area. The proposed phase-shifter is measured standalone, achieving 8.3 ± 0.55 dB losses at 29 GHz with an RMS gain error below 0.6 dB across the entire frequency range. When quantizing the continuous phase-shift into 6 bits, an RMS phase error <; 3° is obtained. To build the LNA-Phase-shifter combo, the phase-shifter is then integrated with an LNA optimized for compactness, which was measured standalone, showing a noise figure below 3.2 dB across the n257/n261 band and 20 dB gain under 0.0625 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> of area. The small size of both the phase-shifter and LNA enables an ultra-compact phased-array receiver front-end under 0.2 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> of area. The front-end is measured, achieving 11.5 ± 0.53 dB of gain, RMS gain error below 0.42 dB and RMS phase error below 3.2° over the entire n257 band, measured input-referred P1dB of -25 dBm and a 15 mW DC power consumption.

Phase-Shift PWM-Controlled DC–DC Converter with Secondary-Side Current Doubler Rectifier for On-Board Charger Application

A novel circuit topology for an on-board battery charger for plugged-in electric vehicles (PEVs) is presented in this paper. The proposed on-board battery charger is composed of three H-bridges on the primary side, a high-frequency transformer (HFT), and a current doubler circuit on the secondary side of the HFT. As part of an electric vehicle (EV) on-board charger, it is required to have a highly compact and efficient, lightweight, and isolated direct current (DC)–DC converter to enable battery charging through voltage/current regulation. In this work, performance characteristics of full-bridge phase-shift topology are analyzed and compared for EV charging applications. The current doubler with synchronous rectification topology is chosen due to its wider-range soft-switching availability over the full load range, and potential for a smaller and more compact size. The design employs a phase-shift full-bridge topology in the primary power stage. The current doubler with synchronous recitation is placed on the secondary. Over 92% of efficiency is achieved on the isolated charger. Design considerations for optimized zero-voltage transition are disused.

26 GHz phase shifters for multi-beam nolen matrix towards fifth generation (5G) technology

This paper presents the designs of phase shifters for multi-beam Nolen matrix towards the fifth generation (5G) technology at 26 GHz. The low-cost, lightweight and compact size 0° and 45° loaded stubs and chamfered 90°, 135° and 180° Schiffman phase shifters are proposed at 26 GHz. An edge at a corner of the 50 Ω microstrip line Schiffman phase shifter is chamfered to reduce the excess capacitance and unwanted reflection. However, the Schiffman phase shifter topology is not relevant to be applied for the phase shifter less than 45° as it needs very small arc bending at 26 GHz. The stubs are loaded to the phase shifter in order to obtain electrical lengths, which are less than 45°. The proposed phase shifters provide return loss better than 10 dB, insertion loss of -0.97 dB and phase difference imbalance of ± 4.04° between 25.75GHz and 26.25 GHz. The Rogers RT/duroid 5880 substrate with dielectric constant of 2.2 and substrate thickness of 0.254 mm is implemented in the designs.

A Novel Metamaterial Microelectromechanical Systems Phase Shifter with High Phase Shift and High Bandwidth

In this paper, new topology of phase shifter is proposed that uses advantage of metamaterial and MEMS technology. The phase shifter is switched between two states of RH- and LH-TL having frequency passband unlike other proposed metamaterials which create the maximum phase shift from one unitcell. Analysis and design approach of the phase shifter is presented and the structure is simulated using 3D simulator. The phase shifter creates 180 degree phase shift with return loss and insertion loss that are better than 15 dB and 0.25 dB in both states at frequency ranges of 1.4-4.4 GHz. Therefore, low loss, high bandwidth and high phase shift are the advantages of the new proposed phase shifter.

A symmetric lattice‐based wideband wide phase range digital phase shifter topology

SummaryIn this paper, a novel digital phase shifter topology that achieves wideband and wide phase range is proposed. Wide frequency band operation is accomplished employing symmetrical all‐pass lattice structures. Compact phase shifter size is obtained utilizing the miniaturized microwave monolithic integrated circuit (MMIC) design implementation technology. Therefore, resulting phase shifter units are suitable for various communication systems such as radar and cellular communication smart antenna arrays. This paper provides complete design equations together with design algorithm for the selected phase shift and the center frequency. Design algorithm is developed on MatLab environment. The proposed phase shifting circuit is implemented employing the commercially available 0.18‐μm silicon CMOS technology. The new phase shifter topology provides 00 to 3600 phase shift range over X‐band, even beyond.

A Dual-Polarization-Switched Beam Patch Antenna Array for Millimeter-Wave Applications

Increasing data transfer rates for future millimeter-wave communications requires high capacity radio channels and user-centric communication network environments. Therefore, special requirements, such as wide-angle beam steering, wide operational frequency bandwidth, and simultaneous operation with orthogonal polarizations, are essential for telecommunication antennas. In this communication, we present a compact patch antenna array with a Butler matrix (BM) feed network for the frequency band of 26–31.4 GHz. The 16-element planar array has been designed to operate with the two linear orthogonal polarizations and provide ±42° beam switching. To ensure the wideband operation, a novel combination of planar couplers, crossovers, and phase shifters is designed to form the BM. A new phase-shifter topology is used which is based on a combination of open-short stubs and the Shiffman phase shifter. The design is fabricated on a low-cost multilayer board with a size of $120 \times 70 \times 1.62$ mm3. The size of the feeding network, which is implemented on a single board, is $76 \times 23 \times 0.1$ mm3. The experimental measurements of return loss, mutual coupling, and radiation patterns confirm simulated results.

Design of modular DC / DC converter with phase-shifting topology

Design of modular DC / DC converter with phase-shifting topology

Design of ZVS DC / DC converter with phase-shifting topology

Design of ZVS DC / DC converter with phase-shifting topology

A Frequency Tunable 360° Analog CMOS Phase Shifter With an Adjustable Amplitude

This brief presents a new vector sum phase shifter topology utilizing a current mode ${R}$ - ${C}$ poly phase filter along with several current steering variable gain amplifiers. The phase shifter performs all the tasks of vector generation, gain control, and vector summation in a single block (phase shifter core) to save power and area. The phase shifter core provides 360° of continuous phase tuning with an adjustable amplitude while consuming only 0.063 mm2 of on-chip area. The phase shifter can generate a signal with a tunable phase and magnitude in a phased array, thereby providing a better control over the beamwidth and sidelobe levels. The circuit is frequency reconfigurable, and its center frequency can be tuned within 26–28 GHz with an instantaneous bandwidth of 3 GHz. The phase shifter, fabricated in 130-nm CMOS technology, occupies an area of 0.284 mm2 (excluding the pads) and consumes 27 mW of power. The phase shifter’s RMS phase and gain errors for 64 measured phase states are less than 2.6° and 0.31 dB, respectively, within the 3-dB bandwidth. The measured IP1dB and IIP3 are larger than −9.8 and 0 dBm, respectively. This phase shifter is a good candidate for automotive radar as well as 5G applications.

Analysis of Magnetically Coupled All-Pass Network for Phase-Shifter Design

An all-pass network with magnetic coupling between its two inductors is analyzed in the context of phase-shifter design. Using even-odd mode analysis, the scattering parameters of the magnetically coupled all-pass network (MCAPN) are derived. Criteria for the network to provide an all-pass frequency response are obtained. Two switched-network phase-shifter topologies based on the MCAPNs are investigated. The results show that positive magnetic coupling between the inductors within the network boosts the amount of phase shift, whereas negative magnetic coupling broadens the bandwidth over which the phase shift remains constant. By using the MCAPNs for phase-shifter design, the tradeoff between the amount of phase shift and the bandwidth can be exploited, which not only adds to the design freedom, but suggests potential performance enhancement. For experimental verification, a 1-bit 22.5° phase shifter and a 4-bit 360° phase shifter are designed based on the analyzed MCAPNs with negative coupling factor. The measured phase error of the 1-bit phase shifter is less than 5% of the target phase shift from 2.38 to 4.80 GHz, corresponding to a bandwidth of 67%. The measured root mean square phase error of the 4-bit phase shifter is less than 3° from 1.62 to 3.89 GHz, which translates into a bandwidth of 82%.

An active nonreciprocal phase shifter topology

A novel hybrid active nonreciprocal phase shifter (NRPS) topology is proposed in this contribution. A test vehicle of the topology, realized in hybrid form to operate in L-band with a 90° differential phase shift has been realized and tested. The resulting system exhibits a 28% bandwidth centered at 1.4 GHz. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:1659–1661, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26913

Ka-Band 5-Bit MMIC Phase Shifter Using InGaAs PIN Switching Diodes

The design and performance of a Ka-band 5 b MMIC phase shifter using InGaAs PIN switching diodes is presented. In order to achieve low insertion loss and good phase shifting characteristics at Ka-band, a switched reactance type InGaAs PIN-diode phase shifter topology has been employed with a compact bias network. The fabricated InGaAs PIN MMIC phase shifter has demonstrated good performance characteristics such as a low insertion loss of less than 7.8 dB and a high P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> dB of 21.0 dBm compared to the previous results.

High/low-impedance transmission-line and coupled-line filter networks for differential phase shifters

Two compact and simple to design differential phase shifter topologies, based on high/low-impedance transmission-line sections and open-ended coupled-line sections, are presented for the first time. The basic circuit theory for single section topologies is reviewed, leading to design equations and graphs for direct circuit synthesis. Balanced topologies and multiple section designs are also proposed improving the performance and feasibility of the phase shifters. Two planar microstrip single section differential phase shifter hybrids, at a centre frequency of 12 GHz and a 45 and 135° phase difference have been designed and manufactured. The designs have a simulated 0.5 dB amplitude and 1° phase imbalance over more than 25 and 40% bandwidth, respectively. Experimental results verify the circuit performance and feasibility of the proposed differential phase shifters.

Low-power Tx module for high-resolution continuous programmable phase shift

A novel phase shifter topology for digital phased antenna arrays based on a low-power phase control block joint with an innovative PLL design is presented. Experimental results obtained by a prototype are reported validating the architecture capabilities.

Design and modeling of 4-bit slow-wave MEMS phase shifters

A true-time-delay multibit microelectromechanical systems (MEMS) phase-shifter topology based on impedance-matched slow-wave coplanar-waveguide sections on a 500-mum-thick quartz substrate is presented. A semilumped model for the unit cell is derived and its equivalent-circuit parameters are extracted from measurement and electromagnetic simulation data. This unit cell model can be cascaded to accurately predict N-section phase-shifter performance. Experimental data for a 4.6-mm-long 4-bit device shows a maximum phase error of 5.5deg and S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sub> less than -21 dB from 1 to 50 GHz with worst case S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">21</sub> less than -1.2 dB. In a second design, the slow-wave phase shifter was additionally loaded with MEMS capacitors to result in a phase shift of 257deg/dB at 50 GHz, while keeping S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sub> below -19 dB (with S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">21</sub> <-1.9 dB). The beams are actuated using high-resistance SiCr bias lines with typical actuation voltage around 30-45 V

Electronically tunable multi-line TRL usingan impedance matched multi-BitMEMS phase shifter

An electronically tunable thru-reflect-line (TRL) calibration set that utilizes a 4-b true time delay microelectromechanical systems (MEMS) phase shifter topology, based on impedance-matched slow-wave coplanar waveguide (CPW) sections, is presented. The accuracy of the tunable TRL is close to a conventional multi-line TRL calibration and shows a maximum error bound of 0.12 at 40GHz. Experimental data for a 4.6mm-long tunable delay standard shows 317/spl deg//dB phase shift at 50GHz (or 91/spl deg//mm) with S/sub 11/ less than -21dB from 1-50GHz. The MEMS beams on the phase shifter are actuated using high resistance SiCr bias lines with typical actuation voltage around 30-45V.

A miniaturized MMIC analog phase shifter using two quarter-wave-length transmission lines

This paper describes a miniaturized monolithic-microwave integrated-circuit (MMIC) analog phase shifter using two quarter-wave-length transmission lines. A conventional analog phase shifter employs an analog phase-shifter topology using a 3-dB 90/spl deg/ branch-line hybrid requiring four quarter-wave-length transmission lines. Thus, in the first stage of our study, we present a new analog phase-shifter topology using only two quarter-wave-length transmission lines. The phase shifter here has only one-half as many transmission tines as a conventional analog phase shifter using a 3-dB 90/spl deg/ branch-line hybrid, and the circuit can be miniaturized to less than one-fourth as compared to the conventional analog phase shifter. Furthermore, we show that the operating frequency range of the phase shifter is very wide and can obtain large phase variation with small capacitance variation. Next, an experimental Ku-band MMIC analog phase shifter is presented. A phase shift of more than 180/spl deg/ and an insertion loss of 3.6/spl plusmn/1.1 dB are obtained at the frequency range from 12 to 14 GHz. The chip size of the experimental MMIC phase shifter is less than 3.0 mm/sup 2/.