Phase-shifted Sinusoidal Pulse Width Modulation Research Articles

Current-Prediction-Controlled Quasi-Z-Source Cascaded Multilevel Photovoltaic Inverter

To address problems that traditional two-stage inverters suffer such as high cost, low efficiency, and complex control, this study adopts a quasi-Z-source cascaded multilevel inverter. Firstly, the quasi-Z-source inverter utilizes a unique impedance network to achieve single-stage boost and inversion without requiring a dead zone setting. Additionally, its cascaded multilevel structure enables independent control of each power unit structure without capacitor voltage sharing problems. Secondly, this study proposes a current-predictive control strategy to reduce current harmonics on the grid side. Moreover, the feedback model of current and system state is established, and the fast control of grid-connected current is realized with the deadbeat control weighted by the predicted current deviation. And a grid-side inductance parameter identification is added to improve control accuracy. Also, an improved multi-carrier phase-shifted sinusoidal PWM method is adopted to address the issue of switching frequency doubling, which is caused by the shoot-through zero vector in quasi-Z-source inverters. Finally, the problems of switching frequency doubling and high harmonics on the grid side are solved by the improved deadbeat control strategy with an improved MPSPWM method. And a seven-level simulation model is built in MATLAB (2022b) to verify the correctness and superiority of the above theory.

Sensorless Capacitor Voltage Detection Method of Cascaded H-Bridge STATCOM Based on Special Switching Mode Identification

The cascaded H-bridge (CHB) static synchronous compensator (STATCOM) has been widely used in wind farm and conflux station. As the grid-connected voltage increases, the number of cascaded CHB proportionately increases. In order to achieve the capacitor voltage balance, it is necessary to independently detect the capacitor voltage of all H-bridge cells, which raises the cost of capacitor voltage detection. To solve this problem, the mapping relationship is studied between the converter output voltage and capacitor voltages by analyzing carrier phase-shifted sinusoidal pulse width modulation technique (CPS-SPWM), and special switching mode is firstly found. Based on the above finding, without changing the conventional CHB topology, an improved sensorless detection method is proposed to solve the problems of detection error, large computation burden and the application limitation in existing sensorless detection methods. Compared with conventional sensor detection, this method not only saves DC voltage sensors and data transmission channels but also suppress the third harmonics in the converter current. Finally, the effectiveness of the detection method applied on CHB STATCOM is proved by simulation and experiment.

A Novel Open-Circuit Fault Detection and Localization Scheme for Cascaded H-Bridge Stage of a Three-Stage Solid-State Transformer

A three-stage solid-state transformer (SST) is a preferred replacement for line frequency transformer as it provides ancillary services in addition to stepping-up/down of grid voltages. Each active switch in SST is a potential source of failure, and a quick fault detection and isolation help in reducing the downtime. In this article, a novel fault detection and localization algorithm is proposed to localize the open-circuit (OC) faults (be it a single switch fault or multiple switch faults in multiple modules) in the cascaded H-bridge (CHB) stage of the SST. The proposed method is designed such that only one voltage sensor is needed to measure the grid-side voltage of the CHB for fault detection and localization. By comparing the estimated grid-side voltage of the CHB with the measured values, OC fault is detected. Once the fault is detected, the modulation scheme is switched from phase-shifted unipolar sinusoidal pulsewidth modulation (SPWM) to phase-shifted bipolar SPWM to localize the faults. The difference in the measured grid-side voltage of the CHB before and after each module's state change is calculated and faults are localized. The presented algorithm is substantiated using experimental results from a 1-kVA SST prototype. The main advantage of the proposed algorithm is that it requires only 2n comparisons to localize the faulty modules in a CHB with n H-bridges, which takes less than a line cycle to complete.

Single stage Boost Cascaded Multilevel Inverter Based on Switched Inductor Structure

This paper presents the experimental investigations of Switched Inductor cell (SL-FLCHBqSBI) based Five-Level Cascaded H-Bridge quasi Switched Boost Inverter for Renewable Energy (RE) applications. The SL-FLCHBqSBI topology is based on the ripple input current Switched Inductor Boost Inverter (SLBI) structure which is available in the literature. In this work, a stiff DC voltage of 36 V is taken as input to deliver a power of 100 W across a resistive load is designed. The control signals for the active devices are generated using Phase-Shifted sinusoidal Pulse Width Modulation (PS-PWM) modulation technique. The SL-FLCHBqSBI topology provides a higher voltage gain of 2.83 compared to the conventional topologies for a low duty ratio. The simulation is performed in MATLAB/Simulink environment and the simulation results are presented. A hardware set up is implemented and experiments are carried out to check the consistency of the theoretical concepts with the working of the proposed topology in practical.

A Space Vector Modulation Scheme of the Quasi-Z-Source Three-Level T-Type Inverter for Common-Mode Voltage Reduction

The conventional three-level inverter suffers the limitation of voltage buck operation. In order to give both voltage buck and boost operation capability, the quasi-Z-source three-level T-type inverter (3LT <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> I) has been proposed. This paper further proposes a space vector modulation (SVM) scheme for the quasi-Z-source 3LT <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> I to reduce the magnitude and slew rate of common-mode voltage (CMV). By properly selecting the shoot-through phase, the shoot-through states are inserted within zero vector in order not to affect the active states and output voltage. Doing so, the CMV generated by the quasi-Z-source 3LT <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> I is restricted within one-sixth of dc-link voltage, and voltage boosting and CMV reduction can be simultaneously realized. In addition, high dc-link voltage utilization can be maintained. The proposed scheme has been verified in both simulations and experiments. Comparisons are conducted with the conventional SVM method and the phase-shifted sinusoidal PWM method.

A Comparison of Modulation Techniques for Modular Multilevel Converters

This work presents a comparison of three different modulation techniques applied to modular multilevel converters (MMCs). The three modulation strategies studied in this paper are the phase-shifted sinusoidal pulse width modulation (PS-SPWM), the space-vector modulation (SVM) and the nearest level modulation (NLM). This paper focuses on analysing the particularities and implementation of each modulation technique. The modulation technique largely defines the generated harmonic content, making this is a key point that must be studied in depth. The paper briefly describes the three modulation techniques and analyses the harmonics generated by each one of the methods. In addition, the paper presents and compares the digital implementation of the three modulation methods in a Field Programmable Gate Array (FPGA). The proposed approaches are validated using a real processing platform and experimentally evaluated in a real high-power six-level MMC.

A Single DC Source Cascaded Seven-Level Inverter Integrating Switched-Capacitor Techniques

In this paper, a novel cascaded seven-level inverter topology with a single input source integrating switched-capacitor techniques is presented. Compared with the traditional cascade multilevel inverter, the proposed topology replaces all the separate dc sources with capacitors, leaving only one H-bridge cell with a real dc voltage source and only adds two charging switches. The capacitor charging circuit contains only power switches, so that the capacitor charging time is independent of the load. The capacitor voltage can be controlled at a desired level without complex voltage control algorithm and only use the most common carrier phase-shifted sinusoidal pulse width modulation strategy. The operation principle and the charging–discharging characteristic analysis are discussed in detail. A 1-kW experimental prototype is built and tested to verify the feasibility and effectiveness of the proposed topology.

Reduction of Common-Mode Voltage in Multiphase Two-Level Inverters Using SPWM With Phase-Shifted Carriers

The increasing interest in multiphase drive systems has led to the extension of inverter topologies and pulse width modulation (PWM) methods from three-phase to multiphase occasions. Carrier-based PWM (CPWM) dominates space vector PWM when the phase number increases, because of its simple computation and modular implementation. Although intensive work has been done on modifying PWM methods to reduce the common-mode voltage (CMV), not enough work has been done on CPWM methods with CMV reduction for multiphase drives. This paper extends the phase-shifted sinusoidal PWM (PS-SPWM) method for five-phase and six-phase two-level voltage-source inverters (VSI) and employs the intersection-plotting method and Fourier analysis to reveal the nature of the CMV. Both experiment and simulation results comply with theoretical analysis that compared with the conventional SPWM, the PS-SPWM can effectively reduce the CMV in peak-to-peak value and RMS value, though it leads to a higher phase current distortion. In addition, the hardware realization of PS-SPWM for multiphase inverters by a distributed control system is presented in this paper.

Current Source Modular Multilevel Converter: Detailed Analysis and STATCOM Application

Multilevel current source converters are a smart choice for the high-power applications with low-voltage and high-current requirements. This paper presents the detailed analysis of a current source modular multilevel converter (CSMMC) and its application as a STATCOM. Various properties of CSMMC are compared with the voltage-source modular multilevel converter (VSMMC). The submodule inductance selection method and a sorting-based algorithm for inductor current balancing are proposed for CSMMC. The validity of the inductance selection method and the inductor current balancing algorithm are confirmed by the simulation of a three-phase CSMMC using PSCAD/EMTDC. The carrier phase-shifted sinusoidal pulsewidth modulation is used as the switching technique. The performance of a converter is analyzed with interleaved and noninterleaved carrier signals for the upper and lower arms. Results show that CSMMCs and corresponding VSMMCs have analogous features. Hence, the development on VSMMCs can be used for reference to CSMMCs and vice-versa. Furthermore, the control designs for CSMMC-based STATCOM are presented and verified using simulations. The obtained results of the proposed STATCOM show that the steady-state and transient performance of the system are quite satisfactory. This makes the CSMMC suitable for HVDC and flexible ac transmission systems applications.

Control scheme for cascaded H‐bridge converter‐based distribution network static compensator

In this study, a new control scheme is proposed for cascaded H-bridge (CHB)-based static compensator (STATCOM). The new indirect current control method does not require any current sensors, so the total system has enhanced reliability. Using the proposed control approach, dc-link voltages across dc-link capacitors are regulated to the reference value, even if the H-bridge cells dissipate different amounts of losses. However, regardless of the active power distribution, the reactive power is equally shared between the cells. The proposed scheme is investigated on distribution network STATCOM, but is not restricted to that and can be applied to STATCOMs at any voltage and power level. Multicarrier phase-shifted sinusoidal pulse-width modulation is used for modulation purpose, since it is naturally the best option for CHB converter. In this way, low-order harmonics are eliminated from the line side current and the current THD is below 5%, which satisfies IEEE-519 standard. To verify the feasibility of the control strategy, simulations as well as experimental implementations are carried out on a CHB converter having three cells in each phase.

Study on Capacitor Voltage Balancing Control of Modular Multilevel Converter at Low Frequency

 Abstract—This paper describes a control method and the operating performances of Modular Multilevel Converter (MMC) for high-voltage motor drive. The magnitude of capacitor voltage ripples increases when operating frequency decreases. To deal with the significant voltage fluctuation under low frequency conditions, theoretical analysis is presented in this paper, and a new capacitor voltage balancing control strategy is proposed, which is based on carrier phase-shifted sinusoidal pulse width modulation (CPS-SPWM). The simulation results show that MMC works well and capacitor voltages are balanced with the control strategy at low frequency.

A Five-Level Symmetrically Defined Selective Harmonic Elimination PWM Strategy: Analysis and Experimental Validation

A five-level symmetrically defined multilevel selective harmonic elimination pulsewidth modulation (MSHE-PWM) strategy is reported in this paper. It is mathematically expressed using Fourier-based equations on a line-to-neutral basis. An equal number of switching transitions when compared against the well-known multicarrier phase-shifted sinusoidal PWM (MPS-SPWM) technique is investigated. For this paper, it is assumed that the four triangular carriers of the MPS-SPWM method have nine per unit frequency resulting in seventeen switching transitions for every quarter period. For the proposed MSHE-PWM method, this allows control of sixteen harmonics and the fundamental. It is confirmed that the proposed MSHE-PWM offers significantly higher converter bandwidth in the standard range of the modulation indices. Moreover, when the bandwidth is reduced to be equal with the one offered with the MPS-PWM, the modulation index can be increased resulting in a higher gain and at a reduced switching frequency overall. Selected solutions for the switching transitions are presented and verified experimentally in order to confirm the effectiveness of the proposed technique.

VSC Transmission System Using Flying Capacitor Multilevel Converters and Hybrid PWM Control

A high-voltage direct current (HVDC) transmission system based on three-level flying capacitor (FC) multilevel converters with hybrid pulse-width modulation (PWM) is presented in this paper. Selective harmonic elimination PWM (SHE-PWM) is used during normal operating conditions and is switched to phase-shifted sinusoidal PWM (PS-SPWM) during an asymmetric network fault. The generation of the switching patterns under SHE-PWM control for each power device is described taking into account the natural balancing of the FC voltages. A new and simple control method for balancing the FC voltages when using SHE-PWM is proposed which is based on the small change of the firing angle according to the polarity of the load current. The FC voltage ripple under SHE-PWM control is estimated and compared to that under PS-SPWM. A method to implement the proposed hybrid PWM with capacitor voltage balancing is also provided. Simulation studies on a 300-MW/plusmn150 kV voltage-source converter transmission system are presented to confirm the satisfactory performance of the proposed system under active and reactive power variations and single-phase fault conditions

Flying capacitor multilevel PWM converter based UPFC

A unified power flow controller (UPFC) based on the flying capacitor (FC) multilevel voltage-source converter (VSC) topology with phase-shifted sinusoidal pulse-width modulation (PWM) control is presented. This converter allows higher power handling, potentially lower power loss, lower harmonic distortion and hence less filtering requirements when compared with the typical two-level counterpart. The series converter injects a voltage with controlled magnitude and phase, to control the active/reactive power flow in a transmission line. The shunt converter absorbs/ supplies active power demanded by the series converter to maintain a constant DC link voltage, also providing independent reactive support to the network. A complete model of the proposed UPFC system is shown and control circuits are described in the synchronous d-q frame. Finally, simulation results are provided to confirm the robustness of the proposed system.

A new type of STATCOM based on cascading voltage-source inverters with phase-shifted unipolar SPWM

In this paper, a new type of static compensator (STATCOM) is proposed. This new STATCOM is constructed by cascading several identical full-bridge (H bridge) voltage-source inverters (VSIs). A so-called phase-shifted sinusoidal pulsewidth modulation (SPWM) unipolar voltage switching scheme is applied to control the switching devices of each VSI. The harmonics in STATCOM current caused by the DC voltage ripple is rejected by a new method developed in this paper. As a result, the size of inductor and DC capacitors can be further reduced. A very effective startup procedure is proposed to start up the STATCOM. The proposed STATCOM has the advantage of a fewer number of VSIs, the VSIs being identical and extremely fast in response to reactive power change.

UPFC using multiconverter operated by phase-shifted triangle carrier SPWM strategy

The acronym UPFC covers Ggugyi's unified power flow controller and Akagi and Fujita's unified power flow conditioner. This paper describes one method of meeting high MVA specifications by using multiple modules of two-level three-phase power converter modules controlled by the phase-shifted triangle carrier technique of the sinusoidal pulsewidth modulation (SPWM) strategy. Two conceptual designs are presented. The first is the gate-turn-off (GTO)-SPWM-UPFC at the lowest switching rate, f/sub c//f/sub m/=3, to minimize GTO switching loss. The design is based on applying the fundamentals of SPWM theory to overcome unbalances arising from sideband harmonic interferences. The second is the insulated gate bipolar transistor (IGBT)-SPWM-UPFC, at f/sub c//f/sub m/=12 or higher, in which SPWM theory assures that direct paralleling of the modules is free of current unbalance. A laboratory UPFC based on six modules of three-phase 5-kVA size IGBT power converters operating at the baseline condition of dual unity displacement factor at the sending end and the receiving end has been implemented.