Phase Opposition Disposition Technique Research Articles

Improved DTC-SPWM strategy of induction motor by using five-level POD-PWM inverter and MRASSF estimator

This article presents an improved direct torque control strategy based on proportional-integral controllers applied to an asynchronous cage motor. The main objective of this study is to improve the system performance by reducing the electromagnetic torque and stator flux ripples while adjusting the currents shape by optimizing the total harmonic distortion, and this by supplying the motor with a diode clamped five-level inverter using the phase opposition disposition technique. Furthermore, the use of an observer employing the stator flux based model reference adaptive system allows improving the control performance by using a sensorless algorithm to obtain an accurate estimation, therefore, increase the system reliability. A comparative study between the five-level inverter installation with the same system and the same control strategy but another two different topologies of inverters; such as the NPC three-level inverter and the conventional two-level inverter has been made under MATLAB/SIMULINK to validate the efficiency of the proposed installation under various tracking and robustness tests.

Enhancing the Performance of Multilevel Inverters using Modified SVPWM Techniques

In this paper, two types seven-level multilevel inverters in three phase configuration, Cascaded H-bridge Multilevel Inverter (CMLI) and Diode Clamped Multilevel Inverter (DCMLI) are simulated and compared the results for three different carrier PWM techniques. Here, Carrier based Sinusoidal Pulse Width Modulation (SPWM), Third Harmonic Injected Pulse Width Modulation (THIPWM) and Modified Carrier-Based Space Vector Pulse Width Modulation (SVPWM) are used as modulation strategies. These modulation strategies include Phase Disposition technique (PD), Phase Opposition Disposition technique (POD), and Alternate Phase Opposition Disposition technique (APOD). In all the modulation strategies, triangular carrier and trapezoidal triangular carrier signals are compared with reference signal for generation of control pulses. The simulations have been carried out for seven-level CMLI and DCMLI using MATLAB/Simulink. The detailed analysis of results in terms of %THD and utilization of DC-link voltage has been presented in this paper. By increasing the performance of inverters the utilization of input energy is reduced, then the corresponding energy sources can be reduced.

Evaluation of POD and APOD multicarrier SPWM techniques for three-phase seven-level diode clamped multilevel inverter fed induction motor drive using FPGA

Multilevel inverters have drawn tremendous interest in high power high voltage applications due to their merits such as reduced voltage stress on switches, lower EMI problems and reduction in THD. The MLI technology is also advantageous in improving output waveforms due to the higher number of levels in the waveform of output voltage along with a reduced input filter size which is useful for grid connected applications. This paper focuses on implementation of three-phase diode clamped multilevel inverter fed induction motor drive using various multicarrier-based sinusoidal pulse width modulation techniques. The performance analysis of the inverter is carried out using phase opposition disposition (POD) and alternate phase opposition disposition (APOD) techniques. In addition to this, the comparison of the modulation methods is also analysed. Simulation is performed using MATLAB/Simulink. The POD and APOD carrier-based sinusoidal pulse width modulation techniques for three-phase seven-level diode clamped multilevel inverter are implemented on VPE Spartan 3A DSP board using Xilinx field programmable gate array (FPGA) and the experimental results are presented to validate the effectiveness of the operation of the seven-level diode clamped multilevel inverter using PWM strategies.

Comparative Analysis of Symmetrical/Asymmetrical Quasi Z-Source Cascaded Multilevel Inverter with Alternative Phase Opposition Disposition Technique

Abstract This paper presents a detailed comparative analysis between Symmetrical and Asymmetrical Quasi Z-Source Cascaded Multilevel Inverter (QZS-CMI). The comparative analysis investigates for boost operation in both Symmetrical and Asymmetrical System. Analysis is done based on the achieved input current, capacitor voltage of the upper capacitor and parallel capacitor and the two inductors current of DC link (Quasi Z-Source network) which is combined with H-bridge. In Asymmetrical QZS-CMI, the input voltage for three DC sources are given in the ratio of 1:3:9, i. e. the system is designed for 27 level. Asymmetrical QZS-CMI is new system and proposed in this paper for comparative analysis with Symmetrical QZS-CMI. An advanced optimal Alternative Phase Opposition Disposition (APOD) technique is developed and implemented. Symmetrical system has high boosting capability of output voltage, reducing the switching losses, high voltage gain and lower spikes in switching voltage. The comparative study is done and results are verified with Experimental 250 W prototype model and also verified by using MATLAB/ Simulink.

Comparison of Seven and Nine Level Flying Capacitor-Multilevel Inverter using Staircase and Stepped Modulation

In this paper, a seven-level and nine-level flying capacitor inverter (FLI) is modeled and simulated. For the control of the switches, distinct multicarrier PWM strategies such as In Phase Disposition (IPD) PWM, Phase Opposition Disposition (POD) PWM and Alternative Phase Opposition Disposition (APOD) PWM are implemented by considering three reference signals, namely sine, step and staircase. Intensive simulation experiments are carried out under matlab/simulink environment and fundamental value and harmonics of output voltages of the seven-level FLI and nine-level FLI under different modulation conditions viz., IPD, POD, APOD are measured and compared. Simulation results illustrates IPD and POD technique gives a better output waveform with lower THD value than APOD technique.

Modeling of A Single Phase 7-Level Cascaded H-Bridge Multilevel Inverter

Recently, almost all industrial devices are mostly built on electronic devices which are precisely sensitive to harmonic. In order to meet the requirement from the industries demand aimed at a free-harmonics and high power rating source is remarkably increased in past few years. An inverter which a device or electric circuit that convert direct current to alternating current is one of the electronic devices that give concern to researchers for improvement of generating a neat power source. The inverter can be categorized into a single level and multilevel inverter. As compared to single level inverter, multilevel inverter offers minimum harmonic distortion and higher power output. This paper presents a model of multilevel inverter using 7-level Cascaded H-Bridge of multilevel DC-AC inverter to reduce total harmonic distortion with different sinusoidal pulse width modulation such as phase disposition and phase opposition disposition. Simulation output of single phase multilevel inverter cascaded H-bridge are analysed and verified in the Matlab/Simulink software. The result show that the 7-level cascaded H-Bridge multilevel inverter with phase disposition technique generate less total harmonic distortion if it is compared to the phase opposition disposition technique.

Implementation and performance analysis of cascaded multilevel inverter using modified SVPWM techniques

The space vector pulse width modulation (SVPWM), which is considered as an efficient PWM technology can also be used for multilevel inverters. This method is originally designed for two-level inverters. This paper introduces a modified SVPWM technique. The cascaded H-bridge multilevel inverter (CMLI) of 7-level, 9-level and 11-level are simulated for three different carrier PWM techniques. Here, carrier-based sinusoidal pulse width modulation (SPWM), third harmonic injected pulse width modulation (THIPWM), and modified carrier-based SVPWM are used as modulation strategies. These modulation strategies include phase disposition technique (PD), phase opposition disposition technique (POD), Alternate Phase Opposition Disposition technique (APOD), and Phase Shifted Carrier (PSC). These strategies have been implemented by using simulation and validated by experiment. The detailed examination of the simulation results has been presented and validated with experimental results of 11-level CMLI.

Implementation and performance analysis of cascaded multilevel inverter using modified SVPWM techniques

The space vector pulse width modulation (SVPWM), which is considered as an efficient PWM technology can also be used for multilevel inverters. This method is originally designed for two-level inverters. This paper introduces a modified SVPWM technique. The cascaded H-bridge multilevel inverter (CMLI) of 7-level, 9-level and 11-level are simulated for three different carrier PWM techniques. Here, carrier-based sinusoidal pulse width modulation (SPWM), third harmonic injected pulse width modulation (THIPWM), and modified carrier-based SVPWM are used as modulation strategies. These modulation strategies include phase disposition technique (PD), phase opposition disposition technique (POD), Alternate Phase Opposition Disposition technique (APOD), and Phase Shifted Carrier (PSC). These strategies have been implemented by using simulation and validated by experiment. The detailed examination of the simulation results has been presented and validated with experimental results of 11-level CMLI.

Design and Performance Analysis of 7-Level Diode Clamped Multilevel Inverter Using Modified Space Vector Pulse Width Modulation Techniques

In this paper, a 7-level Diode Clamped Multilevel Inverter (DCMLI) is simulated with three different carrier PWM techniques. Here, Carrier based Sinusoidal Pulse Width Modulation (SPWM), Third Harmonic Injected Pulse Width Modulation (THIPWM) and Modified Carrier-Based Space Vector Pulse Width Modulation (SVPWM) are used as modulation strategies. These modulation strategies include Phase Disposition technique (PD), Phase Opposition Disposition technique (POD), and Alternate Phase Opposition Disposition technique (APOD). In all the modulation strategies, triangular carrier and trapezoidal triangular carrier signals are compared with reference signal, then control pulses are generated. The detailed analysis of the results has been presented and compared with experimental results in terms of fundamental component of output voltage and percent of THD.

Grid connected Boost-Full-Bridge photovoltaic microinverter system using Phase Opposition Disposition technique and Maximum Power Point Tracking

This paper presents a novel grid-connected boost-full-bridge photovoltaic (PV) micro-inverter system and its control implementations. The concept of micro-inverter is a future trend for grid connected Photovoltaic micro-inverter. Increasing demand on the renewable energy sources has made the grid connected inverter systems to be more important than ever before. Maximum Power Point Tracking (MPPT) technique is implemented which is used by the grid connected inverters to get the maximum power from one or more photovoltaic device, typically solar panels. The Z source network is used to get the steady state. Interleaving of the Boost DC-DC converter is carried out to get more boosts up the voltage and better efficiency. A new multilevel inverter topology constituting of an H-bridge structure with four switches connected to the DC link. Based on Phase Opposition Disposition technique a new PWM method requires only one carrier signal is suggested.