Phase-locked Loop Approach Research Articles

Implementation of variable gain controller based improved phase locked loop approach to enhance power quality in autonomous microgrid

AbstractIn this paper, an energy storage system (ESS), solar photovoltaic (SPV) and wind‐driven self‐excited induction generator (SEIG) is being used to establish an autonomous microgrid (MG). A variable gain controller based improved phase locked loop (VGC‐IPLL) is implemented to detect phase angle and generate unit templates for implementing a power quality control scheme in an autonomous MG. This controller enables the system adaptability to input frequency deviations and quick response with reduced steady state error. The novelty of this work is the implementation of VGC‐IPLL based controller in MG which automatically varies the gain according to variation in error. An incremental conductance (IC) based peak power point tracking technique is implemented to harness peak power from an SPV. Further, An ESS is interfaced at dc link of the voltage source converter (VSC) to maintain the power equilibrium between the renewable energy sources (RES's) and the unbalanced load. A bi‐directional controller (BDC) provides dc link voltage regulation and manages the charging/discharging mode of an ESS. Moreover, an ESS provides real/reactive power support through VSC during the intermittent condition of RES's and consumes the unused power during light load conditions. The proposed control with VSC provides multi‐function such as harmonics abatement, real/reactive power support, regulation of dc link voltage, load balancing and minimizes the power quality issues of autonomous MG.

A High-Performance Pll Observer for Sensorless Three-Phase Induction Motor Control

This paper presents an enhanced estimation algorithm based on the PLL (phase-locked loop) approach, which is used to estimate the rotor speed in induction motors (IM) drives. It can be challenging to obtain an accurate estimate during frequency ramps using existing PLL schemes. Thus, the performance of PLL schemes can be degraded during the acceleration and deceleration operations when applied to motor drives. In addition, the performance of conventional PLL scheme estimation is negatively affected by disturbances, for example, DC offsets. One of the novelties of the proposed speed observer (HPPO - High-Performance PLL Observer) is error normalization, which is based on the currents and a mechanism of variable gain based on the reference speed. The reference speed is also used to build an additional feedforward adjustment action. These modifications improve estimator results during load insertions and at low rates. In order to validate the proposed HPPO algorithm, it is implemented experimentally in a laboratory prototype using a 2.2kW IM. The motor is driven by a three-phase pulse width modulation (PWM) power converter, which is controlled by a DSP TMS320F28069. Numerical analysis and experimental results are carried out to validate the proposed scheme's high performance.

An Adaptive Frequency PLL Approach for Grid Connected Multifunctional Inverter for Residential Applications

This paper presents an adaptive frequency Phase locked loop (PLL) based approach for grid connected multifunctional inverter is presented for residential applications. The proposed control structure deals with non-linear loads and also non ideal grid voltages like magnitude variation, frequency variation, unbalance harmonics, etc. and can effectively address the DC offset in a voltage signal which in turn improves the power quality. A third order generalized integrator based PLL with adaptive frequency and DC offset elimination blocks will effectively deal with the power grid voltage fluctuations, frequency variations and eliminate the phase difference between PLL output. This approach is implemented as control algorithm for single-stage single-phase grid connected multifunctional inverter topology for PV applications which feeds energy to the grid. The Maximum Power Point Tracking is obtained by Perturb & Observe method for extracting maximum power from a Photovoltaic system. A detailed analysis with the proposed control technique is presented in this paper. Experimental tests are conducted at various operating conditions to describe and verify the performance of the proposed control using MATLAB / Simulink.

Robust Fault Ride-Through of Converter-based Generation during Severe Faults with Phase Jumps

As grid-connected converters are at risk of losing synchronism with the grid when exposed to extreme voltage sags, this might jeopardize the stability during a fault and a converter's ability to comply with fault ride-through requirements. This article investigates the synchronization stability of grid-tied converters during severe symmetrical faults with phase jumps. To achieve zero-voltage ride-through capability, a frozen phase-locked loop (PLL) structure can be employed to guarantee stability during faults. However, as the frozen PLL approach is unaware of frequency drifts and phase-angle jumps in the grid voltage, its performance during nonconstant frequency and phase is unknown. Therefore, this article investigates and provides new insight into how the frozen PLL performs during phase jumps and reveals whether phase compensation should be utilized to improve the converter response during a severe symmetrical fault. It is disclosed, that even though phase compensation can improve the injected currents during a fault situation including large phase jumps, a noncompensated frozen PLL can inherently ensure stability and allow for zero-voltage ride-through capability at an acceptable current injection. Furthermore, the robustness of the frozen PLL has been analyzed through a comprehensive simulation study where three test cases have been experimentally verified, which confirms the presented findings.

A Fast and Precise Grid Synchronization Method Based on Fixed-Gain Filter

As the demand for electricity is growing and the penetration of renewable energy resources is increasing, grid synchronization with high accuracy is essential for utility networks. This paper presents a novel fixed-gain filter (FGF) scheme with an optimal fixed feedback gain matrix to estimate the (angle) position and frequency of the grid, which ensures a fast and accurate synchronization under varying grid conditions. Instead of using the conventional phase-locked loop (PLL) scheme that suffers from the difficulty of parameter selection, the concept of the Kalman filter (KF) is synthesized to design the second-order FGF and third-order FGF for synchronization. To overcome the heavy computational processing for the KF, the feedback gain is subject to a single tunable parameter only, which can be calculated offline and refined within a certain small range fulfilling the system stability criterion. Compared with the PLL approach, the new FGF provides a faster and more precise tracking performance, an easier parameter tuning mechanism, a lower program complexity, and a better grid stability, which is verified by simulations and experiments in all cases.

Word-Synchronous Optical Sampling of Periodically Repeated OTDM Data Words for True Waveform Visualization

An improved phase-locked loop (PLL) for versatile synchronization of a sampling pulse train to an optical data stream is presented. It enables optical sampling of the true waveform of repetitive high bit-rate optical time division multiplexed (OTDM) data words such as pseudorandom bit sequences. Visualization of the true waveform can reveal details, which cause systematic bit errors. Such errors cannot be inferred from eye diagrams and require word-synchronous sampling. The programmable direct-digital-synthesis circuit used in our novel PLL approach allows flexible adaption of virtually any problem-specific synchronization scenario, including those required for waveform sampling, for jitter measurements by slope detection, and for classical eye-diagrams. Phase comparison of the PLL is performed at 10-GHz OTDM base clock rate, leading to a residual synchronization jitter of less than 70 fs.

Active Filtering Function of Three-Phase PWM Boost Rectifier Under Different Line Voltage Conditions

Slight hardware and algorithm modifications as well as a higher power ratio of a three-phase pulsewidth-modulation (PWM) rectifier make compensation of neighboring nonlinear power load possible. The active filtering function enlarges the functionality of PWM rectifiers, which decreases the cost of additional installation of compensating equipment. It gives a chance to fulfill both shunt active filter (SAF) and PWM rectifier tasks in a multidrive system by one advanced converter. Thanks to the idea of virtual flux, the direct power control space-vector-modulated (DPC-SVM) and new synchronous double reference frame phase-locked loop approach, the control system is resistant to a majority of line voltage disturbances. This assures proper operation of the system for abnormal and failure grid conditions. Simulation and experimental results have proven excellent performance and verify the validity of the proposed system.

Analysis and characterization of PLL-based retrodirective array

In this paper, we present a new phase-locked loop (PLL) architecture that is capable of providing phase conjugation as required for retrodirective array action. An analysis is performed on the architecture, which shows that the presence of nonlinear mixing products gives rise to an additional and substantially larger RMS noise-induced phase-error component than is suggested by analysis based on ideal mixer properties. In addition, the analysis allows us to quantify the effect that a Doppler shifted signal has on phase-conjugation error. For the purpose of demonstration, we have constructed and characterized a six-element array operating using commercially available components at 1 GHz. Near-perfect retrodirective action is presented over a 360deg azimuth sweep, with 16-dB array gain. Due to the inherent isolation between input and output signals, and programmable retransmit frequency, the PLL approach introduced in this paper offers considerable practical advantage when used within retrodirective antenna arrays, as compared to the classical mixer-based approach where mixer losses and RF-to-IF frequency isolation are major issues

Integrated FSK demodulator with very high sensitivity

This paper presents a fully integrated highly sensitive frequency-shift keying (FSK) demodulator functioning at a modulation factor of 0.5%-0.1% and below. A dual-feedback phase-locked loop approach provides both very high sensitivity and sufficiently large tuning range. Experimental results in TSMC 0.25-μm CMOS technology demonstrate that Gaussian FSK signals of a modulation factor down to 0.06% can safely be demodulated.

Phase-Locked Loop Approach to the Automatic Measurement of Resonant and Anti-Resonant Frequencies of Piezoelectric Resonators

A new method for the selective and direct measurement of resonant and anti-resonant frequencies of piezoelectric resonators is proposed. The frequency need not be swept since the method is based on the principle of the phase-locked loop, and so it is suitable for automatic measurements, especially, of the temperature dependence of these frequencies. The method was tested for a preliminary setup and it took at most 4 seconds to obtain either of these two frequency values. Possible improvements of the design, including ways to more rapid operation, are suggested.

A mathematical model of the effects of light on the eclosion rhythm of the fruit flydrosophila pseudoobscura

A mathematical formulation useful in characterizing the effects of light on the pupal eclosion rhythm of the fruit flyDrosophila pseudoobscura is presented. It is based upon the premise that the underlying pacemaker oscillator behaves in a manner analogous to a customized version of a phase-locked loop circuit. Theoretical analyses supplemented with numerical simulations reveal that this phase-locked loop approach yields a concise mathematical characterization which is quite comprehensive in its scope, yet surprisingly accurate in the detail with which it can be used to successfully predict observed experimental results.

Automatic NMR field-frequency lock—pulsed phase locked loop approach

A self-contained deuterium frequency-field lock scheme for a high-resolution NMR spectrometer is described. It is based on phase locked loop techniques in which the free induction decay signal behaves as a voltage-controlled oscillator. By pulsing the spins at an offset frequency of a few hundred hertz and using a digital phase-frequency discriminator this method not only eliminates the usual phase, rf power, offset adjustments needed in conventional lock systems but also possesses the automatic pull-in characteristics that dispense with the use of field sweeps to locate the NMR line prior to closure of the lock loop.

Frequency-selective integrated circuits using phase-lock techniques

A system-oriented approach to the design of inductorless tuned integrated circuits is described. This design method uses the phase-locked loop (PLL) techniques to obtain the desired tuning and interference-rejection characteristics. The PLL approach does not require tight control of component tolerances, and offers a higher selectivity and frequency capability than the corresponding active-RC synthesis methods. In this paper, basic design parameters for phase-locked integrated circuits are given, and two separate design examples are described. First is a high- frequency (1 to 25 MHz) FM amplifier/detector, which forms a monolithic replacement for the IF strip and the detector sections of a conventional FM receiver or TV sound system. The second is an integrated FM multiplex receiver for multi-channel telemetry applications, which has the selectivity of a 6-pole bandpass filter and can be tuned by means of an external resistor or capacitor from a fraction of a cycle to over 300 kHz.