Phase Detector Characteristic Research Articles

On the pull-in and hold-in ranges of type 1 PLL with piecewise-linear phase detector characteristic

In the present work, we consider a special case of a second-order system of ordinary differential equations which describes dynamics of a synchronization circuit called a phase-locked loop (PLL). A lead-lag loop filter and a piecewise-linear phase detector characteristic are considered resulting the final model to be a type 1 PLL. The stability and synchronization properties of the loop are characterized by so-called hold-in range and pull-in range, which describe set of parameters providing local stability of equilibria and global stability of the system, respectively. In this article, we determine the set of loop parameters such that the pull-in and hold-in ranges coincide.

The Gardner Problem and Cycle Slipping Bifurcation for Type-2 Phase-Locked Loops

In the present work, a second-order type-2 phase-locked loop (PLL) with a piecewise-linear phase detector characteristic is analyzed. An exact solution to the Gardner problem on the lock-in range is obtained for the considered model. The solution is based on a study of cycle slipping bifurcation, which improves the well-known engineering estimates.

A Collocation-Based Algorithm for Analyzing Bifurcations in Phase Locked Loops with Tanlock and Sawtooth Phase Detectors

Analysis of bifurcation of second-order analog phase locked loop (PLL) with tanlock and sawtooth phase detectors is investigated. Both qualitative and quantitative analyses are carried out. Qualitatively, the basin boundaries of the attractors were constructed by plotting the stable and the unstable manifolds of the system. The basin boundaries show that the PLL under consideration for certain loop parameters has a separatrix cycle which terminates the limit cycle (out-of-lock state) and the loop pulls-in. This behavior is known in literature as homoclinic bifurcation and the value of the bifurcation parameter where this process occurs is called the pull-in range. Quantitatively, we propose a collocation-based algorithm to compute the separatrix cycle and the pull-in range. The separatrix cycle is approximated by a finite set of harmonics N with unknown amplitudes and by utilizing the fact that this limit cycle bifurcates from a separatrix cycle, a system of nonlinear algebraic equations is derived. For given values of filter parameters and gain, the algorithm numerically solves for the unknown amplitude of the harmonics and the value of the pull-in range simultaneously by evaluating the system at the collocation points. Results demonstrate that phase locked loop with sawtooth phase detector characteristics has the wider pull-in range followed by tanlock and sinusoidal, respectively.

Nonlinear analysis of hybrid phase-controlled systems in z-domain with convex LMI searches

Phase-controlled systems such as phase-locked loops (PLLs) have been used in numerous applications ranging from data communications to speed motor control. The hybrid case where only the phase detector is digital while others are analog has advantages over the classical PLLs in the sense that it provides a wider locking range and is more suitable when the input and output signals come in digital waveforms. Although such systems are inherently nonlinear due to the phase detector's characteristics, the nonlinearity is often bypassed in order to ease the analysis and design methods. This, however, will give erroneous results when the phase difference between input and output falls into the nonlinear range. Another source of inaccuracies in modeling PLLs is the continuous-time approximation, which is only useful if the operating frequencies of interest are much less than the incoming data transition rate. In this paper, we present a nonlinear analysis of a hybrid PLL in the z-domain where the stability is established via the discrete-time Lur'e-Postnikov Lyapunov function, and the performance is evaluated via the induced $\ell_2$ norm objective. The results are formulated in the form of linear matrix inequality searches, which are computationally tractable. We also extend the result for analysis of a PLL-based frequency synthesizer and provide several numerical examples to illustrate the effectiveness of the results compared to the existing ones.

Computation of the phase detector characteristic of a QPSK Costas loop

For a QPSK Costas loop with a constant input frequency, the phase detector characteristic is analytically computed in the pull-in range. The performance analysis of this loop is reduced to the consideration of differential equations describing the Costas loop in the phase space for proportionality-integrating loop filters.

Computation of the lock-in ranges of phase-locked loops with PI filter

In the present work the lock-in range of PLL-based circuits with proportionally-integrating filter and sinusoidal phase-detector characteristics are studied. Considered circuits have sinusoidal phase detector characteristics. Analytical approach based on the methods of phase plane analysis is applied to estimate the lock-in ranges of the circuits under consideration. Obtained analytical results are compared with simulation results.

A clock and data recovery circuit with programmable multi-level phase detector characteristics and a built-in jitter monitor

We demonstrate a clock and data recovery (CDR) circuit having a new type of a multi-level bang-bang phase detector (ML-BBPD). The gain characteristics of our ML-BBPD can be programmed by scanning the dead-zone width of a variable dead-zone BBPD in the time domain. Its linear-like gain characteristics result in less sensitive CDR performance against input jitter and process, voltage, and temperature (PVT) variations. In addition, a built-in on-chip jitter monitor can be easily implemented using our ML-BBPD. A prototype 1.25-Gb/s CDR based on our ML-BBPD with a built-in jitter monitor is realized with 0.18- $\mu{\rm m}$ CMOS technology and its performance is successfully verified with measurement.

Computation of the phase detector characteristic of classical PLL

Computation of the phase detector characteristic of classical PLL

Elegant analytic computation of phase detector characteristic for non-sinusoidal signals

A new elegant analytical method, based on the convolution theorem, for the computation of multiplier/mixer phase-detector characteristics is discussed. For various nonsinusoidal waveforms of signals, the computation of phase-detector characteristics is presented.

Simulation of the classical analog phase-locked loop based circuits

In this paper a short survey on the simulation of classical phase-locked loop based circuits (PLLs) is presented. Nonlinear models of PLLs with mixer/multiplier phase detector are considered. Computation of phase detector characteristics for non-harmonic and non-squarewave signals is discussed.

Simulation of Analog Costas Loop Circuits

The analysis of stability and numerical simulation of Costas loop circuits for the high-frequency signals is a challenging task. The problem lies in the fact that it is necessary to observe very fast time scale of input signals and slow time scale of signal's phases simultaneously. To overcome this difficulty, it is possible to follow the classical ideas of Gardner and Viterbi to construct a mathematical model of Costas loop, in which only slow time change of signal's phases and frequencies is considered. Such an construction, in turn, requires the computation of phase detector characteristic, depending on the waveforms of the considered signals. In this paper, the problems of nonlinear analysis of Costas loops and the approaches to the simulation of the classical Costas loop, the quadrature phase shift keying (QPSK) Costas loop, and the two-phase Costas loop are discussed. The analytical method for the computation of phase detector characteristics of Costas loops is described.

Nonlinear dynamical model of Costas loop and an approach to the analysis of its stability in the large

The analysis of the stability and numerical simulation of Costas loop circuits for high-frequency signals is a challenging task. The problem lies in the fact that it is necessary to simultaneously observe very fast time scale of the input signals and slow time scale of phase difference between the input signals. To overcome this difficult situation it is possible, following the approach presented in the classical works of Gardner and Viterbi, to construct a mathematical model of Costas loop, in which only slow time change of signal׳s phases and frequencies is considered. Such a construction, in turn, requires the computation of phase detector characteristic, depending on the waveforms of the considered signals. While for the stability analysis of the loop near the locked state (local stability) it is usually sufficient to consider the linear approximation of phase detector characteristic near zero phase error, the global analysis (stability in the large) cannot be accomplished using simple linear models.The present paper is devoted to the rigorous construction of nonlinear dynamical model of classical Costas loop, which allows one to apply numerical simulation and analytical methods (various modifications of absolute stability criteria for systems with cylindrical phase space) for the effective analysis of stability in the large. Here a general approach to the analytical computation of phase detector characteristic of classical Costas loop for periodic non-sinusoidal signal waveforms is suggested. The classical ideas of the loop analysis in the signal׳s phase space are developed and rigorously justified. Effective analytical and numerical approaches for the nonlinear analysis of the mathematical model of classical Costas loop in the signal׳s phase space are discussed.

Nonlinear analysis of classical phase-locked loops in signal's phase space

Discovery of undesirable hidden oscillations, which cannot be found by the standard simulation, in phase-locked loop (PLL) showed the importance of consideration of nonlinear models and development of rigorous analytical methods for their analysis. In this paper for various signal waveforms, analytical computation of multiplier/mixer phase-detector characteristics is demonstrated, and nonlinear dynamical model of classical analog PLL is derived. Approaches to the rigorous nonlinear analysis of classical analog PLL are discussed.

Nonlinear analysis of phase-locked loop with squarer

The phase-locked loop with squarer is a classical phase-locked loop (PLL) based carrier recovery circuit. Simulation of the loop is nontrivial task, because of high-frequency properties of considered signals. Simulation in space of signals’ phases allows one to overcome these difficulties, but it is required to compute phase detector characteristic. In this paper for various waveforms of high-frequency signals new classes of phase detector characteristics are computed for the first time. The problems of rigorous mathematical analysis of the control signal of voltage-controlled oscillator are discussed. Nonlinear model of PLL with squarer is constructed.

Analytical Method for Computation of Phase-Detector Characteristic

Discovery of undesirable hidden oscillations, which cannot be found by simulation, in models of phase-locked loop (PLL) showed the importance of development and application of analytical methods for the analysis of such models. Approaches to a rigorous nonlinear analysis of analog PLL with multiplier phase detector (classical PLL) and linear filter are discussed. An effective analytical method for computation of multiplier/mixer phase-detector characteristics is proposed. For various waveforms of high-frequency signals, new classes of phase-detector characteristics are obtained, and dynamical model of PLL is constructed.

Computation of phase detector characteristics in synchronization systems

Computation of phase detector characteristics in synchronization systems

Investigation of the effect of control action parameters on characteristics of a phase-locked-loop frequency control system of a consecutive resonance inverter

Digital phase-locked-loop frequency control (PLFC) systems of a consecutive resonance inverter with the different phase detector characteristics are considered. The efficiency of phase detector signal digital filtration for enhancing the control accuracy and multilevel characteristic of a digital phase detector (DPD) to increase the maximum switching frequency is shown. Using the example of a proportional DPD, dependences for determining the control action parameters that yield adequate characteristics for a PLFC system are obtained.

Mathematical models of phase syncronization systems with quadrature and phase-quadrature units

Integro-differential and differential equations are derived for PLL systems with squarer and for the Costas loop. The equations are based on special asymptotic methods of high-frequency harmonic and pulse oscillations analysis. Methods to compute phase detector characteristics are proposed. New classes of such characteristics are introduced for highfrequency pulse clocks.

Computation of phase detector characteristics in phase locked loops for clock synchronization

Computation of phase detector characteristics in phase locked loops for clock synchronization

Full constellation phase detector for carrier recovery in high-order QAM systems

A full constellation phase detector that improves carrier acquisition performance in high-order quadrature amplitude modulation (QAM) is proposed. The weighting function of the phase detector is mathematically derived, and simulated phase detector characteristics are presented for 256QAM. The results of an experimental evaluation are also reported, which show that the carrier recovery loop based on the proposed phase detector has a large frequency acquisition range and low phase tracking error in high-order QAM.