Nonvolatile Memory Performance Research Articles

Exploration and optimization of novel replacement and prefetching strategies for inefficiencies of advanced MRAM-based hybrid cache systems

With the emergence of cutting-edge hardware systems such as cloud computing, edge computing, and on-chip neural network accelerators, how to design advanced memory strategies to substitute the traditional ones for maximizing the potential performance of non-volatile memory (NVM) under the existing hardware conditions, has become an urgent research issue for both academia and industrial communities. It is promising and innovative to improve computer systems in the layer of data exchanging with the emerging advanced semiconductor devices. In the paper, to address the inefficiencies of write-intensive, high power consumption, low hit rate and so on, which exist in hybrid magnetic random access memory cache systems, three novel cache replacement strategies and two cache prefetching strategies are put forward. The proposed triple novel replacement strategies, including historical frequency and time judgments, duplicate data-aware deletion, and dynamic relevance factors computing, can be utilized to compensate for the shortcomings of the traditional least recently used replacement strategy, respectively. In the two novel prefetching strategies, region distribution parameters and Listnet ranking network are imported into the caching process, respectively, to achieve optimized hitting performance. The simulation results demonstrate that the proposed replacement strategies can achieve up to 61.76%, 84.91%, 56.49%, and 53.21% optimization of write count, hit rate, dynamic power, and IPC compared to the conventional one. The proposed prefetching strategy can achieve up to 91.27%, 49.25% hit rate and IPC optimization. Meanwhile, the synthetic evaluation of the replacement and prefetching strategies are elaborated in the paper, including multi-core characteristics, information entropy, interplays and the performance constraints between replacement and prefetching mechanism, which would facilitate more credible ideas for future memory inefficiencies management and strategy design.

FSDedup: Feature-Aware and Selective Deduplication for Improving Performance of Encrypted Non-Volatile Main Memory

FSDedup: Feature-Aware and Selective Deduplication for Improving Performance of Encrypted Non-Volatile Main Memory

Multifunctional polyphosphazene grafted with triphenylamine and aminostilbene chromophore for electrochromic and sensor application

In this paper, a sequence of polyphosphazenes (PPZs) as electrochromic (EC) and sensor materials have been designed and synthesized by introducing chromophores, (4-(diphenyl amino)phenyl) methanol (CH1) for PPZ1, 3-(4-(dimethyl amino) phenyl)-2-(4hydroxyphenyl) acrylonitrile (CH2) for PPZ2, and CH1 and CH2 for PPZ3 into the main chain. In terms of EC performance, PPZ1 shows the best EC performance among the three PPZs which can achieve 60 % optical contrast at 690 nm with good cyclic stability within 1000 s and fast switching response time (tcolor/tbleach = 1.2 s/0.6 s). Compared to PPZ1, the oxidation potential of PPZ3 is reduced compared to PPZ1. PPZ2 and PPZ3 as sensors are more sensitive for the detection of 2,4,6-trinitrophenol (TNP) and trifluoroacetic acid (TFA) compared to PPZ1. What's more, PPZs can be used in memory devices with non-volatile flash memory performance and switching current ratios of 103:102.4:1, 104.7:101.3:1 and 103.5.:100.6:1 respectively. Therefore, PPZs have the promising prospect in optoelectronic field.

Exploring bipolar resistive switching behavior of sprayed BaTiO3 thin films for nonvolatile memory application

The memristive properties of barium titanate (BT) thin films deposited by cost-effective spray pyrolysis technique are explored. The device was configured as Ag/BT/FTO. The electrical measurements unveiled robust bipolar resistive switching (BRS) characteristics in the devices with memory window ∼35. This behavior, attributed to intrinsic defects within BaTiO3, demonstrated the potential of these films for applications in advanced electronic devices like Resistive-Random Access Memory (RRAM). The observed phenomenon arises from the generation of polarized areas within the material, responsive to an applied electric field. Specifically focusing on the memristive aspects, this study indicated promising non-volatile memory performance. All devices undergo the SET process between 0.9 and 1.7 V, and the RESET process takes place between −1.3 to −1.9 V. According to the statistical distribution of SET and RESET voltages, the coefficient of variation (CV) for all devices is less than 18 %. The Ag/BT/FTO memristive device exhibited endurance through 103 cycles of switching, attesting to its reliability. Moreover, the device displayed the capability to maintain stored data for 104 seconds. This establishes the suitability of spray-deposited BaTiO3 thin films for memory-based applications.

Rational design of quinoline-based D-A system to accomplish a switching from binary to ternary memory devices

Quinoline-based small organic molecules containing anthracene and phenanthrene in a donor-acceptor (D-A) system have been designed and synthesized. The photophysical and electrochemical properties convey a better charge transfer possibility for the compounds with an ethylene bond between the D-A system than those without the ethylene bond. Through a red shift in the absorption spectra, the smaller band gap of the compounds (2.69–2.73 eV). Therefore, the memory behavior of the compounds also changed from binary to ternary, availing a better charge storage density in the systems. Even though all the compounds exhibited a non-volatile WORM memory performance with charge transfer and trapping as the major phenomenon behind the charge transport in the systems, the mechanism of compounds with the ethylene bridge between the D-A system differs due to the molecular orientation of the compounds. These compounds initially undergo a molecular ordering leading to a better channel for the charge transfer in the film, which takes the devices from OFF to ON1 state, followed by the charge transfer and trapping leading to an ON2 state. This guided the ternary WORM memory behavior of the compounds with a threshold voltage as low as - 0.8 V and an on/off current ratio of 104. The devices tend to show significant stability over 100 reading cycles and 4000 s under the constant stress of 0.5 V, making these devices perfect candidates for multilevel storage memory.

Fluorinated benzimidazole-based conjugated polymers for ternary memory devices

The application of fluorinated materials in optoelectronic devices has been extensively studied, yet their potential in polymer-based memory devices still needs to be explored. The strategic manipulation of electron donors and electron acceptors to enhance the electron properties of material represents a valid approach to advancing data storage performance. The acceptor unit plays a crucial role in charge trapping, by fluorinating acceptor unit, the polymer electron affinity can be further modulated, leading to optimized carrier injection. In this work, we have synthesized three donor-acceptor-type (D-A-type) conjugated polymers, employing benzimidazole-isoindole electron acceptors substituted with different numbers of fluorine atoms. These polymers were utilized as active layers and integrated into indium-tin-oxide/active layer/aluminum devices through a straightforward fabrication process. These devices exhibit excellent ternary non-volatile memory performance and demonstrate sustained stability even after 103 cycle numbers. Notably, the PM4Fbzo-based device achieves impressively low threshold voltages of −0.55 V and −0.80 V, accompanied by a switching current ratio surpassing 104. These exceptional outcomes show the tremendous potential of fluorinated benzimidazole-isoindole-based materials for ternary storage applications, showcasing them as one of the promising candidates for the next generation of materials.

Double-Floating-Gate van der Waals Transistor for High-Precision Synaptic Operations

Two-dimensional materials and their heterostructures have thus far been identified as leading candidates for nanoelectronics owing to the near-atom thickness, superior electrostatic control, and adjustable device architecture. These characteristics are indeed advantageous for neuro-inspired computing hardware where precise programming is strongly required. However, its successful demonstration fully utilizing all of the given benefits remains to be further developed. Herein, we present van der Waals (vdW) integrated synaptic transistors with multistacked floating gates, which are reconfigured upon surface oxidation. When compared with a conventional device structure with a single floating gate, our double-floating-gate (DFG) device exhibits better nonvolatile memory performance, including a large memory window (>100 V), high on-off current ratio (∼107), relatively long retention time (>5000 s), and satisfactory cyclic endurance (>500 cycles), all of which can be attributed to its increased charge-storage capacity and spatial redistribution. This facilitates highly effective modulation of trapped charge density with a large dynamic range. Consequently, the DFG transistor exhibits an improved weight update profile in long-term potentiation/depression synaptic behavior for nearly ideal classification accuracies of up to 96.12% (MNIST) and 81.68% (Fashion-MNIST). Our work adds a powerful option to vdW-bonded device structures for highly efficient neuromorphic computing.

Switching the memory behaviour from binary to ternary by triggering S62- relaxation in polysulfide-bearing zinc-organic complex molecular memories.

The use of crystalline metal-organic complexes with definite structures as multilevel memories can enable explicit structure-property correlations, which is significant for designing the next generation of memories. Here, four Zn-polysulfide complexes with different degrees of conjugation have been fabricated as memory devices. ZnS6(L)2-based memories (L = pyridine and 3-methylpyridine) can exhibit only bipolar binary memory performances, but ZnS6(L)-based memories (L = 2,2'-bipyridine and 1,10-phenanthroline) illustrate non-volatile ternary memory performances with high ON2/ON1/OFF ratios (104.22/102.27/1 and 104.85/102.58/1) and ternary yields (74% and 78%). Their ON1 states stem from the packing adjustments of organic ligands upon the injection of carriers, and the ON2 states are a result of the ring-to-chain relaxation of S62- anions. The lower conjugated degrees in ZnS6(L)2 result in less compact packing; consequently, the adjacent S62- rings are too long to trigger the S62- relaxation. The deep structure-property correlation in this work provides a new strategy for implementing multilevel memory by triggering polysulfide relaxation based on the conjugated degree regulation of organic ligands.

Phase-controllable large-area two-dimensional In2Se3 and ferroelectric heterophase junction.

Memory transistors based on two-dimensional (2D) ferroelectric semiconductors are intriguing for next-generation in-memory computing. To date, several 2D ferroelectric materials have been unveiled, among which 2D In2Se3 is the most promising, as all the paraelectric (β), ferroelectric (α) and antiferroelectric (β') phases are found in 2D quintuple layers. However, the large-scale synthesis of 2D In2Se3 films with the desired phase is still absent, and the stability for each phase remains obscure. Here we show the successful growth of centimetre-scale 2D β-In2Se3 film by chemical vapour deposition including distinct centimetre-scale 2D β'-In2Se3 film by an InSe precursor. We also demonstrate that as-grown 2D β'-In2Se3 films on mica substrates can be delaminated or transferred onto flexible or uneven substrates, yielding α-In2Se3 films through a complete phase transition. Thus, a full spectrum of paraelectric, ferroelectric and antiferroelectric 2D films can be readily obtained by means of the correlated polymorphism in 2D In2Se3, enabling 2D memory transistors with high electron mobility, and polarizable β'-α In2Se3 heterophase junctions with improved non-volatile memory performance.

Plasma fireball-mediated ion implantation for nonvolatile memory application

Extraordinary performance of nonvolatile memories based on resistive switching is expected to fulfill the requirements of next-generation data-intensive technologies. However, due to the separate growth of functional layer and electrodes in the device, resistive random access memories still suffer from their implementation at a commercial scale. Herein, depending upon the polarity, a single device is used to grow Ti thin film followed by plasma fireball-mediated oxygen ion implantation to transform the top surface of Ti film into a functional TiOx layer to fabricate the device. The formation of TiOx layer at the near-surface region and oxygen-concentration gradient with depth in the implanted film is demonstrated. The current–voltage characteristics of the device analyzed at the nanoscale show forming-free bipolar resistive switching, which is further confirmed by the twofold erase-write process. At 5 × 1016 ions cm−2 fluence, resistive switching occurs at higher voltages, while at 5 × 1017 ions cm−2 fluence, it occurs at lower voltages. As an application, the rapid fabrication of periodic arrays of squared memory cells of different sizes is demonstrated. We propose a simple and cost-effective one-step technique to fabricate resistive switching-based nanoscale nonvolatile memory devices, which can be utilized for the production of high-density commercial devices at a large scale.

Heterosynaptic Plasticity Achieved by Highly Anisotropic Ionic Migration in Layered LixMoO3 for Neuromorphic Application

AbstractHeterosynaptic plasticity is important for the implementation of biological functions in an excitatory synapse. Although plenty of devices have been developed to emulate the synaptic behaviors, the capability of processing information with high heterosynaptic plasticity remains challenging. Herein, it is reported that the electrical conductance of Li+ ion pre‐intercalated MoO3 nanosheet (LixMoO3: 0 < x < 1) can be efficiently modulated, relying on the local phase transition associated with electric‐field‐driven ionic migration. The LixMoO3‐based in‐plane synaptic device exhibits attractive nonvolatile memory performance including high switching ratio (≈500) and long‐term retention of states (>4000 s). By combining experimental studies with theoretical calculations, the anisotropic in‐plane ionic migration in LixMoO3 is revealed, which is attributed to the dissimilarity of adiabatic barriers along different crystallographic directions. A multiterminal LixMoO3 memristor responses anisotropically to input spikes, and the slope of conductance change along a‐axis is almost 7 times larger than that along c‐axis, which contributes to the emulation of heterosynaptic plasticity required for neurobiological architecture. Additionally, the device can also fulfill the in‐memory Boolean logic operations naturally. This work demonstrates the great potentials of ionic migration to develop artificial synapses, highlighting its promising applications for future brain‐inspired computing systems.

Unipolar resistive switching behavior in MoS2–polyvinyl alcohol-based memory device

MoS2–polymer-based memory devices have attracted significant interest owing to their mechanical flexibility, convenient solution processability, and affordability. These devices exhibit bipolar resistive switching behavior, and their switching relies on the polarity of the applied bias. This paper presents a memory device in which a MoS2–polyvinyl alcohol (PVA) hybrid film is sandwiched between Ag and Pt electrodes. The developed Ag/MoS2–PVA/Pt device manifests typical unipolar resistive switching (URS) behavior and nonvolatile rewritable memory performance with a low operating voltage, large ON/OFF ratio (105), and multilevel cell storage ability. Notably, 1T-phase MoS2 is crucial for the URS behavior, and this switching behavior can be ascribed to the charge trapping as well as the Joule-heating-induced de-trapping of the S vacancies associated with 1T MoS2. These findings can facilitate the development of new designs for high-performance, high-density data storage.

The visible light-triggered nonvolatile memory performances in melamine-decorated -oriented lead halide perovskites: A photo-responsive structural evolution insight

The exploration of novel photo/thermal-responsive nonvolatile memorizers will be beneficial for energy-saving memories. Herein, new <110>-oriented perovskites using single template melamine, i.e., [(MLAI-H2)(PbX4)]n (X = Br (α-1), Cl (α-2), MLAI = melamine) have been prepared and their structures upon irradiation of visible light have been investigated. They have been fabricated as nonvolatile memory devices with structures of ITO/[(MLAI-H2)(PbX4)]n/PMMA/Ag (device-1: X = Br, device-2: X = Cl), which can exhibit unique visible light-triggered binary nonvolatile memory performances. Interestingly, the silent or working status can be monitored by visible chromisms. Furthermore, the light-triggered binary resistive switching mechanisms of these ITO/[(MLAI-H2)(PbX4)]n/PMMA/Ag memory devices have been clarified in terms of EPR, fluorescence, and single-crystal structural analysis. The presence of light-activated traps in <110>-oriented [(MLAI-H2)(PbX4)]n perovskites are dominated in the appearance of light-triggered resistive switching behaviors, based on which the inverted internal electrical fields can be established. According to the structural analysis, the more distorted PbX6 octahedra, higher corrugated <110>-oriented perovskite sheets, and more condensed organic-inorganic packing in Br-containing perovskite are beneficial for the stabilization of light-activated traps, which lead to the better resistive switching behavior of device-1. This work can pave a new avenue for the establishment of novel energy-saving nonvolatile memorizers used in aerospace or military industries.

A Novel Computing-in-Memory Platform Based on Hybrid Spintronic/CMOS Memory

Computing-in-memory (CiM) based on spintronic devices is considered to be one of the most promising solutions to address the von Neumann bottleneck. In this article, a novel CiM platform based on hybrid spintronic/CMOS memory is proposed, which can work in memory mode and computing mode. Instead of integrating complex logic units in memory, minor modifications are made to peripheral circuits to perform calculations. Profiting from the unique properties of hybrid memory and well-modified peripheral circuitry, three different computing schemes are introduced, and the computing results are obtained as typical memory readouts. Complex bulk bitwise logic functions including 16 Boolean logic functions and arithmetic operations can be implemented by combining the proposed schemes and dynamically configuring the input variables. All computing functions can be implemented without nonvolatile bit write operations, and there is no restriction on the location of operands. A 1-bit full adder and a multibit ripple carry adder are designed as instances of flexible utilization of the platform. The hybrid spintronic/CMOS simulations at the 40 nm technology node further demonstrate the functionality and performance of this work. The performance of nonvolatile memory write operations is significantly improved and requirements for device fabrication are reduced by exploiting the toggle spin torques mechanism. The resistance margins of our design are twice greater compared to the previous parallel-connected schemes.

Cu x S nanosheets with controllable morphology and alignment for memristor devices

In electrochemical metallization memristor, the performance of resistive switching (RS) is influenced by the forming and fusing of conductive filaments within the dielectric layer. However, the growth of filaments, mostly, is unpredictable and uncontrollable. For this reason, to optimize ions migration paths in the dielectric layer itself in the Al/Cu x S/Cu structure, uniform Cu x S nanosheets films have been synthesized using anodization for various time spans. And the Al/Cu x S/Cu devices show a low operating voltage of less than 0.3 V and stable RS performance. At the same time, a reversible negative differential resistance (NDR) behavior is also demonstrated. And then, the mechanism of repeatable coexistence of RS effect and NDR phenomenon is investigated exhaustively. Analyses suggest that the combined physical model of space-charge limited conduction mechanism and conductive filaments bias-induced migration of Cu ions within the Cu x S dielectric layer is responsible for the RS operation, meanwhile, a Schottky barrier caused by copper vacancy at the Cu x S/Cu interface is demonstrated to explain the NDR phenomenon. This work will develop a new way to optimize the performance of non-volatile memory with multiple physical attributes in the future.

Synergic Impacts of CF4 Plasma Treatment and Post-thermal Annealing on the Nonvolatile Memory Performance of Charge-Trap-Assisted Memory Thin-Film Transistors Using Al–HfO2 Charge Trap and In–Ga–Zn–O Active Channel Layers

Synergic Impacts of CF₄ Plasma Treatment and Post-thermal Annealing on the Nonvolatile Memory Performance of Charge-Trap-Assisted Memory Thin-Film Transistors Using Al–HfO₂ Charge Trap and In–Ga–Zn–O Active Channel Layers

An InGaZnO Charge-Trapping Nonvolatile Memory With the Same Structure of a Thin-Film Transistor

A new charge-trapping nonvolatile memory (NVM) with a fully same structure to thin-film transistor (TFT) is investigated. Different from the conventional NVM with block layer/charge-trapping layer/tunneling layer stack for charge storage, this NVM uses the metal-hydroxyl (M-OH) defect at the back channel for charge storage, which forms by the reaction of IGZO with moisture and acts as acceptor-like deep-level traps. Devices with various M-OH contents are prepared by changing thermal treatment. The device with high M-OH content displays good NVM performance in terms of its large memory window (1.5 V at ±10 V, 1s), high program/erase speeds (1.1 V at 10 V, 1 ms) and good data retention (78.9% retention after 10 years); for comparison, the device with low M-OH content exhibits good TFT characteristics in terms of its small sub-threshold swing (226 mV/dec), high carrier mobility (8.1 cm2/V.s) and good electrical stability (memory window ~ 0.2 V at ±10 V, 1s). Since the NVM and TFT have the same structure, both the devices can be simultaneously prepared combined with an extra treatment to modulate the M-OH content at the back channel, thus contributing to system-on-panel development.

Novel Melamine-Decorated &lt;110&gt;-Oriented Lead Halide Perovskites and Their Visible Light-Triggered Nonvolatile Memory Performances with Status Monitored by Chromisms

Novel Melamine-Decorated &lt;110&gt;-Oriented Lead Halide Perovskites and Their Visible Light-Triggered Nonvolatile Memory Performances with Status Monitored by Chromisms

Resistance-switchable conjugated polyrotaxane for flexible high-performance RRAMs.

A representative closely packed conjugated polyrotaxane (CPR1) is synthesized by threading polyaniline (PAN) into β-cyclodextrin (CD) macrocycles and utilized for the first time to construct an RRAM device that exhibits an outstanding resistive switching capability. The CPR1 RRAM device displays remarkable nonvolatile memory performance with an extremely high ON/OFF ratio of 108, the ultra-fast response of 29 ns, excellent reliability and reproducibility, and long-term stability (more than 1 year). The mechanism underlying this resistive switching behavior is understood according to the electric-field-induced proton doping of the PAN core by the CD sheath through hydrogen bonding interactions. More impressively, the favorable solubility and intrinsic flexibility of CPR1 allow for large-scale fabrication of flexible CPR1 RRAM device arrays by full-printing technology with endurance of 1000 bending cycles at the minimum bending radius of 3 mm, higher ON/OFF ratio of 108, and relatively lower operating voltage of 1.8 V. This work shows the potential of CPR materials in highly stable memory devices for next-generation flexible and wearable electronics.

Implementation of Synaptic Device Using Ultraviolet Ozone Treated Water‐in‐Bisalt/Polymer Electrolyte‐Gated Transistor

AbstractElectrolyte‐gated transistors (EGTs) have been extensively studied as a next‐generation neuromorphic device mimicking the biological ionic flux in synapses. However, its long‐term plasticity characteristic lasts only for few seconds because of the rapid self‐discharge of electrical double layer. Here, ultraviolet ozone (UVO) treated water‐in‐bisalt (WiBS)/polymer electrolyte‐gated synaptic transistor (WEST) which excellently implements multiple synaptic functions is proposed. Ultraviolet (UV) light and reactive oxygen radicals generated during UVO treatment form trap sites on the surface of active layer, causing lithium cations in the WiBS/polymer electrolyte to be captured at the electrolyte/active layer interface. The UVO treated WEST shows enhanced nonvolatile memory performance for 10 000 s, up to 1186 times longer than that of the untreated WEST. Also, near‐ideal weight update over 10 000 cycle tests with 0.32 and −0.55 nonlinearities of long‐term potentiation and depression is acquired with a ten times improved symmetricity. These results confirm that the surface engineering is a key technique for sophisticated ion transport, and demonstrate various applicability of EGTs as a neuromorphic device.