Performance Of Image Processing Systems Research Articles

Fundus image denoising using FPGA hardware architecture

Image processing algorithms, implemented in hardware, have recently emerged as the most viable solution for improving the performance of image processing systems. In this paper, a version of an anisotropic diffusion technique is used to reduce noise from retinal images, namely Speckle Reducing Anisotropic Diffusion SRAD. The SRAD filter can improve images corrupted by multiplicative or additive noise, but it has been the most computationally complex and it has not been suitable for software implementation in real-time processing. In this paper, an efficient Field-Programmable Gate Array FPGA-based implementation of the SRAD filter is presented to accelerate the processing time. A comparison of the most used classical suppression filters like Gaussian, Median, Perona and Malik anisotropic diffusion has been carried out. The experimental results reveal a 38× performance improvement over the original MATLAB implementation and a 1.33× performance improvement over the hardware implementation using the Xilinx System Generator tool.

Object Counting Based On Image Processing: FPGA Approach

Image processing is used in very large and expanding areas covering applications in multimedia services, arts, medicine etc. For improving the performance of image processing systems the vital solution is implementation of image processing techniques in hardware. This paper presents the objects counting such as coins, with their implementation and simulation results using a hardware description language, VHDL.