Peak Value Of Common-mode Voltage Research Articles

A Model Predictive Control Scheme for Flying Capacitors and Neutral Point Voltages Control in Nested Piloted Neutral Point Clamped Inverter

Five-level nested piloted neutral point clamped (5L-NPNPC) inverter is a new version of nested neutral point clamped multilevel topologies. In 5L-NPNPC, voltage fluctuations in the flying capacitors (FCs) and neutral point (NP) increase as the output frequency decrease, which is not desirable for the safe operation of the inverter. In this paper, a new model predictive control-based solution is proposed to tackle this problem. First, feasible combinations of space voltage vectors are determined through which the reference voltage of the inverter is synthesized. Then, a two-step optimization process is proposed to select the optimal switching states. The voltages of FCs and NP are the control objects in the first and second optimization steps, respectively. The proposed control scheme mitigates FCs and NP voltage fluctuations in the entire frequency range while keeping the switching frequency fixed. Also, the peak value of common-mode voltage (CMV) is limited to <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V_dc</i> /6. Furthermore, the proposed control scheme divides the optimization process into two steps, leading to a significant reduction in the computational burden of the processor. The mentioned achievements are important in medium-voltage (MV) motor drive applications. The simulation results and scaled-down experiments are provided to support the above claims.

Simple FCS-MPC Method for Reducing Common-Mode Voltage in a Three-Phase Two-Level Voltage Source Inverter

Common mode voltage (CMV) causes various issues, including a negative impact on the performance of a hybrid electric vehicle’s power system (HEV). Many papers have published methods that mitigate CMV, almost all of which attempt to avoid zero vectors, but this increases total harmonic distortion (THD). This work describes a simple and efficient method for reducing CMV in a two-level three-phase voltage source inverter (VSI) with an RL load. This method uses only active vectors. It replace the zero vector with the two opposite vectors V2 and V5. for T1 and T2 respectively in a one sampling period Ts. A numerical simulation, using Matlab-Simulink. is achieved to assess the effectiveness of the proposed control technique. The obtained results show a reduction in THD value (17% improvement) and a decrease in the peak value of CMV from (${{ + {V_{dc}}} \over 2}$ and ${{ - {V_{dc}}} \over 6}$) to $\pm {{{V_{dc}}} \over 6}$. These results are compared to those obtained by using the traditional predictive control model MPC.

Common-Mode Voltage Reduction Scheme for MMC With Low Switching Frequency in AC–DC Power Conversion System

In ac–dc power conversion system, modular multilevel converter (MMC) has been a promising technology, especially for high-voltage application. In such kind of application, the common-mode voltage (CMV) generated by power electronic switching can cause damage to electrical components and increase the electromagnetic interference (EMI) to the system. Hence, this article proposes a modulation scheme to reduce the CMV of MMC applied in high-voltage system, such as high-voltage dc. Usually, MMC consisting of numerous submodules (SMs) adopts the nearest level modulation (NLM) with the low switching frequency, so the CMV of the NLM scheme is analyzed, which indicates that the peak value of CMV is one-third of SM voltage. If one more or one less SM is turned <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> compared with NLM, the CMV caused by modulation can be eliminated theoretically. Subsequently, a modulation scheme based on the nearest zero CMV vector (NZCMVV) to reduce CMV is proposed for MMC. The NZCMVV scheme utilizes the two adjacent levels as candidate levels, and the theoretical ZCMVVs are picked out. Finally, the ZCMVV closest to the reference vector is selected to approximately replace the reference. The proposed method is simple and easy to implement. Simulated and experimental results validate that the proposed scheme can reduce CMV and CM current compared with the traditional NLM method.

General Bi-Tri Logic SPWM for Current Source Converter With Optimized Zero-State Replacement

This article proposes an optimized zero-state replacement (ZSR) method for general bi-tri logic SPWM (BTSPWM) to deal with the common-mode voltage (CMV) issue. The BTSPWM can transform the well-developed modulation strategies for voltage source converters (VSCs) into current source converter (CSC) system through the logic translation, which can utilize the analysis concepts developed for VSC. With BTSPWM, all- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> gating signals can be generated through the logic translation, which should be replaced with the redundant zero-states to avoid open-circuit, which provides the flexibility for ZSR. Existing ZSR strategies are mainly focused on switching time minimization while the CMV excited by the replaced zero-states is not considering. To address the CMV issue, optimized ZSR methods for general BTSPWM are proposed to address the CMV while not influence the regular PWM features. With the proposed methods, both the CMV peak value and the third-order component can be effectively reduced. Moreover, the proposed method can be easily applied to a parallel CSC system due to the inherent modularity. The performances of the proposed methods have been experimentally verified on both single and parallel CSC systems.

Simplified Space-Vector Modulation Strategy for Indirect Matrix Converter With Common-Mode Voltage and Harmonic Distortion Reduction

This paper presents a simple space vector modulation (SVM) strategy for a three-phase indirect matrix converter (IMC) to reduce common-mode voltage (CMV) and output harmonic distortion. To suppress the CMV peak value to 57.7% of the input phase voltage, three active voltage vectors are used to generate the desired output voltage with arbitrary amplitude and frequency. However, the output waveform quality of the IMC deteriorates due to the absence of zero voltage vectors. To overcome this problem, this paper proposes to redesign control of the rectifier stage by utilizing three active current vectors instead of two, as is common. Consequently, a constant average DC-link voltage is achieved, which can improve the output performance in terms of output voltage and current harmonic distortion. Compared to the existing strategies, the proposed strategy can reduce the CMV and maintain output harmonic distortion without increasing the computation burden. Implementation of the proposed strategy is also straightforward and simple. Simulated and experimental results are provided to verify the effectiveness of the proposed strategy.

An Advanced Modulation Strategy for Three-to-Five-Phase Indirect Matrix Converters to Reduce Common-Mode Voltage With Enhanced Output Performance

This paper presents an advanced space vector modulation (SVM) strategy for a three-to-five-phase indirect matrix converter (IMC) to reduce common-mode voltage (CMV) with enhanced output performance. By replacing zero and medium voltage vectors with large voltage vectors to synthesize desired output voltage, the five-phase inverter stage modulation can reduce the CMV peak value by 47%, compared with the conventional SVM. In order to compensate the degraded output performance due to the absence of the zero voltage vectors, the rectifier stage modulation is modified by utilizing the two-vector and three-vector modulation techniques. Consequently, by combining the modulations of the rectifier and inverter stages, the proposed modulation strategy can suppress the CMV, as well as improve the output performance of the three-to-five-phase IMC. Simulation and experimental results are provided to verify the effectiveness of the proposed modulation strategy.

Research on space‐vector modulation and common‐mode voltage of four‐leg matrix converter

Four-leg matrix converter (MC) is an AC–AC converter which has the ability to drive the unbalanced load. It can be used in many fields such as the ice protection system of More Electrical Aircraft to reach a considerably high power density. Detailed space-vector modulation algorithm and circuit modelling are discussed in this study. Analysis, modelling, and characteristics of common-mode voltage (CMV) are presented. The relationship between the peak value of CMV and circuit parameters is studied and quantitative results are provided. Simulation of a four-leg MC driving system is built and an experimental platform based on DSP/CPLD control system is set up.

A Three-Vector Modulation Strategy for Indirect Matrix Converter Fed Open-End Load to Reduce Common-Mode Voltage With Improved Output Performance

This paper proposes a three-vector modulation (TVM) strategy for a five-leg indirect matrix converter (IMC) fed three-phase open-end load (OEL) drive to reduce common-mode voltage (CMV) with improved output performance. By utilizing three nearest active voltage vectors to generate desired output voltage, the proposed TVM strategy can eliminate the CMV across the load phase and reduce the peak value of CMV at the load terminal to 42%. Compared to other modulation strategies for the IMC fed OEL drives, the problems associated with simultaneous switching of two legs and zero-sequence current do not occur with the TVM strategy. Also, a constant average dc-link voltage is achieved by using three active current vectors to synthesize reference input current, so that the output performance of the five-leg IMC is improved regarding output current and output voltage harmonic distortions. Simulation and experimental results are provided to verify the performance of the TVM strategy.

Model Predictive Current Control of a Three-Phase T-Type NPC Inverter to Reduce Common Mode Voltage

This paper presents a reduced control set model predictive control (RCSMPC) method for three-phase T-type neutral-point-clamped (NPC) inverter. The whole control set (WCS) consists of all the 27 switching states of T-type NPC inverter. The reduced control set (RCS) with 19 switching states is formed from WCS by excluding the switching states with common mode voltage (CMV) value higher than one-sixth of input DC voltage [Formula: see text]. With RCS, single-objective model predictive current control method can restrict the CMV peak value to [Formula: see text]. To further reduce the CMV below this threshold, a cost function with the weighted sum of two control targets is formulated in the RCSMPC method. The two control targets of RCSMPC method are CMV mitigation and load current control. The weight for CMV is called bias factor. The RCSMPC method is computationally efficient, as the number of switching states is less than that of WCSMPC. To further reduce the computational burden, CMV values corresponding to all the switching states are calculated offline and stored in memory. Robustness of both the methods is investigated with parameter deviations at different bias factors and reference currents. The proposed method is validated using simulation and experimental results and compared with the existing methods.

A DSVM Method for Matrix Converters to Suppress Common-mode Voltage With Reduced Switching Losses

This paper proposes a direct space-vector modulation (DSVM) method that can reduce the common-mode voltage (CMV) as well as the switching losses for matrix converters in a high voltage transfer ratio. Even though the previous DSVM improvements can reduce the CMV peak value to 42%, compared to the conventional DSVM method, they incur high switching losses. The DSVM method proposed in this paper provides the same CMV peak value as previous methods with lower switching losses. The switching losses are theoretically analyzed through the accumulated switched voltage in a switching period and compared to those of previous methods. Simulation and experimental results are given to verify the input/output waveforms, CMV reduction, and lower switching losses of the proposed DSVM method.

Common mode voltage reduction of quasi‐Z source indirect matrix converter

SummaryQuasi‐Z source indirect matrix converter (IMC) combines both advantages of conventional IMC and quasi‐Z source inverter, for example, no direct current (DC) link capacitor, compact all‐silicon power converter, bidirectional power flow, input power factor controllable, and high voltage gain; moreover, it does not require additional input filter, because continuous quasi‐Z source network integrates LC filter function. However, there is no literature to disclose common mode voltage (CMV) issue of quasi‐Z source IMC. In this paper, for the first time, the CMV issue and reduction of quasi‐Z source IMC are investigated. Firstly, the CMV of quasi‐Z source IMC is analyzed when using current typical modulation method, which follows the brief introduction of topology and modulation method for quasi‐Z source IMC, and the factors that affect the CMV are figured out; Secondly, referring to the CMV reduction methods of conventional IMC, two solutions named as Methods I and II to reduce the CMV for quasi‐Z source IMC are developed, which are achieved in the inverter stage; the third CMV reduction method is proposed in the rectifier stage through redefining the six sectors of the rectifier stage, which can implement zero current commutation. Experimental bench is built to test three approaches for reducing the CMV of quasi‐Z source IMC. Comparative evaluation is carried out between three methods and conventional modulation method. Experimental results verify that three methods can significantly reduce the CMV of quasi‐Z source IMC, with the CMV peak value reduction of 42%, but they present different features in terms of input and output current THDs, switching loss, CMV root mean square (RMS) value, modulation index limitation, and so on. Copyright © 2015 John Wiley &amp; Sons, Ltd.

Carrier Phase-Shift PWM to Reduce Common-Mode Voltage for Three-Level T-Type NPC Inverters

Common-mode voltage (CMV) causes overvoltage stress to winding insulation and damages AC motors. CMV with high dv/dt causes leakage currents, which create noise problems for equipment installed near the converter. This study proposes a new pulse-width modulation (PWM) strategy for three-level T-type NPC inverters. This strategy substantially eliminates CMV. The principle for selecting suitable triangle carrier signals for the three-level T-type NPC is described. The proposed method can mitigate the peak value of CMV by 50% compared with the phase disposition pulse-width modulation method. Furthermore, the proposed method exhibits better harmonic spectrum and lower root mean square value for the CMV than those of the reduced-CMV method on the basis of the phase opposition disposition PWM scheme with modulation index higher than 0.5. The proposed modulation can easily be implemented using software without any additional hardware modifications. Both simulation and experimental results demonstrate that the proposed carrier phase-shift PWM method has good output waveform performance and reduces CMV.

PWM Strategies for Common-Mode Voltage Reduction in Current Source Drives

The common-mode voltage (CMV) in the motor drive system could damage the motor insulation and induce destructive bearing current. Various reduced CMV space vector modulation (RCMV SVM) methods have been proposed in both voltage source converter (VSC) and current source converter systems. Most of them reduce the CMV by avoiding the use of zero-state vectors. Recently, a zero-state vector selection strategy for CMV reduction in CSCs has been proposed, which allows the use of zero-state vectors and achieves reduced CMV without affecting the modulation index range and the harmonics performance of converters. This paper further investigates three possible zero-state vector selection strategies in RCMV SVM for current source drives where the PWM CSR and CSI are connected back to back. Among the three methods, Method 1 and Method 2 are suitable for CMV peak value minimization, while Method 3 is proposed for the average CMV reduction. These methods can then be considered for different types of drives (with or without isolation transformer) to reduce the insulation stress or to limit the resonance in the common mode circuit. Details of the three zero-state vectors selection methods are presented. Both simulation and experimental results are provided to verify their effectiveness.

A Hybrid Sequence Modulation Technique for Common-Mode Voltage Reduction in Current Source Converters

In this paper, a minimal common-mode voltage peak value rule is defined due to the problem of common-mode voltage that current source converters (CSCs) usually exist. Base on this rule, two methods of hybrid sequence modulation (HM2/HM3) are proposed which can recompose the arrangement of traditional zero vectors to decrease common-mode voltage and reduce harmonics. The effectiveness of the optimal method (HM3) for CSCs is verified in theoretical research and simulation experiment.