Peak Current Mode Buck Converter Research Articles

Effect of Circuit Parameters on the Stability and Boundaries of Peak Current Mode Single-Inductor Dual-Output Buck Converters

Peak current mode (PCM) control has been widely used for the control of switching dc–dc converters due to its excellent transient performance. With the development of single-inductor dual-output (SIDO) dc–dc converters, PCM control technique is introduced to the control of SIDO dc–dc converters. Conventional PCM buck converter has only one reference current, with two inductor current borderlines are used to divide the operation modes of inductor current. However, PCM SIDO buck converter has more inductor current borderlines as it has one more reference current than that of PCM buck converter. In this paper, inductor current borderlines of PCM SIDO buck converter are investigated, and unified discrete iterative model of PCM SIDO buck converter is established. The effect of the difference of reference currents, initial inductor current and input voltage on the stability of PCM SIDO buck converter has been discussed by using bifurcation diagrams. The study results show that the stability of PCM SIDO buck converter is sensitive to the difference of reference currents, initial inductor current and input voltage. The stability boundary of the difference of reference currents, stability region of initial inductor current, and stability boundary of input voltage are derived. Lyapunov exponent and experimental results are carried out to verify the theoretical analysis results.

Bifurcation and chaos in high-frequency peak current mode Buck converter**Project supported by the National Natural Science Foundation of China (Grant No. 61376029), the Fundamental Research Funds for the Central Universities, China, and the College Graduate Research and Innovation Program of Jiangsu Province, China (Grant No. SJLX15_0092).

Bifurcation and chaos in high-frequency peak current mode Buck converter working in continuous conduction mode (CCM) are studied in this paper. First of all, the two-dimensional discrete mapping model is established. Next, reference current at the period-doubling point and the border of inductor current are derived. Then, the bifurcation diagrams are drawn with the aid of MATLAB. Meanwhile, circuit simulations are executed with PSIM, and time domain waveforms as well as phase portraits in iL–vC plane are plotted with MATLAB on the basis of simulation data. After that, we construct the Jacobian matrix and analyze the stability of the system based on the roots of characteristic equations. Finally, the validity of theoretical analysis has been verified by circuit testing. The simulation and experimental results show that, with the increase of reference current Iref, the corresponding switching frequency f is approaching to low-frequency stage continuously when the period-doubling bifurcation happens, leading to the converter tending to be unstable. With the increase of f, the corresponding Iref decreases when the period-doubling bifurcation occurs, indicating the stable working range of the system becomes smaller.

Zero‐steady‐state‐error compensation method in application of peak current mode buck converter with fast transient response

A novel zero-steady-state-error (ZSSE) compensation technique based on an accurate small signal model of peak current mode buck converter is proposed for optimising the microprocessors with low power consumption needing high-definition voltage scaling. This technique eliminates the steady-state error of output voltage without negatively affecting the transient response. The main parasitic parameters of the buck converter are taken into consideration to design an excellent ZSSE compensation module; the relationships between the parameters of the compensation circuit and parameters of the other parts of the converter have been derived in this study. This technique has been implemented on a prototype. The validity of this method is shown and confirmed by test results.

A High-Frequency Model for a PCM Buck Converter

In order to analyze the high-frequency behaviors of the peak current mode (PCM) Buck converter, a small-signal multifrequency model is proposed. The multifrequency model explains the influences from the sideband frequency components generated by the nonlinear PWM comparator. It can effectively reflect some features which cannot be shown by the conventional average model, such as the phase delay. In addition, based on the proposed model, the sample-hold effect is also introduced and analyzed in this paper. Through the derivation and validation of the new model, frequency characteristics of the PCM Buck converter can be well understood, especially in the high-frequency region.

Control of sub‐harmonic oscillation in peak current mode buck converter with dynamic resonant perturbation

SummaryIn this paper, a dynamic resonant perturbation (DRP) method is proposed to control sub‐harmonic oscillation in a peak current mode controlled buck converter. Different from the traditional non‐feedback resonant parametric perturbation method, the proposed DRP method extracts an approximate sinusoidal control signal from the output voltage. The self‐stabilizing condition for the designed control signal is presented, and its analog circuit implementation is given as well. Furthermore, the system stability boundary is obtained by investigating the system eigenvalues, and the control parameter is effectively determined. The presented simulation and experiment results show that the proposed DRP method eliminates sub‐harmonic oscillation without sacrificing the peak value of the inductor current and features with a self‐stabilizing characteristic for external condition changes. Copyright © 2014 John Wiley & Sons, Ltd.

Transient response optimisation for peak current mode buck converter in the application of dynamic voltage scaling

For optimising the peak current mode buck converter's transient response in the application of dynamic voltage scaling, an accurate small signal model of the converter under continuous conduction mode is built. The switch conduction loss, dead-time and other main parasitic parameters are considered in the presented model. Based on the model, a novel compensation network for the voltage loop is proposed, which eliminates the zero point of the voltage loop. The relationship between the gain of the proposed compensation network and the transient response of the output voltage relative to the reference voltage ( V ref ) at the input node of error amplifier is investigated. By this way, an optimal gain for the transient output voltage is obtained and the optimaltransient response without overshoot and oscillation relative to V ref is validated by the circuit simulations and tests.

An Improved Hiccup Mode Short-Circuit Protection Technique With Effective Overshoot Suppression for DC–DC Converters

Based on the analysis of the overshoot during the process of short-circuit recovery, an improved hiccup mode protection technique with effective overshoot suppression is presented in this paper. The hiccup mode is activated by the error amplifier (EA) output rather than the feedback voltage. And when the voltage exceeds the high-clamping voltage, the soft-start voltage will be quickly discharged to zero and a new soft-start cycle will attempt to restart the converter. The proposed control method makes the EA output voltage rapidly decline once short-circuit recovery happens, which is very effective for the suppression of overshoot. In addition, the circuit has combined with a foldback current limiting method to further improve the effect of short-circuit protection and overshoot suppression. The proposed technique has been successfully applied to a peak current mode buck converter with Nuvoton 0.6-μm 5 V/18 V Low-V <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$_{\rm gs}$</tex></formula> CDMOS process. The experimental results show that even in extreme cases, this method can effectively suppress the overshoot and the overshoot is almost zero.