Parity Retransmission Research Articles

A Hybrid ARQ System with Erasures Correction and Parity Retransmission

A modified type of Hybrid ARQ system with erasures correction and parity bits retransmission is considered. Performance of the system is analyzed under assumption that the forward channel suffers from Nakagami common fading and additive white Gaussian noise. A good agreement between theoretical results and simulation is achieved. The proposed ARQ protocol is compared with other known Hybrid ARQ algorithms. It demonstrates significantly higher throughput efficiency in a range of SNR.

New parity retransmission system using product codes

The type-II hybrid automatic repeat request (ARQ) system is an adaptive error control system and has been given considerable attention in the recent years. The main feature of this system is the application of a rate 1/2 block or convolutional error correction code and parity retransmission. The author presents a new parity retransmission system using simple product codes. The throughput efficiency of the proposed system is analysed for the binary symmetric channel (BSC). Numerical results indicate that the proposed system outperforms the type-II hybrid ARQ system.

Selective-repeat-ARQ schemes for broadcast links

The authors propose retransmission error control schemes for broadcast channels. In their selective-repeat-ARQ (automatic repeat request) method, they incorporate some aspects of implementation that they believe were ignored by all the previous work. Based on this protocol, they also propose a type-2 hybrid ARQ scheme that uses parity retransmission. They apply the dynamic programming optimization technique of Wang and Silvester (1987), with some modification, to their schemes. Analysis shows that their schemes outperform all the existing schemes. As special cases of their proposed schemes, the authors can obtain point-to-point ARQ schemes which also outperform all the existing point-to-point schemes. Thus, their schemes extend the useful range of retransmission error control schemes for these channels.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Efficient stop-and-wait type II hybrid ARQ scheme

An efficient stop-and-wait ARQ protocol proposed by Sastry is modified to include a parity retransmission type II hybrid ARQ scheme. Unlike the Sastry scheme in which simple repeats of a data packet are transmitted, with the type II hybrid ARQ scheme, the data packet to be transmitted is encoded with a rate 1/2 code, and repetitions alternate between the two sequences obtained at the output of the encoder. It is found that the throughput can be substantially increased.

Parity retransmission hybrid ARQ using rate 1/2 convolutional codes on a nonstationary channel

A parity retransmission hybrid automatic repeat request (ARQ) scheme is proposed which uses rate 1/2 convolutional codes and Viterbi decoding. A protocol is described which is capable of achieving higher throughputs than previously proposed parity retransmission schemes. The performance analysis is based on a two-state Markov model of a nonstationary channel. This model constitutes a first approximation to a nonstationary channel. The two-state channel model is used to analyze the throughput and undetected error probability of the protocol presented when the receiver has both an infinite and a finite buffer size. It is shown that the throughput improves as the channel becomes more bursty.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Separate codes on type-II hybrid ARQ systems

A hybrid automatic repeat request (ARQ) system (HARQ-II) with parity retransmission for error correction, which combines ARQ and forward error correction is discussed, and the successful application of these codes to HARG-II is illustrated. A method of constructing the codes whereby conventional BCH codes can be changed into separable codes is proposed. A scheme is presented that has the advantages that, the code lengths are always made equal and that even in parity retransmission new information symbols can be sent along with the necessary parity-check symbols. The performance of the proposed schemes on the binary symmetric channel is discussed. The numerical results show that they outperform conventional schemes. >

A Modified Selective-Repeat Type-II Hybrid ARQ System and Its Performance Analysis

The hybrid ARQ scheme with parity retransmission for error control, recently proposed by Lin and Yu [1], [2], is quite robust. This scheme provides both high system throughput and high system reliability. In this paper, a modified Lin-Yu hybrid ARQ scheme is presented. The modified scheme provides a slightly better throughput performance than the original Lin-Yu scheme; however, it is more flexible in utilizing the error-correction power of a code. The modified scheme can be incorporated with a rate 1/2 convolutional code using Viterbi decoding. Furthermore, the pure selectiverepeat ARQ is a degenerated case of the modified scheme in selective mode. Lin and Yu analyzed their scheme only for a receiver buffer of size <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</tex> where <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</tex> is the number of data blocks that can be transmitted in a round-trip delay interval. No analysis for other buffer sizes was given. In this paper, the throughput performance of the modified Lin-Yu scheme is analyzed for any size of receiver buffer. Consequently, the throughput efficiency of the pure selective-repeat ARQ for any receiver buffer size can be obtained. We also show that the modified scheme achieves the same order of reliability as a pure ARQ scheme.

A Hybrid ARQ Scheme with Parity Retransmission for Error Control of Satellite Channels

This paper presents a new type of hybrid ARQ scheme for error control in data communication systems. The new scheme is based on the concept that the parity-check digits for error correction are sent to the receiver only when they are needed. Normally, data blocks with some parity-check bits for error detection are transmitted. When a data block <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</tex> is detected in errors, the retransmissions are not simply repetitions of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</tex> , but alternate repetitions of a parity block <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">P(D)</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</tex> . The parity block <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">P(D)</tex> is formed based on <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</tex> and a half-rate invertible code which is capable of correcting <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</tex> or fewer errors and simultaneously detecting <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d (d &gt; t)</tex> or fewer errors. When a parity block is received, it is used to recover the originally transmitted data block either by inversion or by decoding operation. The repetitions of the parity block <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">P(D)</tex> and the data block <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</tex> are alternately stored in the receiver buffer for error correction until <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</tex> is recovered. We show that the proposed hybrid ARQ scheme provides both high system throughput and high system reliability. It is particularly attractive for error control in high-speed data communication systems with significant roundtrip delays, such as satellite channels.