Parallel Update Algorithm Research Articles

A Network-on-Chip-Based Annealing Processing Architecture for Large-Scale Fully Connected Ising Model

Combinatorial optimization problems are prevalent in many different fields. Most of these problems are NP-hard and challenging for computers with conventional Von-Neumann architecture. Ising machines with a number of spins have the potential to solve these problems by emulating the natural annealing process of solid matter. Recent research has explored some hardware implementation methods of Ising machines to accelerate the convergence process of such problems at room temperature. However, most of them are suffering from low scalability and low parallel processing capability due to the huge hardware cost and high complexity. In this paper, a novel network-on-chip-based annealing processing architecture (NoCAPA) for a large-scale Ising processor is described to address these issues with a NoC computing paradigm, a distributed storage scheme, and a fully pipelined structure design. Several techniques are developed to further increase convergence speed and reduce hardware resource consumption, including a dynamic multithread parallel update algorithm, a router with merge and deflection abilities, and a unique multiply-accumulate operation. The prototype is implemented in FPGA with the maximum operation frequency of 200MHz, achieving up to 120.5 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times$</tex-math> </inline-formula> faster than conventional simulated annealing method when solving the max-cut problem while supporting high scalability.

Accelerating dynamic graph analytics on GPUs

As graph analytics often involves compute-intensive operations, GPUs have been extensively used to accelerate the processing. However, in many applications such as social networks, cyber security, and fraud detection, their representative graphs evolve frequently and one has to perform a rebuild of the graph structure on GPUs to incorporate the updates. Hence, rebuilding the graphs becomes the bottleneck of processing high-speed graph streams. In this paper, we propose a GPU-based dynamic graph storage scheme to support existing graph algorithms easily. Furthermore, we propose parallel update algorithms to support efficient stream updates so that the maintained graph is immediately available for high-speed analytic processing on GPUs. Our extensive experiments with three streaming applications on large-scale real and synthetic datasets demonstrate the superior performance of our proposed approach.

A Nash game approach for OSNR optimization with capacity constraint in optical links

This paper develops a Nash game towards optimizing optical signal-to-noise ratio (OSNR) in the presence of link capacity constraint. In optical wavelength-division multiplexing (WDM) networks, all wavelength-multiplexed channels in a link share the optical fiber. In order to limit nonlinear effects, the total power launched into a fiber has to be below a nonlinearity threshold. This can be regarded as the optical link capacity constraint. We formulate an extended OSNR Nash game that incorporates this underlying system constraint. The status of an optical link is considered directly in the cost function. Sufficient conditions for existence and uniqueness of the Nash equilibrium (NE) solution are given. Two iterative algorithms for channel power control are proposed to compute the NE solution: a parallel update algorithm (PUA) and a relaxed PUA (r-PUA). Their convergence is studied under different conditions, both theoretically and numerically.