Output Vertices Research Articles

Nearest vertex attraction for actively reducing loss

In recent years the neural networks have received considerable success on classification tasks. The randomly initialized network is generally expected to adjust the weights for reducing the loss, which is also indicated as the total distance from the samples to the corresponding vertices. However, the output space of the conventional neural networks suffers from the fixed relation between the labels and vertices during learning. This case forces the mapped points around the unexpected vertex across the decision boundary into the neighborhood of the correct vertex, and simultaneously the boundary points cannot obtain the substantial rectification. Therefore, this study proposes a novel nearest vertex attraction (NVA) to actively adjust the relation between the categories and the output vertices for improving the neural network classifiers. The best relation allows that the data points can be attracted by the nearest vertices to minimize the total moving distances. In this way, the mapped points that are near to the vertices and the decision boundaries obtain the decent management. We evaluated the NVA with several conventional classification techniques and other neural network classifiers on 12 public UCI datasets. The numerical experiments demonstrate that the proposed method improves performance of the neural network classifiers on the involved benchmarks.

УПРАВЛІННЯ ЗБУТОМ ПІДПРИЄМСТВА НА ОСНОВІ ВИКОРИСТАННЯ ДІАГРАМИ ІСІКАВИ

Marketing research at an enterprise is carried out by marketing units in order to determine a possible increase in the marketing activity of the enterprise. To identify the strengths and weaknesses of the sales management of the enterprise, the SWOT-analysis method was applied. A matrix of SWOT analysis of company's sales activity was built, which forms squares in the form of a combination of the following factors: "Strengths-Opportunities" (SO), "Strengths-Threats" (ST), "Weaknesses-Possibilities" (WO), "Weaknesses-Threats" (WT). The most significant intersections of the SWOT matrix factors of the analysis were analyzed, and it was proposed to use four types of strategies on their basis. To formalize cause-and-effect relations Ishikawa diagram was used. In the constructed diagram, the sales activity of the enterprise depends on 5 main groups of characteristics. It is suggested the management of sales activities of the enterprise based on the expansion of the target market, which is characterized by factors (linguistic variables) competitive environment (T1), market segmentation (T2), quality of advertising (T3), digital marketing (T4), product quality (T5) and sales activity (T6). Due to the great uncertainty of the factors influencing sales activities, a solution to the problem of sales management is proposed, which is based on the representation of the system in the form of a fuzzy cognitive map. Establishing links between input (T1,…, T5) and output (T6) vertices allows you to build a fuzzy cognitive map of the sales management process of the enterprise, in the form of an oriented graph based on the adjacency matrix. In the constructed model of the oriented graph all actions of factors (vertices) on each other are in an interval [0; 1]. Therefore, this model is presented as a structural model of the sales management process of the enterprise. It is concluded that a more accurate model can be constructed by giving the arcs of the oriented graph numerical values (weights). The weight of the arcs is interpreted as the force of influence of the factor, and the sign can be both positive (increase in influence) and negative (decrease in influence).

ОЦЕНКА РЕЗУЛЬТАТИВНОСТИ ПРОЦЕССА ПРОЕКТИРОВАНИЯ АВИАДВИГАТЕЛЕЙ С ПОМОЩЬЮ ГРАФОВ

The role of the aircraft engine design process effectiveness evaluating as an integral part of monitoring, measuring, and analyzing this process in the overall enterprise quality management system is considered. The general approach to the effectiveness evaluation and analysis is analyzed. It is noted that in the effectiveness evaluation, both integral indicators and calculations made for all the constituent elements of the process indicators should be determined. In order to identify the root causes of obtaining unsatisfactory performance indicators, each criterion is examined in detail, analyzing the results of each individual unit participation in the design process. For the analysis of quantitative indicators of the design process effectiveness, it is proposed to apply processes modeling and analysis using directed (oriented) and non-directional graphs. To carry out a structural analysis of the results, it is proposed to represent the graph in the form of a vertex adjacency matrix. Examples of the design processes effectiveness evaluating are considered according to the indicator “Number of design documents developed in a monitoring time (month)” and according to the indicator “Fulfillment of thematic plans items put under control, the deadlines for which have been postponed”. In the first example, in a directed graph, the group of output vertices consists of the design subdivisions involved in the design, and the group of input vertices consists of the projects that are being designed. The edges of the graph are the quantities of documentation developed by each unit for each project. In the second example, the connection of the output vertices of the graph, which are the design units, with the input vertex is carried out through the edges, on which the number of thematic plan points is set, the deadlines for which were postponed. The process of data mathematical processing recorded in vertex adjacency matrices is described. The proposed methodology application allows the analysis of the enterprise production activity results for each individual indicator of the analyzed process.

Задача оптимизации вычислений в сетевых структурах

A computer network consisting of n vertices (vertices, which solved some problems), m input vertices and m output vertices ( m is the number of tasks) is considered. Each task matches to way in the network with input H and output K , corresponding to some algorithm of problem solving. At the same time only one task can be solved in each vertex. Therefore, it may be a conflict in the moment of arrival to the vertex of a task if this vertex is busy with another task. The vertices in which several tasks may be solved at the same time, will be called problem vertices. The problems of tasks scheduling according to criteria of minimizing the time required to solve all the problems or minimize the maximum deviation from the required solution time are examined. Methods of local optimization, branch, branch and bound are proposed for their solution.

An extremal result for geometries in the one-way measurement model

We present an extremal result for the class of graphs $G$ which (together with some specified sets of input and output vertices, $I$ and $O$) have a certain ``flow'' property introduced by Danos and Kashefi for the one-way measurement model of quantum computation. The existence of a flow for a triple $(G,I,O)$ allows a unitary embedding to be derived from any choice of measurement bases allowed in the one-way measurement model. We prove an upper bound on the number of edges that a graph $G$ may have, in order for a triple $(G,I,O)$ to have a flow for some $I, O \subseteq V(G)$, in terms of the number of vertices in $G$ and $O$. This implies that finding a flow for a triple $(G,I,O)$ when $\lvert I \rvert = \lvert O \rvert = k$ (corresponding to unitary transformations in the measurement model) and $\lvert V(G) \rvert = n$ can be performed in time $O(k^2 n)$, improving the earlier known bound of $O(km)$ given in \cite{B06a}, where $m = \lvert E(G) \rvert$.

Construction of asymmetric connectors of depth two

An ( n , N ) -connector of depth d is an acyclic digraph with n inputs and N outputs in which for any injective mapping of input vertices into output vertices there exist n vertex disjoint paths of length at most d joining each input to its corresponding output. In this paper we consider the problem of construction of sparse depth two connectors with n ≪ N . We use posets of star products and their matching properties to construct such connectors. In particular, this gives a simple explicit construction for connectors of size O ( N log n / log log n ) . Thus our earlier idea to use other posets than the family of subsets of a finite set was successful.

Sparse asymmetric connectors in communication networks

Abstract An (n, N, d)–connector is an acyclic digraph with n inputs and N outputs in which for any injective mapping of input vertices into output vertices there exist n vertex disjoint paths of length d joining each input to its corresponding output. We consider the problem of construction of sparse (n, N, 2)–connectors (depth 2 connectors) when n ≪ N . The probabilistic argument in [A. Baltz, G. Jager, A. Srivastav, Elementary constructions of sparse asymmetric connectors, in Proceedings of the 23rd Conference on Foundations of Software Technology and Theoretical Computer Science (FSTTCS), Mumbai, India, LNCS 2914, 13-22, December 2003] shows the existence of (n, N, 2)–connectors of size (number of edges) O(N) if n ⩽ N 1 / 2 − ɛ , ɛ > 0 . However, the known explicit constructions with n ⩽ N in [F.K. Hwang, G.W. Richards, “A two–stage rearrangeable broadcast switching network”, IEEE Trans. on Communications 33 (1985) 1025-1035],[A. Baltz, G. Jager, A. Srivastav, Elementary constructions of sparse asymmetric connectors, in Proceedings of the 23rd Conference on Foundations of Software Technology and Theoretical Computer Science (FSTTCS), Mumbai, India, LNCS 2914, 13-22, December 2003],[A. Baltz, G. Jager, A. Srivastav, Constructions of sparse asymmetric connectors with Number Theoretic methods, submitted to Networks] are of size O ( N n ) . Here we present a simple combinatorial construction for (n, N, 2)–connectors of size O(N log 2 n). We also consider depth 2 fault–tolerant connectors under arc or node failures.

EXPOSED LAYOUTS OF THE BUTTERFLY NETWORK

This work studies layouts of the Butterfly network under the restriction that its input and output verticles are exposed, that is, are placed on the boundary of the grid. Avior et al. have shown that the minimal area of a layout of the n-input Butterfly, without the above restriction, is (1 + o(1))n2). The effect of this restriction on the area was left as an open question. This paper reveals that exposing the input and output vertices is essentially free. That is, it presents an exposed layout of the Butterfly having the same area as above. In this layout, the fractions of the input and output vertices assigned to each side of the grid are as follows when scanning the sides in a circular fashion: half of the inputs, half of the outputs, half of the inputs, and half of the outputs. We refer to such a layout as a [Formula: see text]-layout. The main technique employed in this layout is the reduction of the layout problem of the Butterfly to a certain layout problem of a complete bipartite graph. We use the same technique to produce a (I, 0, O, 0)-layout (inputs on one side and outputs on the opposite side) in area 2 + o(1))n2. Finally, we show that the area of a [Formula: see text]-layout is greater than [Formula: see text]. Hence, this input-output configuration is more area-demanding than [Formula: see text].

A parallel polygon-clipping algorithm

We describe a new parallel polygonclipping algorithm based on a novel technique that allows a processor to compute output vertices independently of the results of the other processors. The basis for the method is a collision-free labeling scheme to compute the labels of the vertices of the output polygon. This labeling scheme depends only on the id of the vertices of the output polygon. This labeling scheme depends only on the id of the vertex in the input polygon. This procedure allows us to defer the synchronization between processors to the final stages of the algorithm, reduces the amount of overhead due to fine-grain synchronization, and helps makes the algorithm efficient.

A graph-theoretic characterization for the rank of the transfer matrix of a structured system

In this paper structured systems are considered and the generic rank of the transfer matrix of such systems is introduced. It is shown that this rank equals the maximum number of vertex disjoint paths from the input vertices to the output vertices in the graph that can be associated to the structured system. This maximum number of disjoint paths can be calculated using techniques from combinatorics. As an application a structural version of the well-known almost disturbance decoupling problem is proposed.