Output Sampling Rate Research Articles

A flexible system-on-a-chip control hardware for atomic, molecular, and optical physics experiments.

We have implemented a control system core for experiments in atomic, molecular, and optical physics based on a commercial low-cost board, featuring a field-programmable gate array as part of a system-on-a-chip on which a Linux operating system is running. The board features Gigabit Ethernet, allowing for fast data transmission and operation of remote experimental systems. A single board can control a set of devices generating digital, analog, and radio frequency signals with precise timing given either by an external or internal clock. Contiguous output and input sampling rates of up to 40MHz are achievable. Several boards can run synchronously with a timing error approaching 1ns. For this purpose, a novel auto-synchronization scheme is demonstrated, with possible application in complex distributed experimental setups with demanding timing requests.

A Time-Interleaved 2nd-Order ΔΣ Modulator Achieving 5-MHz Bandwidth and 86.1-dB SNDR Using Digital Feed-Forward Extrapolation

This article presents a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4\times $ </tex-math></inline-formula> time-interleaved (TI) 2nd-order discrete-time (DT) delta-sigma modulator (DSM). We propose a digital feed-forward extrapolation by first digitizing the internal analog nodes’ information from one channel, and then extrapolating the other channels in the digital domain. As a result, this DSM only needs two operational amplifiers (op-amps) to realize four interleaving paths, thus reducing analog hardware overheads. Meanwhile, we linearize the digital feed-forward paths through injected dithering. We present the derivation of extrapolating TI DSM starting from a single-channel DSM, while we also list and compare several conventional TI approaches. Implemented in 28-nm CMOS, this modulator achieves an equivalent output-sampling rate of 2.08 GS/s, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$208\times $ </tex-math></inline-formula> oversampling ratio (OSR), and a signal to noise and distortion ratio (SNDR)/spurious-free dynamic range (SFDR) of 86.1 dB/98 dB with 5-MHz bandwidth (BW). The power consumption is 23.1 mW, which results in a Schreier Figure of Merit (FoM) of 169.5 dB.

Nonuniform Sampling Rate Conversion:An Efficient Approach

We present a discrete-time algorithm for nonuniform sampling rate conversion that presents low computational complexity and memory requirements. It generalizes arbitrary sampling rate conversion by accommodating time-varying conversion ratios, i.e., it can efficiently adapt to instantaneous changes of the input and output sampling rates. This approach is based on appropriately factorizing the time-varying discrete-time filter used for the conversion. Common filters that satisfy this factorization property are those where the underlying continuous-time filter consists of linear combinations of exponentials, e.g., those described by linear constant-coefficient differential equations. This factorization separates the computation into two parts: one consisting of a factor solely depending on the output sampling instants and the other consists of a summation -- that can be computed recursively -- whose terms depend solely on the input sampling instants and its number of terms is given by a relationship between input and output sampling instants. Thus, nonuniform sampling rates can be accommodated by updating the factors involved and adjusting the number of terms added. When the impulse response consists of exponentials, computing the factors can be done recursively in an efficient manner.

Multiclass audio segmentation based on recurrent neural networks for broadcast domain data

This paper presents a new approach based on recurrent neural networks (RNN) to the multiclass audio segmentation task whose goal is to classify an audio signal as speech, music, noise or a combination of these. The proposed system is based on the use of bidirectional long short-term Memory (BLSTM) networks to model temporal dependencies in the signal. The RNN is complemented by a resegmentation module, gaining long term stability by means of the tied state concept in hidden Markov models. We explore different neural architectures introducing temporal pooling layers to reduce the neural network output sampling rate. Our findings show that removing redundant temporal information is beneficial for the segmentation system showing a relative improvement close to 5%. Furthermore, this solution does not increase the number of parameters of the model and reduces the number of operations per second, allowing our system to achieve a real-time factor below 0.04 if running on CPU and below 0.03 if running on GPU. This new architecture combined with a data-agnostic data augmentation technique called mixup allows our system to achieve competitive results in both the Albayzín 2010 and 2012 evaluation datasets, presenting a relative improvement of 19.72% and 5.35% compared to the best results found in the literature for these databases.

19-picometer mechanical step displacement measurement using heterodyne interferometer with phase-locked loop and piezoelectric driving flexure-stage

In this paper, we discuss 20-picometer-order mechanical step displacement measurements using a heterodyne interferometer with a phase-locked loop (PLL) and two piezoelectric (PZT) driving flexure-stages. First, the phase meter for heterodyne interferometry using one simple digital PLL is developed. Two inputs and one output of the single PLL are the reference and measurement signals of the heterodyne interferometer and the phase shift due to the movement of the target mirror, respectively. The PLL includes an active phase shifter, a mixer (multiplier), a low-pass filter combined with an averaging operation, and an integrator. In electronics evaluation of the PLL, the PLL shows a phase resolution of 174 μrad with 4.2 μrad noise (standard deviation) and a phase noise floor of 3 μrad/√Hz above 0.2 Hz with an output sampling rate of 200 Hz. Using the single PLL, a four-pass normal commercial heterodyne interferometer, and high-stiff-parallel spring stage driven by PZT actuator, we demonstrate the actuations and measurements of mechanical step displacements of 19 pm (1.5 mrad) and a displacement noise floor of 1.1 pm/√Hz (90 μrad/√Hz) above 1 Hz in normal air. In the paper, the principle, instrumentation, and experimental results are discussed.

고속 표본율을 위한 임의의 SRC 구조

이 논문은 고속 표본율을 발생시키기 위한 임의의 표본율 변환기(SRC)의 구조를 제안하고 시뮬레이션을 통해 성능을 결과로 나타낸다. 통신 시스템에서 다양한 데이터율의 신호를 송수신하기 위해서는 임의의 표본율을 사용해야 한다. 기존의 SRC 구조는 시스템이 복잡하고 소모되는 자원이 많다. 또한, 통신 시스템의 경우 데이터율과 표본율의 동기화가 필요한데 이를 고려하여 설계하려면 외부 클럭이 필요해진다. 그래서 우리는 데이터율과 표본율 사이의 동기화가 필요하지 않은 임의의 SRC 구조를 제안하였다. 이 논문에서는 제안한 구조의 성능과 성능을 충족시키기 위한 필터의 조건을 결과로 보여준다.

Second-Order Asymptotics for Communication Under Strong Asynchronism

The capacity under strong asynchronism was recently shown to be essentially unaffected by the imposed decoding delay—the elapsed time between when information is available at the transmitter and when it is decoded—and the output sampling rate. This paper shows that, in contrast with capacity, the second-order term in the maximum rate expansion is sensitive to both parameters. When the receiver must locate the sent codeword exactly and therefore achieve minimum delay equal to the blocklength $n$ , the second-order term in the maximum rate expansion is of order $\Theta (1/\rho)$ for any sampling rate $\rho =O(1/\sqrt {n})$ (and $\rho =\omega (1/n)$ for otherwise reliable communication is impossible). Instead, if $\rho =\omega (1/\sqrt {n})$ , then the second-order term is the same as under full sampling and is given by a standard $\Theta (\sqrt {n})$ term. However, if the delay constraint is only slightly relaxed to $n(1+o(1))$ , then the above order transition (for $\rho =O(1/\sqrt {n})$ and $\rho =\omega (1/\sqrt {n})$ ) vanishes and the second-order term remains the same as under full sampling for any $\rho =\omega (1/n)$ .

Power Quality Measurement System With PMU Functionality Based on Interpolated Sampling

A power quality measurement system is introduced in this paper. While sampling with a high rate, it provides mains frequency synchronous voltage and current data in the form of 215 samples per cycle using a linear interpolation unit. The interpolation output sampling rate is provided by a mains frequency estimation unit, which conducts phase locking on the voltage measurements and additionally outputs the synchrophasor, frequency, and the rate of change of frequency. This algorithm is checked in simulations against the current standards, while discussing a phenomenon that is not yet taken into account by these standards: low-frequency interharmonic disturbances such as ripple control signals, which occur frequently in today’s power grids. To desensitize the system toward these, compromises must be taken when it comes to standard compliance under transient conditions. Thereafter, first measurements with an evaluation system are analyzed to get a first impression of the system response to real signals.

Distributed Dual-rate Consensus Predictive Control of Looper Tension System in Hot Rolling Mills

This paper considers a dual-rate distributed predictive control strategy for the looper tension system in hot rolling mills, which is a typical multi-agent system with directed communication topology. First, we establish an interconnected model for looper tension control system and the disturbances from the neighbors are considered effectively. Second, the consensus control protocol is developed based on the proposed control strategy to improve the robustness and stability of the multi-agent, and the sufficient conditions for consensus are developed. We update and implement all the agent controllers sequentially in one output sampling period and begin a new cycle at the next sampling instant, which leads the multi-agent control system is of fast control updating rate and slow output sampling rate. The control inputs of neighbors can be obtained to compensate the coupling effects, and the cooperation of controllers are improved. Finally, simulation results verify the proposed control strategy and corresponding results.

Design and FPGA Implementation of a Reconfigurable Digital Down Converter for Wideband Applications

This brief presents a field-programmable gate array-based implementation of a reconfigurable digital down converter (DDC) that can process input bandwidth of up to 3.6 GHz and provide a flexible down-converted output. The proposed DDC consists of a mixer and a resampling filter. The resampling filter can work at much higher clock rate. The reason is that all the single-cycle recursive loops in the resampling filter are pipelined by using either real/imaginary part-time multiplexing or parallel processing technique. With features like arbitrary sampling rate conversion, and dynamic configuration, the proposed design is highly flexible, so that it can generate a down-converted output with sampling rate, selectable within the range of 1 kS/s–225 MS/s. Moreover, the flexibility is further improved by being able to specify the output sampling rate and center frequency to a resolution of less than 1 S/s. The experimental results show that the proposed design can achieve the same functionality as the existing work but with fewer hardware resources.

Periodic disturbance rejection to the Nyquist frequency and beyond

In this paper, we address periodic disturbance rejection for sampled-data control systems, where the frequency of the disturbance can be beyond the Nyquist frequency of the limited measured plant output sampling rate. The disturbance effect on steady-state response of the fictitious fast-rate plant output including intersample information is obtained using discrete-time Fourier series. A sufficient condition for disturbance rejection together with a sufficient and necessary condition for perfect disturbance elimination are provided by employing the steady-state response. A simple but effective controller design procedure combining H∞ loop shaping, Youla–Kucera parameterization, and gradient methods is provided to achieve the two conditions. The proposed approach is applied on vibration control beyond the Nyquist frequency in a commercial hard disk drive. The effectiveness of the proposed approach is verified by our simulation results showing disturbance rejection of 62% and perfect disturbance elimination, as well as by our experimental results showing disturbance rejection of 54%.

A multirate DSP structure for the identification of protein-coding regions

The identification of protein-coding regions in DNA sequence using digital signal processing methods is one of the central issues in bioinformatics. In this paper, a multirate structure is proposed for the identification of protein-coding regions whose input sampling rate is same as output sampling rate. The multirate structure consists of cascade combination of decimation filter, kernel filter and interpolation filter. The decimation filter is a complex filter, the kernel filter is an FIR lowpass filter and the interpolation filter isa moving average filter. Polyphase decomposition is applied on both decimation filter and interpolation filter for computationally efficient implementation. The potential of the proposed method is evaluated in comparison with existing methods using standard datasets. The results show that the proposed method improves the identification accuracy of protein-coding regions to a great extent compared to its counterparts.

Architecture of an Ultrasound System for Continuous Real-Time High Frame Rate Imaging.

High frame rate (HFR) imaging methods based on the transmission of defocused or plane waves rather than focused beams are increasingly popular. However, the production of HFR images poses severe requirements both in the transmission and the reception sections of ultrasound scanners. In particular, major technical difficulties arise if the images must be continuously produced in real-time, i.e., without any acquisition interruption nor loss of data. This paper presents the implementation of the real-time HFR-compounded imaging application in the ULA-OP 256 research platform. The beamformer sustains an average output sample rate of 470 MSPS. This allows continuously producing coherently compounded images, each of 64 lines by 1280 depths (here corresponding to 15.7 mm width and 45 mm depth, respectively), at frame rates up to 5.3 kHz. Imaging tests addressed to evaluate the achievable speed and quality performance were conducted on phantom. Results obtained by real-time compounding frames obtained with different numbers of steering angles between +7.5° and -7.5° are presented.

FPGA implementation of a reconfigurable channelization for simultaneous multichannel DRM30/FM receiver

It is becoming more and more popular to support multiple radio broadcasting standards, such as Frequency Modulation (FM) and Digital Radio Mondiale for Amplitude Modulation (DRM30), on one channelization system for content and metadata indexing applications. However, existing works mainly focus on supporting only one standard, because different standards usually have different channel characteristics in term of bandwidth and carrier location. This paper presents a flexible and resource-efficient architecture that can simultaneously channelize the entire FM and DRM30 bands. In particular, a coarse/finergrained division based approach is proposed to implement the multi-standard channelization. Therefore, the parameters of each output channel, such as center frequency and output sampling rate, can be independently configured at run-time. Finally, the proposed architecture, which consists of one polyphase Discrete Fourier Transform (DFT) filter bank, one tuning unit, and one resampling filter, is implemented in a single field programmable gate array (FPGA). The experiment results indicate that the proposed design can support both FM and DRM30 standards, and requires less FPGA resources than the existing works which can only support one standard.

High-Speed Interrogation of Low-Finesse Fabry–Perot Sensors Using a Telecom DFB Laser Diode

This paper presents a high-speed high-resolution low-finesse Fabry–Perot sensor interrogation system. The system utilizes a standard telecommunication distributed-feedback laser diode and an all-digital high-speed signal processing based on field-programmable-gate-array. The system can resolve multiple Fabry–Perot Interferometers (FPI) simultaneously, which might include multiple sensors, multiparameter sensors, or combinations of sensor(s) and reference FPIs. This opens up possibilities for adopting different measurement system configurations and compensation schemes. The system exhibits white-noise characteristics for a system bandwidth above 100 Hz, with spectral density of about 2 pm/√Hz when interrogating about 1 mm long low-finesse FPI. At an output sampling rate of 10 Hz, a sensor measurement length resolution of less than 50 pm was demonstrated for about a 600 μm long sensing cavity (corresponding to a strain resolution of about 70 nϵ). Proper use of simple all-fiber reference also provided low long-term drift. The system provides an up to 40 KHz sampling rate and was used to demonstrate dynamic measurement of strain variation on a piezo-electric stack and for interrogation of in-cylinder pressure variations within a high-rotation-rate miniature diesel engine. Fabry–Perot sensors with typical lengths between a few hundred and a few mm can be read-out with the current version of the proposed interrogator. The proposed system was built out of a small number of highly cost-efficient optoelectronics and electronics components (all used in FTTH) and thus, opens-up potential for new applications where the cost of interrogation is presently limiting.

Design and FPGA Implementation of a Reconfigurable 1024-Channel Channelization Architecture for SDR Application

In this paper, we present a novel channelization architecture, which can simultaneously process two channels of complex input data and provide up to 1024 independent channels of complex output data. The proposed architecture is highly modular and generic, so that parameters of each output channel can be dynamically changed even at runtime in terms of the bandwidth, center frequency, output sampling rate, and so on. It consists of one tunable pipelined frequency transform (TPFT)-based coarse channelization block, one tuning unit, and one resampling filter. Based on the analysis of the data dependence between the subbands, a novel channel splitting scheme is proposed to enable multiple subbands to share the proposed TPFT block. The multiplier block (MB) and subexpression sharing techniques are used to reduce the number of arithmetic units of the TPFT block. Moreover, the proposed Farrow-based resampling filter does not require division operation and dual-port RAMs resulting in significant area saving. Finally, we implement the proposed channelization architecture in a single field-programmable gate array. The experiment results indicate that our design provides the flexibility associated with the existing works, but with greater resource efficiency.

An auxiliary model based least squares algorithm for a dual-rate state space system with time-delay using the data filtering

For dual-rate state space systems with time-delay, this paper combines the auxiliary model identification idea with the filtering technique, transforms the state space model into the identification model with different input and output sampling rates, and presents a filtering and auxiliary model based recursive least squares identification algorithm with finite measurement input–output data. Compared with the auxiliary model based recursive least squares algorithm, the proposed algorithm can generate more accurate parameter estimates and has a higher computational efficiency because the dimensions of its covariance matrices become small.

A general multirate approach for direct closed-loop identification to the Nyquist frequency and beyond

Without injecting any external persistently exciting signals, a general multirate approach is proposed for direct closed-loop identification. First, an extended least-squares algorithm is designed to identify the mixed-rate model after polynomial transformation. Next, the identified mixed-rate model is used to compute the fast-rate model, from which system dynamics to the Nyquist frequency and beyond can be obtained. Identifiability is mathematically proven if the plant output sampling rate is non-integer multiples of the controller sampling rate. The effectiveness of the proposed approach is evaluated by both the simulation and experimental results in a hard disk drive.

Using Abstraction Hierarchy as a Structured Approach in Verifying Data Quality in Driving Research

Data lost or misconstrued due to malfunctioning research equipment affects accuracy, results and analyses that driving researchers report. Carefully studying the data collection system with an Abstraction Hierarchy gathers necessary information about the equipment location and capabilities which can highlight issues in the collected data where completeness and quality are lacking. Use of this structured method to describe the instrumented research vehicle information system is a new application; however, Abstraction Hierarchy has been used in complex systems such as power, chemical and nuclear industries in order to improve the reliability of the human-machine interfaces. In this application, the Abstraction Hierarchy identified potential operating temperature issues affecting the quality of the data, provided avenues to clearly define how behavioral variables were measured, equated input and output sampling rates to show potential problems in the system and used similar variables to cross-check the consistency of the data. This is the first step in developing a structured approach to verifying data quality.

Analysis and Design of Efficient and Flexible Fast-Convolution Based Multirate Filter Banks

In this paper, we investigate fast-convolution based highly tunable multirate filter bank (FB) configurations. Based on FFT-IFFT pair with overlapped processing, they offer a way to tune the filters' frequency-domain characteristics in a straightforward way. Different subbands are easily configurable for different bandwidths, center frequencies, and output sampling rates, including also partial or full-band nearly perfect-reconstruction systems. Such FBs find various applications, for example, as flexible multichannel channelization filters for software defined radios. They have also the capability to implement simultaneous waveform processing for multiple single-carrier and/or multicarrier transmission channels with nonuniform bandwidths and subchannel spacings. This paper develops an effective model for frequency response analysis and optimization for such filter banks, explores various practical issues of fast-convolution processing and reports the optimized frequency response characteristics versus direct raised cosine based designs. The fast-convolution approach is shown to be a competitive basis for filter bank based multicarrier waveform processing in terms of spectral containment and complexity.