Output Power Bandwidth Research Articles

3.5 W Broadband PM Hybrid Amplifier at 2051 nm With Holmium- and Thulium-Doped Single-Clad Fibers

We report the design and performance of a packaged broadband PM hybrid HDFA/TDFA in the 2000-2100 nm band using all-single-clad doped fibers. Internalsmall signal G = 49.1 dB, small signal NF = 6.5 dB, and Pout = 3.54 W are achieved at λs = 2051 nm. The simulated 3 dB output power bandwidth is 98 nm. Comparisons of experimental data and simulations show good agreement. We investigate through simulations an all-Holmium two stage PM optical amplifier design for comparison to the hybrid PM HDFA/TDFA.

A CMOS Wideband Current-Mode Digital Polar Power Amplifier With Built-In AM–PM Distortion Self-Compensation

This paper presents a fully integrated wideband current-mode digital polar power amplifier (DPA) in CMOS with built-in AM–PM distortion self-compensation. Feedforward capacitors are implemented in each differential cascode digital power cell. These feedforward capacitors operate together with a proposed DPA biasing scheme to minimize the DPA output device capacitance $C_{d}$ variations over a wide output power range and a wide carrier frequency bandwidth, resulting in DPA AM–PM distortion reduction. A three-coil transformer-based DPA output passive network is implemented within a single transformer footprint (330 $\mu \text{m} \,\, \times $ 330 $\mu \text{m}$ ) and provides parallel power combining and load impedance transformation with a low loss, an octave bandwidth, and a large impedance transformation ratio. Moreover, this proposed power amplifier (PA) output passive network shows a desensitized phase response to $C_{d}$ variations and further suppresses the DPA AM–PM distortion. Both proposed AM–PM distortion self-compensation techniques are effective for a large carrier frequency range and a wide modulation bandwidth, and are independent of the DPA AM control codes. This results in a superior inherent DPA phase linearity and reduces or even eliminates the need for phase pre-distortion, which dramatically simplifies the DPA pre-distortion computations. As a proof-of-concept, a 2–4.3 GHz wideband DPA is implemented in a standard 28-nm bulk CMOS process. Operating with a low supply voltage of 1.4 V for enhanced reliability, the DPA demonstrates ±0.5 dB PA output power bandwidth from 2 to 4.3 GHz with +24.9 dBm peak output power at 3.1 GHz. The measured peak PA drain efficiency is 42.7% at 2.5 GHz and is more than 27% from 2 to 4.3 GHz. The measured PA AM–PM distortion is within 6.8° at 2.8 GHz over the PA output power dynamic range of 25 dB, achieving the lowest AM–PM distortion among recently reported current-mode DPAs in the same frequency range. Without any phase pre-distortion, modulation measurements with a 20-MHz 802.11n standard compliant signal demonstrate 2.95% rms error vector magnitude, −33.5 dBc adjacent channel leakage ratio, 15.6% PA drain efficiency, and +14.6 dBm PA average output power at 2.8 GHz.

A Wideband SiGe BiCMOS Frequency Doubler With 6.5-dBm Peak Output Power for Millimeter-Wave Signal Sources

This paper presents a balanced frequency doubler with 6.5-dBm peak output power at 204 GHz in 130-nm SiGe BiCMOS technology ( f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> /f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> = 210/250 GHz). To convert the single-ended input signal to a differential signal for balanced operation, an on-chip transformer-based balun is employed. Detailed design procedure and compensation techniques to lower the imbalance at the output ports, based on mixed mode S parameters are proposed and verified analytically and through electromagnetic simulations. The use of optimized harmonic reflectors at the input port results in a 2-dBm increase in output power without sacrificing the bandwidth of interest. The measured conversion loss of the frequency doubler is 9 dB with 6-dBm input power at 204-GHz output. The measured peak output power is 6.5 dBm with an on-chip power amplifier stage. The 3-dB output power bandwidth is measured to be wider than 50 GHz (170-220 GHz). The total chip area of the doubler is 0.09 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and the dc power consumption is 90 mW from a 1.8-V supply, which corresponds to a 5% collector efficiency.

A compact, 36 to 72 GHz 15.8 dBm power amplifier with 66.7% fractional bandwidth in 45 nm SOI CMOS

ABSTRACTA 36 to 72 GHz wideband power amplifier (PA) in 45‐nm silicon‐on‐insulator CMOS is presented. The PA adopts a two‐stage cascode topology, in which counterposed resonances in the matching networks enable a 3‐dB output power bandwidth of 36 GHz. This bandwidth represents a 66.7% fractional bandwidth—a 1.8X improvement over previously reported CMOS V‐band PAs. At 62 GHz, the PA achieves a peak output power of 15.8 dBm, a gain of 16.9 dB, and 9.4% power‐added efficiency using a 2.2‐V supply. The PA has the largest output power and smallest die area among reported wideband (BW &gt; 30%) millimeter‐wave PAs in CMOS. © 2014 Wiley Periodicals, Inc. Microwave Opt Technol Lett 56:166–169, 2014

A 60 GHz Broadband Stacked FET Power Amplifier Using 130 nm Metamorphic HEMTs

A V-band monolithic microwave integrated circuit power amplifier (PA) using metamorphic high electron mobility transistors (mHEMTs) is developed using a stacked-FET structure. Design methodology to optimize the series power combining power amplifiers at millimeter-waves is also presented. The fabricated PA using triple-stacked 130 nm mHEMTs shows a gain of 16 dB and a saturated output power of 20 dBm with a power added efficiency of 19% at 59 GHz. The 3 dB output power bandwidth is as wide as 15 GHz.

Design and Analysis of a Stage-Scaled Distributed Power Amplifier

This paper presents the design, analysis, and measurement of a pseudodifferential distributed power amplifier in a 0.13-μm SiGe BiCMOS process. To mitigate the large loaded transmission line loss due to bipolar base resistance, emitter degeneration is used and an optimal small-signal design point is selected for maximum gain-bandwidth product. To enhance the efficiency of distributed amplifiers (DAs), a stage-scaling technique is proposed to utilize more voltage swing while reducing the total current consumption. The output power and efficiency of the amplifier are evaluated as a function of two scaling coefficients. The fabricated distributed power amplifier achieves a small-signal gain of 10 dB and a 3-dB bandwidth of 110 GHz. The measured midband saturated output power is 17.5 dBm with a peak power-added efficiency (PAE) of 13.2% and the 3-dB output power bandwidth is greater than 77 GHz. The amplifier consumes 119 mA from a 3-V supply and occupies an area of 2.08 mm × 1.05 mm. Compared to a uniform nonscaled DA fabricated in the same process, the stage-scaled amplifier achieves the same output power with higher collector efficiency and PAE over the entire measured frequency range.

A 18 GHz Broadband Stacked FET Power Amplifier Using 130 nm Metamorphic HEMTs

A broadband power amplifier (PA) with a 3 dB power bandwidth of 72% is presented using metamorphic high electron mobility transistors (mHEMTs). A stacked FET structure, where transistors are series connected to combine voltage swings, is employed to overcome relatively low breakdown voltages of mHEMTs. Series-connected PA's show much higher load impedance compared to the parallel combined transistors, which allows output matching to be realized in the low quality (Q)-factor region, providing the broadband performance. The fabricated PA using quadruple-stacked 130 nm mHEMTs has a gain of 21.2 dB and saturated output power of 26.4 dBm with power added efficiency (PAE) of 33% at the design frequency of 18 GHz. The 3 dB output power bandwidth is from 10 to 23 GHz.

Power and spectrally efficient four-dimensional super-orthogonal WCDMA building block for next generation wireless applications

This letter introduces a versatile multi-code multidimensional super-orthogonal wideband code division multiple access (MC-MD-SO- WCDMA) multi-layered-modulation (MLM) scheme, employing families of root-of-unity filtered (RUF) generalized-chirp-like (GCL) constant-envelope complex spreading sequences (GCL-CE-CSS), including recently derived families of super-orthogonal (SO) GCL-CE-CSS with zero cross-correlation (ZCC) properties. The latter sequences facilitate multi-user-interference (MUI) free demodulation and detection. It is shown that the resulting MC-MD-SO-WCDMA signal simultaneously exhibits a spectrally efficient minimum (Nyquist) bandwidth output power spectral density (PSD) and a near constant instantaneous power output signal, yielding significant spectral and power efficiency advantages over existing single and multi-carrier multi-level quadrature-amplitude-modulated (M-QAM) WCDMA and OFDM modulation standards.

164-GHz MMIC HEMT doubler

In this paper, a MMIC frequency doubler based on an InP HEMT and grounded CPW (GCPW) technology is reported. The doubler demonstrated a conversion loss of only 2 dB and output power of 5 dBm at 164 GHz. The 3 dB output power bandwidth is 14 GHz, or 8.5%. This is the best reported result for a MMIC HEMT doubler above 100 GHz.

Theory and experiment of ultrahigh-gain gyrotron traveling wave amplifier

Physics and technology issues of importance to the high-gain gyrotron traveling wave amplifier (gyro-TWT) are investigated in theory and experiment. The gyro-TWT is known to be highly susceptible to spurious oscillations, especially in high gain operations. In the current study, oscillations of various origins are classified and characterized with detailed theoretical modeling. They are shown to be intricately connected to the interplay between the absolute/convective instabilities, circuit losses, and reflective feedback. Knowledge of these processes leads to the concept of an ultra high gain scheme which employs distributed wall losses for the suppression of spurious oscillations. A proof-of-principle Ka-band gyro-TWT experiment stable at zero drive has produced 93 kW saturated peak power at 26.5% efficiency and 70 dB gain, with a 3 dB saturated output power bandwidth of 3 GHz. The saturated gain is more than 30 dB beyond that previously achieved.

An Experimental Gyro-TWT

Three experimental gyro traveling wave tubes (TWT'S) have been built and tested. All tubes used a fundamental cyclotron resonance interaction with the circularly polarized TE/sup 0/sub 11/ dominant waveguide mode. The tubes differed in the length of the single circuit section and in the amount of distributed loss used. The experiments were conducted at 5 GHz, with the object of producing a design that could be scaled to 94 GHz. Results on the third experiment include measurements of stable gain as high as 24 dB small signal and 18 dB saturated. A saturated power output of 120 kW at a total beam efficiency of 26 percent was measured with a 3-dB saturated power output bandwidth of 6 percent. The design features of the tubes and the experimental results are described fully.