Order All-pass Filter Research Articles

Second Order Universal Filter Using Four Terminal Floating Nullor (FTFN)

In this research paper, a voltage mode second order universal filter using Four Terminal Floating Nullor (FTFN) is presented. The proposed design uses Three Input Single Output (TISO) for the realization of all filter responses namely Low Pass Filter (LPF), High Pass Filter (HPF), Band Pass Filter (BPF), Notch Filter (NF) and All Pass Filter (APF) by using proper input selection. The analog building block, FTFN is simply realized with two commercially available AD844 ICs. The proposed second order universal filter comes with a single FTFN block with four passive components in which no component matching is required for filter realization. The universal filter is well verified using PSPICE simulation. In addition, experimental verification for the second order APF has been performed that confirms the theoretical expectations.

Electronically Adjustable Voltage-mode First-order Allpass Filter Using Single Commercially Available IC

In this design, the use of single commercially available integrated circuit (IC), LT1228 from Linear Technology Corporation, to implement the first order allpass filter is presented. The passband voltage gain of the presented first allpass filter (APF) is unit and constant throughout the operation frequency, while the phase response is electronically tuned by changing the external DC bias current. With this property, the proposed first order filter can be used as phase shifter with microcontroller controllability. Tuning phase property is not required any matching condition. The proposed phase shifter consists of one LT1228, one capacitor and two resistors which is attractive for off the shelf implementation. Moreover, the impedance at output voltage node is exhibit low which can connect to other circuit without the requirement of external voltage buffer. The expected performances of the proposed circuit are proved by Pspice simulation using macro model parameters. Also, the quadrature sinusoidal oscillator which is designed from the connecting of the proposed filter and integrator is chosen as application example.

Realizations of Voltage Transfer Functions Using DVCCs

Maheshwari has proposed three differential-voltage current-conveyor configurations for realizing first order all-pass filters only. This paper has exploited these configurations for realizing more complex transfer function T(s) which yield poles and zeros of 1 - T(s) in one of the four admissible patterns. Bilinear and biquadratic functions are dealt in detail. It is shown that only bilinear functions can be realized with all the four passive elements grounded. First order all-pass function is a special case which needs only three elements (2R, 1C) or (1R, 2C). A biquadratic function requires (2R, 2C) elements and has all the capacitor grounded. Design of second order all-pass function is given.

Single DV-DXCCII Based Voltage Controlled First Order All-pass Filter with Inverting and Non-inverting responses

In this paper, a new voltage controlled first order all-pass filter is presented. The proposed circuit employs a single Differential Voltage Dual-X second generation Current Conveyor (DV-DXCCII), a NMOS (n-type Metal Oxide Semiconductor) transistor operated in the triode region as an active resistor and a grounded capacitor. The proposed all-pass filter provides both inverting and non inverting voltage-mode outputs simultaneously from the same configuration without any matching constraint. Non-ideal analysis along with sensitivity analysis is investigated. The proposed circuit has low active and passive sensitivities. The Monte Carlo analysis is also done for showing good sensitivity performances of the proposed circuit. In addition, to utilize the feature of cascadability, an application of higher order filter is also given. Moreover, the use of grounded capacitor makes the proposed circuit particularly attractive for Integrated Circuit (IC) implementation point of view. The theoretical results are validated through PSPICE simulations with TSMC 0.18 μm Complementary Metal Oxide Semiconductor (CMOS) process parameters.

Research on Discontinuous Pulse Width Modulation Algorithm for Single-phase Voltage Source Rectifier

Abstract - Single phase voltage source converter (VSC) is an important power electronic converter (PEC), including single-phase voltage source inverter (VSI), single-phase voltage source rectifier (VSR), single-phase active power filter (APF) and single-phase grid-connection inverter (GCI). As the fundamental part of large scale PECs, single-phase VSC has a wide range of applications. In the paper, as first, on the basis of the concept of the discontinuous pulse-width modulation (DPWM) for three-phase VSC, a new DPWM of single-phase VSR is presented by means of zero-sequence component injection. Then, the transformation from stationary frame (abc) to rotating frame (dq) is designed after reconstructing the other orthogonal current by means of one order all-pass filter. Finally, the presented DPWM based single-phase VSR is established analyzed and simulated by means of MATLAB/SIMULINK. In addition, the DPWMs presented by D. Grahame Holmes and Thomas Lipo are discussed and simulated in brief. Obviously, the presented DPWM can also be used for single-phase VSI, GCI and APF. The simulation results show the validation of the above modulation algorithm, and the DPWM based single-phase VSR has reduced power loss and increased efficiency.

All-Pass Filter-Based 2-D IIR Filter-Enhanced Beamformers for AESA Receivers

An active electronically scanned array (AESA) beamforming method that provides enhanced selectivity (interference rejection) for the same number of antennas compared to conventional delay-and-sum (DAS) beamforming is proposed. Conventional DAS 2-D transfer function is modified by introducing complex pole-manifolds based on recently proposed 2-D infinite impulse response (IIR) beam filters, at guaranteed stability. A continuous-time domain signal flow graph is proposed based on first order all-pass filters that eliminate the need of transmission line-based delays used in conventional DAS beamformers. Improved interference rejection is verified using closed-form signal processing models. For an array of 64 antennas, with desired signal direction of arrival (DOA) 10 ° and interference DOA -60° from array broadside, the proposed scheme shows an improvement in the signal-to-interference ratio (SIR) around 7 dB for the same number of antennas, compared to DAS beamforming. The improvement in interference rejection is observed for both uniform and non-uniform aperture weights in terms of side lobe performance. A feasibility study is presented on potential CMOS circuit implementation of the proposed AESA for a linear array of eight antennas and maximum operational frequency of 1 GHz.

A Voltage-Mode First Order Allpass Filter Based on VDTA

This article presents a new voltage-mode first order allpass filter (APF) employing voltage differencing transconductance amplifier (VDTA). The advantages of the circuit are that: the circuit description is very compact, consists of merely a VDTA and a capacitor: the phase shift can be electronically adjusted by current bias: it provides the lower THD of the output signal. Without any component matching conditions, the proposed circuit is very appropriate to further develop into an integrated circuit. Moreover, the proposed APF can provide the output current with high output impedance without modification of the circuit topology. The PSpice simulation results are depicted. The given results agree well with the theoretical anticipation. The maximum power consumption is 400µW at ±1.25V power supplies.

MMCC Based Electronically Tunable Allpass Filters Using Grounded Synthetic Inductor

New circuit implementations of electronically tunable first and second order allpass filter (AP) structures using a Multiplication Mode Current Conveyor (MMCC) building block are presented. The control voltage (V) of the MMCC tunes the desired phase (θ) while the time constant (τ) is adjustable by a Differential Voltage Current Conveyor Transconductance Amplifier (DVCCTA)-based synthetic lossless grounded inductor (L). The circuits are analyzed taking into account the device imperfections which show low active sensitivity features of the designs. The effects of port transfer error (ε) and that of the parasitic capacitances of the active devices had been meticulously examined which indicated that certain deviations in nominal design equations occur; these however, could be minimized with appropriate choice of the circuit passive components. Readily available AD-844 type Current Feedback Amplifier (CFA) elements are utilized for the topology implementation. Satisfactory test results on electronic θ-tunability, upto about 300 KHz, had been verified by PSPICE simulation and with hardware experimentation.

DIGITAL FILTER REALIZATION USING CURRENT CONVEYOR

By using the concept of current conveyor, new 1st order and 2nd order digital filter sections are developed. These are then used as building blocks in a cascade synthesis. The proposed synthesis yields digital Equivalent of 1st order all-pass filter and general 2nd order filter structure.

Bark Frequency Transform Using an Arbitrary Order Allpass Filter

We propose an arbitrary order stable allpass filter structure for frequency transformation from Hertz to Bark scale. According to the proposed filter structure, the first order allpass filter is causal, but the second and higher order allpass filters are non-causal. We find that the accuracy of the transformation significantly improves when a second or higher order allpass filter is designed compared to a first order allpass filter. We also find that the RMS error of the transformation monotonically decreases by increasing the order of the allpass filter.

Peak-to-Average Power Ratio Reduction in OFDM Systems Using All-Pass Filters

A low-complexity peak-to-average power ratio (PAPR) reduction scheme for orthogonal frequency division multiplexing (OFDM) systems is proposed. The proposed scheme produces OFDM sequences by rotating the symbol phase using multiple all-pass filters, whereas the phase rotation of conventional selected mapping (SLM) scheme is performed with multiple complex multiplication modules in conjunction with inverse fast Fourier transform (IFFT) modules. As such, the proposed scheme does not require multiple IFFT modules that incur a heavy computational burden. Analysis results show that the proposed PAPR reduction scheme can significantly decrease computational complexity over the SLM scheme, though the reduction is achieved at the cost of slightly worse PAPR reduction performance. As an instance, the proposed scheme with eight first order all-pass filters for 2048 subcarriers reduces the number of required multiplications by 69.2% and additions by 63.1% at a sacrifice of only 0.25 dB PAPR increase over the conventional SLM scheme with eight IFFT modules.

A novel square-root domain realization of first order all-pass filter

In this paper, a new square-root domain, first order, all-pass filter based on the MOSFET square law is presented. The proposed filter is designed by using nonlinear mapping on the state variables of a state space description of the transfer function. To the best knowledge of the authors, the filter is the first square-root domain first order all-pass structure designed by using state space synthesis method in the literature. The center frequency of the all-pass filter is not only attainable at megahertz frequencies but also tunable by an external bias current. The proposed filter operated 2.5 V supply voltage is constructed by current mirrors, geometric mean circuits, a linear transconductor circuit, and a capacitor. SPICE simulations are given to approve the theoretical analysis.

An Analytical Design Procedure For Bireciprocal Lattice Wave Digital Filters With Approximate Linear Phase

A simple analytic design procedure for bireciprocal lattice wave digital filters (bireciprocal LWDFs) is presented with approximate linear phase. The design is started by replacing the odd order all-pass filter branch in the bireciprocal LWDF with a pure delay, leaving the other branch as an all-pass even function of z -2. Analytic design procedure is then formulated. Several design examples using such procedure are given for verifications. Keywords: Bireciprocal LWDFs, All-pass sections, Half-band filters, Approximate linear phase.

A NEW CURRENT-MODE CURRENT-CONTROLLED ALL-PASS SECTION

This paper presents a new translinear-C current-mode first order all-pass filter suited for high frequency operation. The new circuit offers a simpler structure than the available translinear-C works. The pole-frequency of the circuit is controllable over a wide range through external bias current of CCCII and the circuit possesses low THD for a wide range of signal amplitudes. Extensive simulations are performed to verify the utility of the proposed circuit.

A new differential configuration suitable for realization of high CMRR, all-pass/notch filters

In this paper, a new configuration suitable for realization of differential input-differential output first order, second order all-pass and notch filters with high CMRR is given. The proposed configuration uses two negative type second-generation current conveyors (CCII-), and three admittances. Two first order and one second order all-pass filters and a notch filter (tunable if current controlled conveyor CCCII is used) are extracted from the proposed configuration. Tracking error, element mismatch, sensitivity analysis, simulation and experimental results are included.

Process Identification by Using a Limit Cycle Test with Fractional Harmonics

A limit cycle test is discussed from the viewpoint of the plant identification, and a practical identification method using the modified limit cycle test is proposed. The limit cycle test is a convenient way to estimate some information of the plant dynamics but only few characteristics are obtained by the conventional way. In this work, the limit cycle test is modified so that the manipulated variable and the process value may contain fractional harmonics, and the plant model is estimated with those fractional harmonic components as well as the basic components. The use of the fractional components enables us to identify the plant model accurately in a noise environment and to handle more sophisticated model: a second order lag plus all-pass filter type one. An experimental example of a thermal plant is illustrated to show the effectiveness of the proposed method where an LQI controller is designed with the identified model of the plant.

Generalization of a 3-D Acoustic Resonator Model for the Simulation of Spherical Enclosures

A rectangular enclosure has such an even distribution of resonances that it can be accurately and efficiently modelled using a feedback delay network. Conversely, a nonrectangular shape such as a sphere has a distribution of resonances that challenges the construction of an efficient model. This work proposes an extension of the already known feedback delay network structure to model the resonant properties of a sphere. A specific frequency distribution of resonances can be approximated, up to a certain frequency, by inserting an allpass filter of moderate order after each delay line of a feedback delay network. The structure used for rectangular boxes is therefore augmented with a set of allpass filters allowing parametric control over the enclosure size and the boundary properties. This work was motivated by informal listening tests which have shown that it is possible to identify a basic shape just from the distribution of its audible resonances.

Adaptation of an all-pass equalizer for decision feedback equalization

Recording channels using decision feedback equalization require a minimum phase response and white noise at the detector to achieve maximum signal-to-noise ratio. A low order all-pass filter can equalize the feedforward path so that it approximately achieves a minimum phase response. In this paper, we describe an adaptive algorithm for iteratively determining the optimal transfer function of the all-pass filter. Adaptation is based on estimating the gradient of the mean-square error with respect to the poles of the filter. This estimate is then used to update the positions of the poles. One simplifying feature of this technique is that these gradients are determined by applying the output of the all-pass to low-order finite impulse response (FIR) filters. We do not require values from the internal states of the filter. The proposed adaptation algorithm is characterized for first- and second-order all-pass filters over a range of storage densities. The optimality of the resulting equalizer is evaluated as a function of the order of the FLR filters used in estimating the gradients.

Stabilizing Rational Controllers for a Class of a Time-Delay Systems

The problem of stabilization of a linear system characterized by its rational transfer function, with an input time delay, by a rational controller, is considered. If the delay is not known at all (its interval is infinite), it is proved that the necessary and sufficient condition for the existence of a rational controller is stability of the open loop rational plant. Moreover, the existence of a rational stabilizing controller implies the existence of a constant gain stabilizing controller. If the delay is known to lie in a given finite interval, two non-existence theorems are derived, one for the constant gain stabilizing controller and one for any rational stabilizing controller. Design method based on first order all-pass filters cascaded by a constant gain is presented.

Design and analysis of bilinear digital ladder filters

Methods for designing bilinear switched-capacitor (SC) ladder filters are well known. However, they cannot be directly extended to digital filters because of the delay-free loops allowed in SC filters. In the present paper, design methods for low-sensitive bilinearly transformed voltage-current ladder filters are developed. The matrix approach for SC filter design is extended to digital filters, and the delay-free loops are eliminated. Design equations for general order low-pass, high-pass, bandpass, bandstop, and allpass filters are obtained in a simple closed form. The design procedure gives a canonical number of delays and a number of distinct multipliers equal to the number of reactive elements in the prototype. A number of test filters are analyzed with respect to magnitude sensitivity, magnitude response with respect to coefficient quantization, occurrence of limit cycles, stability, quantization noise levels, and structural complexity. The results are compared to wave digital filters (WDF), and cascade-form filters. It is found that bilinear digital ladder filters (BDLF) in most cases perform better than WDFs, while they at the same time have a simpler structure.