Optimum Barrier Thickness Research Articles

Modelling of cubic AlxGa1–xN/GaN resonant tunnel diode structures

AbstractThe current‐voltage characteristics of a cubic AlxGa1‐xN/GaN double‐barrier resonant tunnelling diode (DBRTD) have been calculated with the variation of band offset, well width, barrier composition and barrier thickness parameters. Using the ratio of the current magnitude at the resonant peak to the width of the resonance as a figure of merit for the device, the optimum barrier thickness for a given composition is determined. Finally, a promising cubic AlxGa1‐xN/GaN DBRTD structure with optimum parameters is proposed. (© 2010 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Optimum barrier thickness study for the InGaAs∕InAlAs∕AlAs heterostructure barrier varactor diodes

This experimental study aims at finding the optimum barrier thickness in heterostructure barrier varactor (HBV) diodes to improve the diode efficiency especially for high-power frequency multiplier applications. The influence of barrier thickness on the destructive current leaking over and through the barrier is investigated for different biases and operating temperatures. The authors found that for an InP-based HBV, there is an optimum barrier thickness range between 10to14nm which causes the lowest possible leakage current.

Electrodeposition of Ni–Fe–Co alloy nanowire in modified AAO template

Anodic aluminum oxide (AAO) was used as a template to prepare highly ordered Ni–Fe–Co alloy nanowire arrays. This membrane was fabricated with two-step anodizing method. It is found that there is an optimum barrier thickness to obtain a successful electrodeposition in pores of AAO. The thickness of barrier layer can be modified by additional electrochemical process after completing the anodizing step. Barrier layer thinning can create a rooted structure at the bottom side of the AAO pores and the electrodeposited nanowire arrays. The triple Ni–Fe–Co alloy was deposited in AAO membrane by ac voltage in a simple sulfate bath. The composition of nanowires shows anomalous deposition features between these ions. The difference of Ni 2+, Fe 2+ and Co 2+ ion's diffusion rate can cause composition difference between nanowires that are deposited in membranes with various pore depths and a composition gradient along a single nanowire.

Barrier layers for Cu ULSI metallization

Barrier layers are integral parts of many metal interconnect systems. In this paper we review the current status of barrier layers for copper metallization for ultra-large-scale-integration (ULSI) technology for integrated circuits (ICs) manufacturing. The role of barrier layers is reviewed and the criteria that determine the process window, i.e. the optimum barrier thickness and the deposition processes, for their manufacturing are discussed. Various deposition methods are presented: physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD), electroless deposition (ELD), and atomic layer CVD (ALCVD) for barrier layers implementation. The barrier integration methods and the interaction between the barrier and the copper metallization are presented and discussed. Finally, the common inspection and metrology for barrier layer are critically reviewed.

Progress on optimization of p-type GaAs/AlGaAs quantum well infrared photodetectors

We report the optimization of barrier thickness and well doping density for GaAs/AlGaAs p-type quantum well infrared photodetectors covering the 3–5 μm wavelength region. We investigated a series of samples with barrier widths varying from 10 to 50 nm and found that the optimum barrier thickness is about 20 nm. For devices operating at about 100 K, the optimum two-dimensional doping density is found to be in the range 1–2×1012 cm−2, which maximizes the background limited infrared performance temperature and dark current limited detectivity.