Optical Proximity Correction Methodology Research Articles

Process-Variation-Aware Rule-Based Optical Proximity Correction for Analog Layout Migration

Optical proximity correction (OPC) is invaluable to precise layout manufacturing in the advanced nanometer technologies. However, lack of research activity on OPC for analog integrated circuits has currently led to sole dependence on digital solutions. In this paper, we propose a rule-based OPC (RB-OPC) methodology with process variation (PV) consideration, which is integrated into an analog layout migration process. Based on the unique features of analog layouts, the accuracy limitation of RB-OPC is compensated by local wire widening and wire shifting operations during layout migration. Moreover, innovative PV-band shifting is deployed to preserve analog circuit performance against PV. According to our experimental results, the proposed analog layout migration with PV-aware RB-OPC can achieve much higher efficiency with an even lower mask complexity and an acceptable edge placement error compared to some well-known commercial and academic digital solutions. The circuit performance by using our proposed methodology is also better than that from alternative methods in the mismatch scenarios due to our special PV-band handling on transistor gates.

Errata: Non-delta-chrome optical proximity correction methodology for process models with three-dimensional mask effects

Errata: Non-delta-chrome optical proximity correction methodology for process models with three-dimensional mask effects

Non-delta-chrome optical proximity correction methodology for process models with three-dimensional mask effects

As integrated circuit design dimensions continue to shrink, previously ignored three-dimensional (3-D) mask effects have become significant for the accurate prediction and correction of proximity effects. Optical proximity correction (OPC) process models must consequently take into account 3-D mask effects. The state-of-the-art model-based OPC methodology, which is called delta-chrome OPC (DCOPC), needs the repeated computation of the mask perturbation to facilitate its convergence. The increasing complexity of OPC process models challenges this DCOPC methodology because each computation of the mask perturbation becomes prohibitively expensive. In this study, a new model-based OPC methodology, which is called non-delta-chrome OPC (non-DCOPC), is proposed without introducing any mask perturbations. It only requires image intensity information to achieve convergence using classical control techniques, and its effectiveness is demonstrated, showing that the run time with and without considering 3-D mask effects can be significantly improved. In addition, the correction accuracy of the DCOPC and non-DCOPC methodologies without considering 3-D mask effects is quite comparable. However, the correction accuracy considering 3-D mask effects can be slightly improved by the non-DCOPC methodology.

Performance-Based Optical Proximity Correction Methodology

The rapid reduction in critical dimension of integrated circuits has lead to substantial mask data expansion for mask design based on traditional model-based full-chip optical proximity correction (OPC). Conventional EPE-OPC is mainly based on edge placement error (EPE) without consideration of its effect on circuit performance; often resulting in an overcorrected OPC mask with little improvement in circuit performance at the expense of much higher cost. In this paper, a performance-based OPC (PB-OPC) methodology is proposed taking into account both performance and cost. A less complex mask is generated based on the performance matching criteria. The framework exploits the in situ estimated postlithography performance deviation error to drive the customized mask design algorithm. In particular, device PB-OPC (DPB-OPC) was deployed to systematically synthesize both polysilicon and diffusion masks by using mean drive current deviation as the controlled performance index. The proposed approach is validated via detailed simulation using 65-nm foundry libraries and IEEE International Symposium on Circuits and Systems 1985 (ISCAS'85) benchmark circuits. When compared to conventional performance-aware EPE-OPC approach, the proposed DPB-OPC achieved 34% average reduction in mask size and up to 13.5% reduction in mean drive current deviation within reasonable run time.

Study of the contour-based optical proximity correction methodology

As design rule continues to shrink, resolution enhancement techniques (RET) such as optical proximity correction (OPC) become more and more complex to enable design printability. As we know, typically integrated circuit (IC) layouts are simple shapes such as rectangles. However, high spatial frequency components of the mask spectrum that are not captured by the low-pass pupil result in a rounded image. In addition, the diffusion process in the postexposure bake (PEB) step makes the wafer rounding effects worse. This means that it is difficult to get the wafer image to match the design exactly at corners, even with the most aggressive OPC methodology. Therefore, pre-OPC site placement optimization is necessary to achieve high quality wafer images. In this work, a contour-based OPC methodology is proposed to minimize the time consumption in pre-OPC simulation site placement optimization and OPC job running. Rounded target contours that best describe the real intended wafer result are used as the target during OPC correction. By comparing classical OPC recipe-driven target point placement and contour-based OPC methodology, it is found that contour-based OPC methodology can achieve comparable image quality in a shorter turn around time (TAT) with fewer engineer resources.