Optical Content-addressable Memory Research Articles

An All-Optical Address Look-Up Table Using Optical CAM and Optical RAM Banks

We report for the first time, to the best of our knowledge, the experimental demonstration of a complete all-optical 2-bit Address Look-Up (AL) table that performs address matching and forwarding and operates at 10Gb/s. The circuit incorporates an optical Content Addressable Memory (CAM) and an optical Random Access Memory (RAM) table that are interconnected via an optical Encoding/Decoding circuit. The AL table has been experimentally validated for different sets of CAM and RAM word contents as well as for different CAM and RAM row interconnect settings at 10Gb/s, revealing a power penalty of around 9 dB at a bit-error-rate (BER) of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-9</sup> . Furthermore, we demonstrate experimental results of a fully integrated InP-based optical CAM cell, which includes an integrated XGM Flip-Flop (FF) memory cell and a Mach-Zehnder Interferometer (MZI) XNOR Access Gate (AG) and supports content addressing operation at 5 Gb/s. This fully-integrated optical CAM cell indicates a possible integration roadmap for the AL constituent building blocks towards the deployment of integrated optical ALs that can be utilized in optical routing or, more general, in optical content matching and forwarding operations.

Optical Content Addressable Memory Matchline for 2-bit Address Look-Up at 10 Gb/s

We demonstrate the first experimental evaluation of a 10Gb/s optical matchline (ML) memory architecture that designates successfully whether an incoming 2-bit optical address is identical to the optical address stored in an optical content addressable memory (CAM) line. The optical CAM line is formed by two optical CAM cells, with every cell comprising a monolithically integrated InP flip-flop and an SOA-MZI-based XOR gate, while the ML is completed by a subsequent wavelength multiplexing element and a semiconductor optical amplifier-cross gain modulation gate. Error-free operation at 10Gb/s has been obtained for 2-bit optical addresses and for both content addressing and write memory functionalities.

An Optical Content Addressable Memory Cell for Address Look-Up at 10 Gb/s

We propose and experimentally demonstrate the first all-optical content addressable memory (CAM) cell that comprises an all-optical monolithically integrated InP flip-flop and an optical XOR gate. The experimental results reveal error-free operation at 10 Gb/s for both content addressing and content writing operations. The potential of these memory architectures to allow for up to 40-Gb/s operation could presumably lead to fast CAM-based routing applications by enabling all-optical address look-up schemes.

Optoelectronic symbolic substitution based canonical modified signed-digit arithmetic

A single-step optoelectronics symbolic substitution scheme to handle parallel modified signed-digit (MSD) arithmetic operations is proposed. Conversion algorithms from MSD numbers into a canonical MSD representation are provided. The canonical MSD numbers have the property that no two consecutive digits are non-zero. The addition operation of two CMSD numbers is performed in one step. It will be shown that through the use of CMSD representation, the number of symbolic substitution rules in an optical content-addressable memory (CAM) based system is significantly reduced. The number of symbolic substitution rules can be further reduced to an optimum value through a proposed shared content-addressable memory optical set-up. Further, the proposed optical scheme doubles the storage efficiency of the shared content-addressable memory.

Fast optical binary multiplication using a sign/logarithm number system

A new fast binary multiplication scheme based on a nonholographic optical content-addressable memory (CAM) is presented. By using a sign/logarithm number (SLN) system, the multiplication operation is performed through a binary logarithmic addition. A three-stage CAM-based multiplication scheme is proposed in which the first CAM converts input binary numbers to SLN's, the second CAM performs a fixed-point binary addition, and the third CAM converts this SLN result back to the binary number system. The design and experimental demonstration of a 7-bit nonholographic optoelectronic CAM-based multiplier are presented.

Image enhancement using optical symbolic substitution

Rotation-invariant image sharpening schemes based on Roberts operators, difference operators, Laplacian, and high-frequency emphasis are realized using optical symbolic substitution. Symbolic systems based on both optical content-addressable memory and phase-only holograms are considered for these image enhancement schemes.

Modified-signed digit arithmetic using an efficient symbolic substitution

An efficient symbolic substitution scheme for modified-signed digit arithmetic operations is introduced. In this technique, an additional bit is used along with each pair of the input bits so that the nth additional bit is a characteristic of the (n - 1)th pair of input bits. The truth table minimization thereby shows that relatively fewer minterms are to be included in the corresponding optical content-addressable memory.

Truth-table look-up parallel data processing using an optical content-addressable memory

The extension of truth-table look-up processing beyond primitive operations (such as addition) to higher-level operations (such as discrete matched filtering) is presented. Use of the residue system and logical minimization techniques to reduce the required number of reference patterns stored in a content-addressable memory is illustrated for 16-bit full-precision addition. Multilevel coding of the numbers is introduced as a method to achieve further truth-table reduction. The required number of reference patterns for implementing the residue addition and multiplication operations are provided for all moduli from 2 through 32 with 2-, 3-, and 5-level coding. An optical holographic implementation of a system that processes multilevel coded numbers is presented.