Optical Beam Induced Resistance Change Research Articles

Mapping and statistical analysis of filaments locations in amorphous HfO2 ReRAM cells

Two optical inspection techniques, Photon Emission Microscopy (PEM) and Optical Beam Induced Resistance Change (OBIRCH) laser stimulation, are used to study the forming and to map the locations of filaments in amorphous HfO2 Resistive Random-Access Memory (ReRAM) cells. The low voltage sensitivity of OBIRCH is used to investigate filament pre-forming while the high frame rate of a Silicon Intensified Charge-Coupled Device (SI-CCD) is used to dynamically study the filament after the initial forming. A Spatial Clustering Model (SCM) is developed to explain the non-Poisson spatial distribution of individual filaments measured from multiple cells of the same size.

Inkjet-printed electrical interconnects for high resolution integrated circuit diagnostics

As semiconductors continue to shrink in size and become more three-dimensional in shape, the size of defects that can induce a failure also reduces, pushing the need for better fault isolation. The resolving capability of microscopes used in failure analysis (FA) is frequently limited by how close the microscope can be brought to the circuit under test. Accessibility is often restricted by the presence of probe needles or wire bonds that are needed to power up the device during the measurement. Here, I describe a robust, rapid and cost-effective method to overcome the contacting bottleneck by re-routing the probe pads with a low-profile redistribution layer, realized by conductive inkjet printing. I demonstrate that the method enables analytical FA with high spatial resolution on a backside power delivery network structure in combination with the optical beam induced resistance change (OBIRCH) technique. Electrical and structural characterization of the printing process are also reported.

Impact of Negative Gate Bias and Inductive Load on the Single-Pulse Avalanche Capability of 1200-V SiC Trench MOSFETs

In this study, the single-pulse avalanche capability of two types of 1.2-kV silicon carbide (SiC) trench MOSFETs was investigated through unclamped inductive switching (UIS) testing and numerical TCAD simulation. It was found that the UIS failure mechanisms differed in the two MOSFETs. In the asymmetric trench MOSFET, the failure was caused by high temperature, which can damage the SiC layer during the UIS transient, whereas in the double-trench MOSFET, the failure was caused by a high electric field concentration at the trench gate bottom oxide, and the physical damage was confirmed by optical beam induced resistance change (OBIRCH) and scanning electron microscopy (SEM) cross-sectional analysis. In addition, the UIS-based local damage phenomenon was investigated with varying inductance. Nonuniform contact resistance may have been a cause of the avalanche current concentration.

Reliability and failure analysis in power GaN-HEMTs during S-band pulsed-RF operating

This paper reports a reliability study on two technologies of AlGaN/GaN high-electron mobility transistors (AlGaN/GaN HEMTs) (Device “A” and Device “B”). A failure analysis study is conducted on devices stressed under real operating conditions for radar applications. The devices underwent pulsed-RF long ageing tests and after 11,000 h show a degradation in RF and DC performances (Drop of drain current and RF output power, pinch-off shift, decrease of the maximum of transconductance, lateral translation of transconductance, and increase of gate-lag and drain-lag). Hot electron effects are supposed to be the origin of the observed degradations and trapping phenomena within the passivation or GaN layers. Photon emission microscopy (PEM), Optical Beam Induced Resistance Change (OBIRCH), Electron Beam Induced Current (EBIC) measurements concur with this hypothesis. The three techniques reveal a non-uniform response and an inhomogeneous distribution along the gate fingers, in addition to the presence of some localized spots localized on the gate edge either on the drain side or on the source side. Spectral PEM analysis of these spots identifies a native defect that could be related to crystallographic defects such as dislocations or impurities. Atom probe tomography (APT) analysis on the two technologies of AlGaN/GaN HEMTs supports this hypothesis. APT results show the presence of some chemical impurities like carbon and oxygen. These impurities are in relatively significant concentrations in device “A” which could explain the high level of gate-lag and drain-lag in this device compared to device “B”.

Localization of Electrical Defects in Hybrid Bonding Interconnect Structures by Scanning Photocapacitance Microscopy

We report a scanning photocapacitance microscopy technique for the localization of open electrical defects in hybrid bonding wafer-to-wafer (W2W) interconnect structures for 3-D system integration. Whereas the well-known optical beam induced resistance change (OBIRCH) method is effective for the localization of resistive opens and shorts, it cannot be applied on full electrical opens. Our approach uses a focused laser beam to stimulate the photocapacitance of the W2W interconnect, and by measuring its response, we can verify the electrical continuity of the structure. We show how illuminating the interconnects with the light of a suitable wavelength leads to an increase of the depletion capacitance due to carrier generation in the silicon substrate. Our measurement instrument uses a commercially available sigma-delta ( $\Sigma -\Delta$ ) capacitance-to-digital converter (CDC) chip with a capacitance sensing resolution down to 4 aF. We demonstrate this methodology on large open-failed W2W interconnect chains with sub-micrometer hybrid-bonded interconnect pad dimensions and confirm our results by optical and transmission electron microscopy (TEM).

Preliminary Study on the Model of Thermal Laser Stimulation for Defect Localization in Integrated Circuits

Thermal Laser Stimulation (TLS) is an efficient technology for integrated circuit defect localization in Failure Analysis (FA) laboratories. It contains Optical Beam-Induced Resistance Change (OBIRCH), Thermally-Induced Voltage Alteration (TIVA), and Seebeck Effect Imaging (SEI). These techniques respectively use the principle of laser-induced resistance change and the Seebeck effect. In this paper, a comprehensive model of TLS technology is proposed. Firstly, the model presents an analytical expression of the temperature variation in Integrated Circuits (IC) after laser irradiation, which quantificationally shows the positive correlation with laser power and the negative correlation with scanning velocity. Secondly, the model describes the opposite influence of laser-induced resistance change and the Seebeck effect in the device. Finally, the relationship between the current variation measured in the experiment and other parameters, especially the voltage bias, is well explained by the model. The comprehensive model provides theoretical guidance for the efficient and accurate defect localization of TLS technology.

Peculiar failure mechanisms in GaN power transistors

Commercial GaN power amplifiers for RF applications, made of a pair of discrete transistors for operation in Doherty configuration, failed during the HAST tests. Failure Analysis pointed out a layout-specific issue related to thermal expansion at the level of the field plates. Anyway, the search for initial degradation stages using Optical Beam Induced Resistance Change and Photon Emission Microscopy revealed a subtle second mechanism, involving Ga interdiffusion into the gate metal lines, coming from hollow pipes in GaN. Both mechanisms are discussed.

Failure Analysis of Faulty vias or Contacts in Mixed-Signal Integrated Circuits

Faulty vias or contacts could be the main cause of failure for an integrated circuit (IC). Unlike a digital IC, the faulty vias or contacts in an analog or a mixed-signal IC are usually more difficult to identify because of the more complicated circuit structure, the more different devices involved, and larger range of signal levels presented in different parts of the circuit. A quick and accurate localization method will have high technical value for failure analysis (FA) and process improvement. In this paper, we proposed a new method to give a quick localization of faulty vias or contacts for analog and mixed-signal ICs. We combine several FA techniques including photon emission microscopy, microprobing, and lock-in infrared optical beam-induced resistance change analysis in conjunction with the circuit schematic and layout. We demonstrated with several examples that the developed approach can identify the faulty vias or contacts accurately and this method should be useful for the IC designer and process engineer to identify the root causes of IC failure related to faulty vias and contacts.

Non-invasive soft breakdown localisation in low k dielectrics using photon emission microscopy and thermal laser stimulation

For the first time a non-invasive localisation of a soft breakdown (SBD) is shown. The localisation is completed on fully functional back end of line (BEOL) test structures. The test structures used, provided by the interuniversity microelectronics centre (imec), are metal insulator semiconductor (MIS) structures. The low k dielectric within the test structures is SiOCH type with OSG 2.0 (k = 2.0), 45% porosity and 40 nm thickness. Contacless faul isolation methods have been evaluated for detecting a SBD on these structures.We evaluated photon emission microscopy (PEM) with two different signal detectors, the Si – CCD and the InGaAs camera.A proof of concept for detecting a SBD with themal laser stimulation (TLS) is presented.Using a Si – CCD and up to 2000 s integration time, photon emission (PE) signals from a 2 μm × 2 μm test structure with a leakage current less than 1 nA are presented.With the InGaAs detector a localised SBD from a 2 μm × 2 μm test structure with a leakage current of 100 pA is shown.The detected SBDs have a resistance of 33 GΩ and 260 GΩ respectively thus the level of degradation is several orders of magnitude lower compared to a hard breakdown (HBD). Up to now it was only possible to localise defects at higher levels of degradation. Due to the high energy at these levels, original defect signatures for SBD are usually destroyed. To better control the process of degradation, a way to nearly freeze the degradation process is shown. This method was used to detect a 1 nA leakage current of a 2 μm × 2 μm structure with a resistance of 35 GΩ using optical beam induced resistance change (OBIRCH) which is a similar contactless fault isolation (CFI) method to TLS. The presented SBD localisations allow to plan accurate physical preparations for the first time.Physical analysis of PEM localised SBD and HBD have been performed and compared.Possibilities to further improve the presented SBD detection levels are discussed for OBIRCH. Limitations for PEM with Si – CCD and InGaAs detectors as a CFI for SBDs are discussed.

Progressive current degradation and breakdown behavior in GaN LEDs under high reverse bias stress**Project supported by the National Natural Science Foundation of China (Grant Nos. 61504050 and 11604124), the Natural Science Foundation of Jiangsu Province, China (Grant Nos. BK20140168 and BK20150158), and the Fundamental Research Funds for the Central Universities, China (Grant Nos. JUSRP51628B and JUSRP51510).

The progressive current degradation and breakdown behaviors of GaN-based light emitting diodes under high reverse-bias stress are studied by combining the electrical, optical, and surface morphology characterizations. The current features a typical “soft breakdown” behavior, which is linearly correlated to an increase of the accumulative number of electroluminescence spots. The time-to-failure for each failure site approximately obeys a Weibull distribution with slopes of about 0.67 and 4.09 at the infant and wear-out periods, respectively. After breakdown, visible craters can be observed at the device surface as a result of transient electrostatic discharge. By performing focused ion beam cuts coupled with scan electron microscope, we observed a local current shunt path in the surface layer, caused by the rapid microstructure deterioration due to significant current heating effect, consistent well with the optical beam induced resistance change observations.

Nondestructive fault localization of IC interconnection by using ultrasonic heating

A nondestructive method of ultrasonic fault localization of IC interconnection without mold decapsulation was proposed instead of the optical-beam-induced resistance change (OBIRCH) method. The signal principle of the proposed method is based on the resistance change induced by local ultrasonic heating. To investigate the principle, numerical analysis constructed by sound and temperature field simulations is carried out and its results were compared with experimental results. The sound field is calculated by Fourier analysis. The temperature field is discretized using an equivalent thermal network circuit. Numerical simulation results show a good agreement with experimental results, suggesting that the signal in the proposed method was induced by ultrasonic heating. Moreover, ultrasonic heating induced the signal of the proposed method in a sample covered with commercially available resin including fillers (average diameter: 16 µm), and electro-static discharge (ESD) damage was localized by ultrasonic heating without mold decapsulation. These results suggest that the signal induced by ultrasonic stimulation is detectable and available for use in analysis.

On the Origin of the Gate Oxide Failure Evaluated by Raman Spectroscopy

1. Background and purpose In the miniaturization of the large-scale integrated-circuit (LSI), gate oxide thinning is one of the most important techniques for the performance improvement. However, the ultimately thinned gate oxide causes in the failure with high leakage current. Thus, the evaluation and control of the gate oxide integrity is indispensable in the present LSI technology. In this study, we evaluated the origin of the gate oxide failure by Raman spectroscopy in conjunction with optical beam induced resistance change (OBIRCH) analysis. 2. Experiments Metal-oxide-semiconductor (MOS) capacitors were used as the samples. The 2.8 nm thick gate oxinitrid insulator film and the poly-Si gate electrode layer were formed on a P type Si substrate. The poly-Si layer was deposited at 620 oC with the SiH4 flow rate of 150 or 350 sccm. The gate oxide integrity was evaluated by the test element group (TEG) measurements. The failure was observed only for the 150 sccm SiH4 flow. The current-voltage (I-V) characteristics were shown in Fig. 1. The positions with high leakage current were specified by OBIRCH, and evaluated by Raman spectroscopy. One-dimensional measurements were performed for the Raman spectroscopy by using a quasi-line excitation source at the same time. Excitation laser was Nd:YAG laser (wavelength: 532 nm), and the focal length of the spectrometer was 2,000 mm. The length of the quasi-line laser was approximately 100 μm. We investigated the origin of the gate oxide failure by Raman Spectroscopy obtained at the leakage position determined by OBIRCH. 3. Result s and Discussion Figure 2 shows the light emission image obtained by OBIRCH at the MOS capacitor with gate oxide failure fabricated with 150 sccm SiH4 flow. We confirmed that there are two defect points in the MOS capacitor. Figure 3 shows the Raman intensity distribution across the leakage position in the sample. The higher Raman intensity than the surroundings was confirmed at the failure position. Figure 4 shows the distribution of the Raman shift and the full width at half maximum (FWHM) across the failure position. As shown in Fig. 4, we verified that the Raman peaks at the defect positions shifted toward the lower wave number compared with the other positions. It can be considered that the gate oxide failure was induced by the high tensile strain in the poly-Si layer, probably due to the lack of the SiH4 supply during the deposition. Furthermore, FWHM of Raman spectra were not different comparing with the other position. Thus, there is no difference in the crystallinity and the grain size of the poly-Si. In conclusion, we have evaluated the gate oxide failure with leakage current by Raman spectroscopy and found that the origin was high tensile strain in the gate poly-Si.

On the Origin of the Gate Oxide Failure Evaluated by Raman Spectroscopy

The metal-oxide-semiconductor-field-effect-transistor (MOSFET) has been miniaturized for the high performance large-scale integrated-circuit (LSI). However, in the ultimately miniaturized MOSFET, the gate oxide failure with high leakage current is inevitable. In this study, we evaluated the origin of the gate oxide failure by Raman spectroscopy in conjunction with optical beam induced resistance change (OBIRCH) analysis. MOS capacitors were used as the samples. The 2.8 nm thick gate oxinitrid insulator film and the poly-Si gate electrode layer were formed on a P type Si substrate. The cobalt (Co) silicide film was formed on the poly-Si electrode. The SiH4 flow rate was 150 sccm or 350 sccm. The gate oxide integrity was evaluated by the test element group (TEG) measurements. As a result, Raman intensity increased at the failure position compared with the other positions in the sample deposited with 150 sccm of SiH4 flow rate. We consider that higher Raman intensity at the gate oxide failure positions reflects the irregular structure of poly-Si. Furthermore, the Raman peaks at failure positions shifted toward the lower wavenumber while the FWHMs are approximately constant with other positions. Thus, we found that there is no difference in the crystallinity of the poly-Si. The origin of the gate oxide failure was high tensile strain in the gate poly-Si electrode. In conclusion, we have successfully evaluated the gate oxide failure by Raman spectroscopy with a quasi-line excitation source.

Wafer damage issue study by heavy Al wire wedge bonding

Purpose – The purpose of this paper was to attempt to confirm the root cause of wafer damage issue by heavy Al wire wedge bonding and propose some permanent solutions for it. Design/methodology/approach – The infra red–optical beam-induced resistance change (IR-OBIRCH) analysis defines the position of an abnormal hotspot. A cross section and an scanning electron microscope (SEM) confirmed the wafer damage issue and its position. Based on the position of wafer damage, the wedge tool with different life and Al buildup was checked found to be on the wedge tool. Finite element analysis (FEA) modeling analysis and simulation experiment guarantee the Al buildup, and low wedge deformation thickness (WDT) can cause the wafer damage issue. Finally, design of experiment (DOE) experiments are designed to optimize wedge tool dimension and wedge-bond parameters to eliminate wafer damage issue. Findings – Wafer damage issue caused the Vpwr-OUTPUT leakage issue by IR-OBIRCH analysis. Al buildup was found on wedge tool with different life and its size gets larger along with the increase in wedge tool life. Low WDT and bigger Al buildup can cause the wafer damage. Designing new wedge tool and parameters optimization can increase WDT. Research limitations/implications – Because of the limitation of time and resources, finite element method (FEM) modeling and wedge tool dimension could not be studied more deeply. Originality/value – This paper sets an example on how to find out the root cause of wafer damage by a step-by-step analysis and put forward a quick solution accordingly for the issue.

Case studies of defect localization based on software-based fault diagnosis in comparison with PEMS/OBIRCH analysis

This study verifies the accuracy of failure localization by a software-based fault diagnosis technique through comparison of the failure localization by photo emission microscope (PEMS) analysis and optical beam induced resistance change (OBIRCH) analysis. To evaluate, the software-based fault diagnosis technique was applied to 14 samples of 0.18μm-process-node products that failed mainly due to the metal line shorts. We found that this technique was able to accurately localize the failure with a high probability (85.7%). One reason, the diagnosis returned inaccurate results is the influence of the metal line short expanding to several nets in the device simultaneously due to shorts of upper and lower metal lines. The other reason is that the fail log of the failed device itself was inaccurate due to (1) the resistance value at the short point, (2) the driving force of the cells related by the shorted points, and (3) the transition timing. We determined from our study that the rank of score calculation depends more on the mismatch rate of pass patterns than on the match rate of fail patterns. When the mismatch rate of pass patterns is less than 0.04 and the score is more than 70, the software-based fault diagnosis result is reliable. Although software-based fault diagnosis is a powerful tool for failure localization, it is necessary to combine it with hardware techniques such as PEMS analysis and OBIRCH analysis to maintain the accuracy of failure localization.

Nanostructural defects evidenced in failing silicon-based NMOS capacitors by advanced failure analysis techniques

STMicroelectronics, Avenue C´elestin Coq, 13106 Rousset, FranceReceived: 25 August 2013 / Received in final form: 11 February 2014 / Accepted: 6 March 2014Published online: 21 April 2014 – ⃝c EDP Sciences 2014Abstract. An experimental methodology compliant with industrial constraints was deployed to uncover theorigin of soft breakdown events in large planar silicon-based NMOS capacitors. Complementary advancedfailure analysis techniques were advantageously employed to localize, isolate and observe structural defectsat nanoscale. After an accurate localization of the failing area by optical beam-induced resistance change(OBIRCH), focused ion beam (FIB) technique enabled preparing thin specimens adequate for transmissionelectron microscopy (TEM). Characterization of the gate oxide microstructure was performed by high-resolution TEM imaging and energy-filtered spectroscopy. A dedicated experimental protocol relying oniterative FIB thinning and TEM observation enabled improving the quality of electron imaging of defectsat atom scale. In that way, the gate oxide integrity was evaluated and an electrical stress-induced siliconepitaxy was detected concomitantly to soft breakdown events appearing during constant voltage stress.The growth of silicon hillocks enables consuming a part of the breakdown energy and may prevent the softbreakdown event to evolve towards a hard breakdown that is catastrophic for device functionality.

A dynamic synchronization method to realize soft defect localization applied on digital and mixed-mode analog ICs in failure analysis

Failure analysis on advanced logic and mixed-mode analog ICs more and more has to deal with so called ‘soft defects’. In this paper, a dynamic synchronization method is proposed to perform soft defect localization (SDL) technique by Optical Beam Induced Resistance Change (OBIRCH). It is a new and low-cost way to achieve SDL technique by OBIRCH equipment if there is no normal SDL equipment on hand. It extends the application of OBIRCH equipment to a more advanced failure analysis realm. The methodology and system configuration are presented. The experimental results show this dynamic synchronization method is accurate enough to locate a soft defect. Two real cases are studied on a digital IC and a mixed-mode analog IC respectively using this method.

Application of PEM and OBIRCH to Defect Localization of Integrated Circuits

With the increasing integration and complexity of microelectronic devices, fault isolation has been challenged. Photon Emission Microscopy (PEM) and Optical Beam Induced Resistance Change (OBIRCH) are effective tools for defect localization and fault characterization in failure analysis. In this paper, the principles and different application condition of PEM and OBIRCH are discussed. PEM is very helpful for locating defects emitting photon, but can not detect the defects which have no photon emitting, such as shorted metal interconnects; OBIRCH as a complementary, has a high success rate for locating resistance defects. Two cases with failure mechanisms illuminated are presented to show the different application of PEM and OBIRCH.

Robustness of 4H-SiC 1200V Schottky diodes under high electrostatic discharge like human body model stresses: An in-depth failure analysis

Abstract The aim of this study is to propose a complete failure analysis of silicon carbide (SiC) junction barrier Schottky (JBS) diodes under high electrostatic discharge (ESD) human body model (HBM)-like stresses addressing the limit of robustness for this new generation of high power devices. The Physics of Failure is fully investigated, first by analyzing electrical measurements which are relevant to physical integrity and interface states using parameters predicted by thermionic emission (TE) theory. Secondly Optical Beam Induced Resistance CHange (OBIRCH) is used for the localization of surface defects. Finally, Focused Ion Beam (FIB) cuts are performed and Transmission Electron Microscopy (TEM) analyses are carried out to characterize the structural and elemental composition modifications. With the results, correlations can be made between electrical and physical degradations, leading to reliable hypotheses about the root cause of the weaknesses of these devices when subjected to this kind of stress.

Evidence of relationship between mechanical stress and leakage current in AlGaN/GaN transistor after storage test

In this paper, leakage current signatures in AlGaN HEMT are studied after storage at 300°C. Electrical characterization of the gate to source diode as a function of the temperature has been performed on HEMT with two different gate pad topologies, but it has not allowed identifying significant difference in the electron transport mechanisms. In forward and low reverse bias, the preeminent conduction mechanism can be attributed to thermionic field emission (TFE). By localized FIB cuts, Optical Beam Induced Resistance Change (OBIRCh) analysis was used to localize current path. Results tend to indicate that mechanical stresses in the gate structure strongly influences the leakage current of the transistor. The OBIRCh analysis technique, widely used in silicon technology, appears to be a very efficient tool to localize leakage paths, in particular for HEMT topology with source terminated field plate.