Operational Latency Research Articles

Digital twin empowered lightweight and efficient blockchain for dynamic internet of vehicles

The Internet of Vehicles (IoV) has great potential for Intelligent Transportation Systems (ITS), enabling interactive vehicle applications, such as advanced driving and infotainment. It is crucial to ensure the reliability during the vehicle-to-vehicle interaction process. Although the emerging blockchainhas superiority in handling security-related issues, existing blockchain-based schemes show weakness in highly dynamic IoV. Both the transaction broadcast and consensus process require multiple rounds of communication throughout the whole network, while the high relative speed between vehicles and dynamic topology resulting in the intermittent connections will degrade the efficiency of blockchain. In this paper, we propose a Digital Twin (DT)-enabled blockchain framework for dynamic IoV, which aims to reduce both the communication cost and the operational latency of blockchain. To address the dynamic context, we propose a DT construction strategy that jointly considers the DT migration and blockchain computing consumption. Moreover, a communication-efficient Local Perceptual Multi-Agent Deep Deterministic Policy Gradient (LPMA-DDPG) algorithm is designed to execute the DT construction strategy among edge servers in a decentralized manner. The simulation results show that the proposed framework can greatly reduce the communication cost, while achieving good security performance. The dynamic DT construction strategy shows superiority in operation latency compared with benchmark strategies. The decentralized LPMA-DDPG algorithm is helpful for implementing the optimal DT construction strategy in practical ITS.

Edge-Node-Aware Adaptive Data Processing Framework for Smart Grid

Smart grid is an autonomous power generation and production system, that includes various energy management sub-systems such as energy efficient resources, smart appliances, renewable energy resources and smart meters. It is a sensory-based power network that adopts digital technology to supply electricity to consumers and industries. Recently, it is observed that the grid infrastructure is rapidly transforming network topology towards green and eco-friendly computing. For this, edge-computing environment is being adopted to inter-connect distributed IoT nodes in peer-to-peer sequential order. With this approach, the grid ideally cope to green computing issues than traditional infrastructure, however, it faces certain data processing problems such as differentiating IoT and non-IoT data segments, storing data chunk with end of file (EOF) assurance, management of replica data segments and systematic analytics of edge node datasets. This produces operational latency at edges as well as onto segment reservoir and results delay in exchanging data segments at smart grid. This paper presents an Edge-node-aware framework that empowers nodes to intelligently process IoT and counterpart data segments, a portable plugin to identify EOF data chunk, reliable replica management system and hassle-free dataset analytics. The simulation results show that the proposed framework effectively manage data segments and store into smart grid reservoir.

Towards design and automation of a scalable split-radix FFT processor for high throughput applications

Fast Fourier Transform (FFT) is a rudimentary operation in signal processing. Modern high speed signal processing and communications standards, such as 4G LTE, 5G, Internet of Things (IoT), etc., necessitate a high throughput implementation of FFT. Moreover the FFT resolution required in aforementioned standards tends to vary with the operation mode. It is, therefore, highly desirable to have a FFT implementation that not only meets the high throughput demand but is also scalable to cater any selectable N-point FFT resolution. In this paper, our contribution is two-fold. First, we have analyzed in details the operational latency and mathematical consistency of our proposed split-radix 4/8 FFT algorithm which is comparable in latency with radix-8 algorithm but is considerably less complex for large-size FFTs. Second, we have developed a JAVA-based automation tool that generates high level implementation details and VHDL descriptions of an adaptive N-point split-radix 4/8 FFT processor. The resulting design can then be rapidly prototyped and synthesized on different hardware platforms like Field Programmable Gate Arrays (FPGAs) and Application Specific Integrated Circuits (ASICs). Experimental results show that our proposed auto-generated modular design is comparable in resource usage with the hand-crafted fixed-size designs reported in the literature while providing considerable reduction in design effort and time.

An Aggregate MapReduce Data Block Placement Strategy for Wireless IoT Edge Nodes in Smart Grid

Big data analytics has simplified processing complexity of large dataset in a distributed environment. Many state-of-the-art platforms i.e. smart grid has adopted the processing structure of big data and manages a large volume of data through MapReduce paradigm at distribution ends. Thus, whenever a wireless IoT edge node bundles a sensor dataset into storage media, MapReduce agent performs analytics and generates output into the grid repository. This practice has efficiently reduced the consumption of resources in such a giant network and strengthens other components of the smart grid to perform data analytics through aggregate programming. However, it consumes an operational latency of accessing large dataset from a central repository. As we know that, smart grid processes I/O operations of multi-homing networks, therefore, it accesses large datasets for processing MapReduce jobs at wireless IoT edge nodes. As a result, aggregate MapReduce at wireless IoT edge node produces a network congestion and operational latency problem. To overcome this issue, we propose Wireless IoT Edge-enabled Block Replica Strategy (WIEBRS), that stores in-place, partition-based and multi-homing block replica to respective edge nodes. This reduces the delay latency of accessing datasets for aggregate MapReduce and increases the performance of the job in the smart grid. The simulation results show that WIEBRS effective decreases operational latency with an increment of aggregate MapReduce job performance in the smart grid.

An Intelligent Security Approach using Game Theory to Detect DoS Attacks In IoT

The Internet of Things (IoT) is a new concept in the world of Information and Communication Technology (ICT). The structure of this global network is highly interconnected and presents a new category of challenges from the security, trust, and privacy perspectives. The data transfer problems through the Denial-of-Service (DoS) attacks simply occur in this network and lead to service slow down or system crash. At the present time, traditional techniques are being widely used to confront the denial-of-service attacks in the Internet of Things and unfortunately, smart techniques have been less studied and exploited. In this research, a security solution on the basis of game theory is proposed to detect the denial-of-service attacks and prevent the problems in the services of the network of the Internet of Things. In order to scrutinize the performance of the suggested method in the network, this method was simulated using the NS2 simulator. The simulation results confirmed that the game-theory strategies in the proposed method outperformed the existing methods. Furthermore, in order to verify the acquired findings, a comparative evaluation was exhibited according to the three factors of operational throughput, latency, and energy consumption.

Analysis of an application delivery platform for software defined infrastructures

Application service providers ASPs obtaining resources from multiple clouds have to contend with different management and control platforms employed by the cloud service providers CSPs and network service providers NSPs. Distributing applications on multiple clouds has a number of benefits, but absence of a common multi-cloud management platform that would allow ASPs dynamic and real time control over resources across multiple clouds and interconnecting networks makes this task arduous. Open application delivery network OpenADN, a multi-cloud management and control platform, fills this gap. However, performance issues of such a complex, distributed and multi-threaded platform, not tackled appropriately, may neutralise some of the gains accruable to the ASPs. In this paper, we establish the need for and methods of collecting precise and fine-grained behavioural data of OpenADN like platforms that can be used to optimise their behaviour to control operational cost, performance e.g., latency and energy consumption.

Challenges to using decentralized spatial algorithms in the field

Over recent years considerable research effort has focused on developing decentralized algorithms for highly distributed computing environments, such as wireless geosensor networks. There are several putative advantages of decentralization, including scalability, energy efficiency, and operational latency. However, decentralized algorithms today are primarily found in simulations and lab-based deployments, but rarely if ever in the field in true deployments. In this paper, we review the principles of and drivers behind decentralization. We then contrast these drivers with a recent field deployment of a large wireless geosensor network for monitoring environmental conditions relevant to wildfire hazard, called RISERnet. The comparison highlights the key areas of difference, where current technology and applications of wireless geosensor networks are not yet able to take advantage of decentralization.

Efficient, Decentralized Detection of Qualitative Spatial Events in a Dynamic Scalar Field.

This paper describes an efficient, decentralized algorithm to monitor qualitative spatial events in a dynamic scalar field. The events of interest involve changes to the critical points (i.e., peak, pits and passes) and edges of the surface network derived from the field. Four fundamental types of event (appearance, disappearance, movement and switch) are defined. Our algorithm is designed to rely purely on qualitative information about the neighborhoods of nodes in the sensor network and does not require information about nodes’ coordinate positions. Experimental investigations confirm that our algorithm is efficient, with overall communication complexity (where n is the number of nodes in the sensor network), an even load balance and low operational latency. The accuracy of event detection is comparable to established centralized algorithms for the identification of critical points of a surface network. Our algorithm is relevant to a broad range of environmental monitoring applications of sensor networks.

Color classification using margin-setting with ellipsoids

This paper presents a robust and computationally efficient genetic algorithm for color classification. It designs well-fitted color space prolate spheroids (ellipsoids) that envelop the training pixels. The ellipsoids are then used to classify unlabeled image pixels in accordance with their color, in order to partition the image. The color classification algorithm described here has very low error rates, boasts very high operational speed, and permits trading higher indecision rates for lower rates of misclassification. The performance of the color classifier developed in this paper is compared with those of the support vector machine (SVM) and the nearest-neighbor (kNN) classifiers. It has been shown that our color classifier outperforms SVM and kNN for partitioning of color images that contain several closely spaced color classes. It has higher correct classification, lower misclassification, and significantly reduced operational latency in comparison with color classifiers based on kNN and SVM.

Ocular herpes simplex virus type 1: is the cornea a reservoir for viral latency or a fast pit stop?

To present a review supporting and refuting evidence from mouse, rabbit, nonhuman primate, and human studies of herpes simplex virus type 1 (HSV-1) concerning corneal latency. More than 50 research articles on HSV-1 published in peer-reviewed journals were examined. Infectious HSV-1 has been found in mouse denervated tissues and in tissues with negative cultures from the corresponding ganglion. However, the different mouse strains have shown varied responses to different strains of HSV, making it difficult to relate such findings to humans. Rabbit studies provide excellent evidence for HSV-1 corneal latency including data on HSV-1 migration from the cornea into the corneoscleral rim and on the distribution of HSV-1 DNA in the cornea. However, the available methods for the detection of infectious HSV-1 may not be sensitive enough to detect low-level infection. Infectious HSV-1 has been successfully isolated from the tears of nonhuman primates in the absence of detectable corneal lesions. The recurrence of corneal ulcers in nonhuman primates before the appearance of infectious HSV-1 in tears suggests that the origin of the HSV-1 is the cornea, rather than the trigeminal ganglion. Human studies presented evidence of both ganglion and corneal latency. Understanding HSV-1 disease progression and the possibility of corneal latency could lead to more effective treatments for herpetic keratitis. However, it is unlikely that operational latency in the cornea will be definitively proven unless a new method with higher sensitivity for the detection of infectious virus is developed.

Design of on-chip error correction systems for multilevel NOR and NAND flash memories

The design of on-chip error correction systems for multilevel code-storage NOR flash and data-storage NAND flash memories is concerned. The concept of trellis coded modulation (TCM) has been used to design on-chip error correction system for NOR flash. This is motivated by the non-trivial modulation process in multilevel memory storage and the effectiveness of TCM in integrating coding with modulation to provide better performance at relatively short block length. The effectiveness of TCM-based systems, in terms of error-correcting performance, coding redundancy, silicon cost and operational latency, has been successfully demonstrated. Meanwhile, the potential of using strong Bose–Chaudhiri–Hocquenghem (BCH) codes to improve multilevel data-storage NAND flash memory capacity is investigated. Current multilevel flash memories store 2 bits in each cell. Further storage capacity may be achieved by increasing the number of storage levels per cell, which nevertheless will correspondingly degrade the raw storage reliability. It is demonstrated that strong BCH codes can effectively enable the use of a larger number of storage levels per cell and hence improve the effective NAND flash memory storage capacity up to 59.1% without degradation of cell programming time. Furthermore, a scheme to leverage strong BCH codes to improve memory defect tolerance at the cost of increased NAND flash cell programming time is proposed.

Superscalar instruction execution in the 21164 Alpha microprocessor

The 21164 is a new quad-issue, superscalar Alpha microprocessor that executes 1.2 billion instructions per second. The 300-MHz, 0.5-/spl mu/m CMOS chip delivers an estimated 345/505 SPECint32/SPECfp92 performance. The design's high clock rate, low operational latency, and high-throughput/nonblocking memory systems contribute to this performance. >