Operational Transconductance Amplifier Research Articles

Design and Characterization of a Digitally Tunable Gm-C Filter for Multi-Standard Receivers

This paper presents the design, simulation, prototyping, and measurement results of a digitally tunable fourth order Gm-C low-pass filter (LPF) for multi-standard radio receivers. The LPF cut-off frequency can be tunned by digitally selecting the transconductance of the basic reconfigurable operational transconductance amplifiers (OTAs) that compose the circuit. Four operation modes allow for control of the OTA transconductances and, consequently, the scaling of power consumption. The filter was designed and prototyped in a 1.8 V 180 nm CMOS process. The measurement results indicate that the configurability provides a cutoff frequency of 1.90/3.56/6.07/8.15 MHz with a power consumption ranging from 9.9 to 13.1 mW. The designed filter achieves an IIP3 of 8.17 dBm for a signal bandwidth of 8.15 MHz. The performance, in terms of power dissipation, noise, and cut-off frequency, is at the same order of magnitude compared to recent related works reported in the literature. The advantages are a compact area, small sensitivity to component mismatches, and low design complexity. The proposed filter presents electrical characteristics suitable for the application in radio receivers for multi-carrier WCDMA signals.

A novel resistorless memristor emulator circuit and its implementation of chaotic Jerk system

This work presents a novel resistorless memristor emulator circuit designed in both grounded and floating configurations. The grounded memristor consists of a Current-Controlled Current Conveyor Transconductance Amplifier (CC-CCTA) and a capacitor. On the other hand, a floating memristor includes a CC-CCTA and a capacitor, along with an additional Operational Transconductance Amplifier (OTA). These proposed emulators are electronically controllable owing to the internal structures of active elements. Theoretical analysis and simulation results have been obtained for the proposed designs. Simulation results have been conducted utilizing the LTspice program and TSMC 180 nm technology has been used for internal structures. In these results, the effects of the changing capacitor values, different frequencies, electronic tunability, reactions to temperature change, and pulse response have been investigated. Subsequently, a chaotic Jerk circuit has been implemented incorporating the proposed memristor emulator. The chaotic behavior of the floating memristor has been investigated using the LTspice simulation software.

16.2-μW Super Class-AB OTA with current-reuse technique achieving 130.3-μA/μA FoM

In this paper, a single-stage Super Class-AB operational transconductance amplifier (OTA) using current reuse technique is presented. It is based on two scaled current mirrors located at the tail current nodes of input pairs, reusing the current through the cross-coupled input pairs by a current gain factor of α, and delivering new currents to the output branch, enhancing the overall transconductance (Gm) by a factor of (1+α). With adaptive biasing and local common mode feedback (LCMFB), slew rate (SR), open loop gain (AOL) and gain-bandwidth product (GBW) are improved. An prototype has been designed in TSMC 0.18-μm CMOS process. Post-simulation shows the positive and negative slew rate of 22V/μs and −38.3V/μs, respectively, a GBW of 3.72 MHz, a DC gain of 65.6 dB with a phase margin of 69.2° for a capacitive load of 70 pF. The proposed OTA consumes a total power of 16.2 μW under a 1.8V supply voltage.

Design and Analysis of a High-Gain, Low-Noise, and Low-Power Analog Front End for Electrocardiogram Acquisition in 45 nm Technology Using gm/ID Method

In this work, an analog front-end (AFE) circuit for an electrocardiogram (ECG) detection system has been designed, implemented, and investigated in an industry-standard Cadence simulation framework using an advanced technology node of 45 nm. The AFE consists of an instrumentation amplifier, a Butterworth band-pass filter (with fifth-order low-pass and second-order high-pass sections), and a second-order notch filter—all are based on two-stage, Miller-compensated operational transconductance amplifiers (OTA). The OTAs have been designed employing the gm/ID methodology. Both the pre-layout and post-layout simulation are carried out. The layout consumes an area of 0.00628 mm2 without the resistors and capacitors. Analysis of various simulation results are carried out for the proposed AFE. The circuit demonstrates a post-layout bandwidth of 239 Hz, with a variable gain between 44 and 58 dB, a notch depth of −56.4 dB at 50.1 Hz, a total harmonic distortion (THD) of −59.65 dB (less than 1%), an input-referred noise spectral density of <34 μVrms/Hz at the pass-band, a dynamic range of 52.71 dB, and a total power consumption of 10.88 μW with a supply of ±0.6 V. Hence, the AFE exhibits the promise of high-quality signal acquisition capability required for portable ECG detection systems in modern healthcare.

A single-IC realizable, electronically tunable, OTA-based full-wave rectifier with simultaneous positive and negative outputs

A new voltage-mode full-wave rectifier (FWR) is proposed in this study. The proposed FWR employs two single-output operational transconductance amplifiers (OTAs), four diodes, and two grounded resistors. It has high input impedance and does not need any extra bias current or voltage sources. It simultaneously provides positive and negative rectified output signals over separate output terminals. The amplitudes of both output signals can be adjusted by varying the resistor values or the transconductance (gm) values of the OTAs. It does not include any floating passive elements, so it is suitable for integrated circuit (IC) implementations. The proposed FWR can be implemented by using a single commercially available IC such as LM13700. However, the proposed FWR has a single matching condition for gm values of the OTAs. Several simulation and experimental test results are added to confirm the theory and show the operability of the proposed circuit.

A novel gain boost and slew rate enhanced CMOTA

Abstract The design of a novel current mirror operational transconductance amplifier is proposed to address the issues of low gain and limited swing rate under conditions of low voltage and power consumption. In order to improve the gain and swing rate of the amplifier, the increase and lift technology and swing rate increase technology are introduced to the traditional op-amp Simulation and verification based on 0.18 μm BCD process and candence. The results show that under 10 pF load capacitance, the gain is increased by 42 dB and the swing rate is increased by 130 times compared with the conventional transconductance op amp.

A New CMOS FTFNDITA Implementation and Its Application

ABSTRACT This research article presents a new design of a CMOS analog building block, termed a Four Terminal Floating Nullor Differential Input Transconductance Amplifier (FTFNDITA). This new analog building block can operate up to the MHz range and offers low-power dissipation circuitry. The proposed FTFNDITA works with ± 1.65 V power supply. Moreover, a ICs-based FTFNDITA is also developed using an off-self commercially available Current Feedback Operational Amplifier (CFOA) as IC AD844 and Operational Transconductance Amplifier (OTA) as IC LM13700 or IC CA3080. To extend the application perspective of the proposed FTFNDITA blocks, a few fundamental analog signal processing circuits like the design of Floating Inductor Simulator (FIS), First-Order Low-Pass Filter (FLPF), Floating Capacitance Multiplier (FCM), and its extension for active filter design, are incorporated. In addition, a non-ideality investigation is also performed to test the deviation between the ideal and practical design. Finally, PSPICE and experimental verifications are observed to validate the functionality of FTFNDITA.

1 V Tunable High-Quality Universal Filter Using Multiple-Input Operational Transconductance Amplifiers.

This paper presents a new multiple-input single-output voltage-mode universal filter employing four multiple-input operational transconductance amplifiers (MI-OTAs) and three grounded capacitors suitable for low-voltage low-frequency applications. The quality factor (Q) of the filter functions can be tuned by both the capacitance ratio and the transconductance ratio. The multiple inputs of the OTA are realized using the bulk-driven multiple-input MOS transistor technique. The MI-OTA-based filter can also offer many filtering functions without additional circuitry requirements, such as an inverting amplifier to generate an inverted input signal. The proposed filter can simultaneously realize low-pass, high-pass, band-pass, band-stop, and all-pass responses, covering both non-inverting and inverting transfer functions in a single topology. The natural frequency and the quality factors of all the filtering functions can be controlled independently. The natural frequency can also be electronically controlled by tuning the transconductances of the OTAs. The proposed filter uses a 1 V supply voltage, consumes 120 μW of power for a 5 μA setting current, offers 40 dB of dynamic range and has a third intermodulation distortion of -43.6 dB. The performances of the proposed circuit were simulated using a 0.18 μm TSMC CMOS process in the Cadence Virtuoso System Design Platform to confirm the performance of the topology.

Design of Low Noise Low Power Instrumentation Amplifier for Biomedical Applications

Advancements in integrated circuit (IC) technology and circuit design are enabling devices to replace complex biological applications. Despite this progress, achieving necessary functionality at low power levels is crucial for fully integrated systems. Biomedical devices like pacemakers, which require ongoing battery charging, operate at nanowatt power levels over several years. To ensure long-term pacemaker survival, an Analog Front End (AFE) with low to moderate power consumption and high precision is essential. The front-end Instrumentation Amplifier (INA) is vital for signal acquisition, significantly improving the effectiveness of ECG signal collection systems.The primary aim of this research is to develop an integrated ECG instrumentation amplifier (INA) that can deliver top-notch performance while keeping noise and power consumption to a minimum. This amplifier will enable seamless monitoring of the ECG signal without interruptions. Using an AC connected Common Mode Feedback system [1]. in conjunction with an Operational Trans-conductance Amplifier (OTA) that uses a Chopper stabilization technique, the study's band pass filtering response within the ECG signal frequency range of 0-100Hz is obtained as anticipated. CMOS 45 nm technology is used throughout the entire process using Mentor Graphics EDA Tools

A 0.3 V OTA with Enhanced CMRR and High Robustness to PVT Variations

In this paper, we present a 0.3 V body-driven operational transconductance amplifier (OTA) that exploits a biasing approach based on the use of a replica loop with gain. An auxiliary amplifier is exploited both in the current mirror load of the first stage of the OTA and in the replica loop in order to achieve super-diode behavior, resulting in low mirror gain error, which enhances CMRR, and robust biasing. Common-mode feedforward, provided by the replica loop, further enhances CMRR. Simulations in a 180 nm CMOS technology show 65 dB gain with 2 kHz unity-gain frequency on a 200 pF load when consuming 9 nW. Very high linearity with a 0.24% THD at 90% full-scale and robustness to PVT variations are also achieved.

0.5 V Multiple-Input Fully Differential Operational Transconductance Amplifier and Its Application to a Fifth-Order Chebyshev Low-Pass Filter for Bio-Signal Processing.

This paper presents a multiple-input fully differential operational transconductance amplifier (MI-FD OTA) with very low power consumption. To obtain a differential MOS pair with minimum supply voltage and minimum power consumption, the multiple-input bulk-driven MOS transistor operating in the subthreshold region is used. To show the advantage of the MI-FD OTA, a fifth-order Chebyshev filter was used to realize a low-pass filter capable of operating with a supply voltage of 0.5 V and consuming 60 nW at a nominal setup current of 3 nA. The proposed filter uses five MI-FD OTAs and five capacitors. The total harmonic distortion (THD) was 0.97% for a rail-to-rail sinusoidal input signal. The MI-FD OTA and the filter application were designed and simulated in the Cadence environment using a 0.18 µm CMOS process from TSMC. The robustness of the design was confirmed by Monte Carlo analysis and process, voltage, and temperature corner analysis.

Nature inspired algorithm based design of near ideal fractional order low pass Chebyshev filters and their realization using OTAs and CCII

Fractional order filters offer greater freedom of design and a precise control over stopband attenuation in electronic circuits and systems. This paper presents the design of a fractional order low pass Chebyshev filter (FOLCF) that achieves near-ideal response characteristics. The methodology introduced utilizes metaheuristic optimization methods, including particle swarm optimization, firefly algorithm, and grey wolf optimization. These techniques are employed to precisely adjust the filter coefficients for the orders (1+α), (2+α), and (3+α). The adjustment is carried out by comparing the desired behaviour of the FOLCF with generalized fractional order low pass transfer functions. Throughout these instances, the parameter α is varied within the range of (0, 1). The designed filters are then tested and compared on the basis of various factors. Simulation results demonstrate that the designed filters closely follow the behaviour of an ideal Chebyshev filter with maximum passband and stopband magnitude errors being −31.93 dB and −52.74 dB respectively for (1+α) order filters. These values for (2+α) and (3+α) order FOLCF have been observed to be −30.04 dB and −55.91 dB; −17.72 dB and −49.52 dB respectively. Furthermore, it has been observed that the proposed work outperforms existing state-of-the-art approaches in various aspects, including magnitude error, stopband attenuation, and cut-off frequency. The stability of the designed filters has been verified through stability analysis. Additionally, practical feasibility of the proposed FOLCF is demonstrated through SPICE simulations for α = [0.2,0.5,0.8] using second generation current conveyor (CCII) and operational transconductance amplifier (OTA) based topologies while approximating the constant phase element using fifth order continued fraction expansion. The SPICE implementations closely follow the behaviour of ideal filter with −48.67 dB and −62.8 dB as mean square errors for CCII and OTA circuits respectively, showcasing the proposed filters' superiority and practical applicability in advanced electronic design.

CMOS Design of Chaotic Systems Using Biquadratic OTA-C Filters

CMOS Design of Chaotic Systems Using Biquadratic OTA-C Filters

A linear cross-coupled gate-driven quasi-floating bulk low-power wide input range transconductor.

High linearity for a wider input voltage range and low-power operation of the operational transconductance amplifier (OTA) are indispensable parameters for health care applications, which require high quality and accurate signal conditioning. However, achieving low-power operation along with high linearity at low supply voltages is challenging for OTA using conventional low-power and linearization techniques. This paper proposes an OTA based on a cross-coupled gate-driven quasi-floating bulk (CGDQFB) MOSFET and source-degenerated linearization techniques, which works at a supply of ±0.5V. The post-layout simulations of the proposed OTA are performed in the 180nm standard CMOS process, which shows a transconductance of 0.321 μS, an output impedance of 331 MΩ, an input impedance of 897 GΩ, a DC gain of 40.54 dB, a gain-bandwidth of 0.145MHz, a total harmonic distortion (THD) of 51.09 dB for an input voltage range of 626.7 mV at a frequency of 100.39Hz, and a power consumption of 0.45 μW. The proposed OTA shows an input common mode range of -0.34 to 0.4V, an output voltage swing of -0.34 to 0.34V, a common mode rejection ratio of 91.08 dB, and a consumption area of 23 965.92 µm2. Furthermore, with 200 Monte Carlo iterations, the proposed OTA shows variability for gain and THD of 0.003 and 0.036, respectively. The proposed CGDQFB OTA is a suitable contender for conditioning bio-signals used in health care applications.

A 23.7‐uW 93.5‐dB SNDR delta‐sigma modulator for healthcare and medical diagnostics

AbstractThis paper presents a high‐precision, low‐power delta‐sigma modulator (DSM) designed for healthcare and medical diagnostics. It utilizes a hybrid switching integrator to reduce distortion caused by the non‐linear on‐resistance of switches at a low supply voltage. Leveraging the characteristics of the hybrid switching integrator, a non‐50% duty cycle sampling timing and a corresponding tunable Miller‐compensated operational transconductance amplifier are proposed to reduce resistor thermal noise and meet lower power consumption requirements. The DSM is simulated based on 130‐nm CMOS technology and achieves 93.5‐dB signal‐to‐noise‐plus‐distortion ratio at a 1‐kHz bandwidth while consuming 23.7 µW from a 1.5‐V supply.

1 V Electronically Tunable Differential Difference Current Conveyors Using Multiple-Input Operational Transconductance Amplifiers.

This paper presents electronically tunable current conveyors using low-voltage, low-power, multiple-input operational transconductance amplifiers (MI-OTAs). The MI-OTA is realized using the multiple-input bulk-driven Metal Oxide Semiconductor transistor (MIBD-MOST) technique to achieve minimum power consumption. The MI-OTA also features high linearity, a wide input range, and a simple Complementary Metal Oxide Semiconductor (CMOS). Thus, high-performance electronically tunable current conveyors are obtained. With the MI-OTA-based current conveyor, both an electronically tunable differential difference current conveyor (EDDCC) and a second-generation electronically tunable current conveyor (ECCII) are available. Unlike the conventional differential difference current conveyor (DDCC) and second-generation current conveyor (CCII), the current gains of the EDDCC and ECCII can be controlled by adjusting the transconductance ratio of the current conveyors. The proposed EDDCC has been used to realize a voltage-to-current converter and current-mode universal filter to show the advantages of the current gain of the EDDCC. The proposed current conveyors and their applications are designed and simulated in the Cadence environment using 0.18 μm TSMC (Taiwan Semiconductor Manufacturing Company) CMOS technology. The proposed circuit uses ±0.5 V of power supply and consumes 90 μW of power. The simulation results are presented and confirm the functionality of the proposed circuit and the filter application. Furthermore, the experimental measurement of the EDDCC implemented in the form of a breadboard connection using a commercially available LM13700 device is presented.

A 90.9 dB SNDR 95.3 dB DR Audio Delta-Sigma Modulator with FIA-Assisted OTA.

This paper presents a low-power, high-gain integrator design that uses a cascode operational transconductance amplifier (OTA) with floating inverter-amplifier (FIA) assistance. Compared to a traditional cascode, the proposed integrator can achieve a gain of 80 dB, while reducing power consumption by 30%. Upon completing the analysis, the value of the FIA drive capacitor and clock scheme for the FIA-assisted OTA were obtained. To enhance the dynamic range (DR) and mitigate quantization noise, a tri-level quantizer was employed. The design of the feedback digital-to-analog converter (DAC) was simplified, as it does not use additional mismatch shaping techniques. A third-order, discrete-time delta-sigma modulator was designed and fabricated in a 0.18 μm complementary metal-oxide semiconductor (CMOS) process. It operated on a 1.8 V supply, consuming 221 µW with a 24 kHz bandwidth. The measured SNDR and DR were 90.9 dB and 95.3 dB, respectively.

Integrable emulation of a floating incremental/decremental inverse memristor for memristor bandwidth extension

Abstract The article explores the compact emulation of the inverse memristor through a circuit-based approach. It introduces a floating emulator architecture that incorporates a dual output OTA (Operation Transconductance Amplifier) and DVCC (Differential Voltage Current Conveyor), along with two grounded passive elements, to achieve the emulation of an inverse memristor. The utilization of grounded resistance allows for tunability over the realized behaviour. A key contribution of this research is the novel application of the inverse memristor to extend the operating frequency range of any memristor emulator circuit. Validation of the proposed emulator circuit, in both incremental and decremental modes, along with its application, is conducted using PSPICE-generated simulation results in the 0.18 µm TSMC CMOS technology. Additionally, an inverse memristor emulator configuration employing the IC LM13700 is presented, and its functionality is tested through a breadboard implementation.

Analysis of a Low-Power OTA-Based Neural Amplifier Design for EEG Signal Acquisition

This paper presents the design of an efficient operational transconductance amplifier (OTA) to be explicitly used for electroencephalogram (EEG) signal acquisition in neural amplifiers (NAs). The central objective of this study revolves around addressing the fundamental compromise between noise and power in the design of NAs. The overarching goal is to effectively mitigate this trade-off by introducing novel approaches. The proposed design’s novelty lies in utilizing an adaptive biasing technique instead of the traditional current mirror biasing technique. Furthermore, the conventional input differential pair of the OTA is modified to employ a self cascode flipped voltage follower (SCFVF), which eventually reduces power consumption of the NA to 0.822 [Formula: see text]W. Additionally, notable improvements in noise performance are achieved and found to be 624.9 nV/[Formula: see text] at 1 Hz. The gain and bandwidth range of the input low-noise amplifier is 54.2 dB and 2.8 Hz–207 Hz, respectively, which effectively amplifies low-amplitude noisy incoming signals, addressing the specific requirements of EEG signal acquisition.

Design of carbon allotrope FET-based folded cascode operational transconductance amplifiers (FC-OTA)

ABSTRACT Throughout this study, a high-gain, low-energy folded cascode operational transconductance amplifier (FC-OTA) was modelled utilising HSPICE software. The FC-OTA designs included implementations availing CNFETs, GNRFETs, and mixed involving a combination of CNFETs with CMOS. Comparison with traditional CMOS-based FC-OTAs revealed that CNFET-based FC-OTAs exhibited considerable enhancements, displaying significant escalation in DC amplification, output resistance, average power dissipation, and CMRR. The phase margin in CNT-based FC-OTAs indicated stability. Moreover, CNT-based devices showed substantial rise in direct current amplification over GNRFET-FC-OTAs. The study further explored the operational effectiveness of proposed FC-OTAs by varying parameters such as CNT diameter, CNT pitch, and the number of CNTs, identifying optimal values that significantly enhance the FC-OTA’s performance. Comprehensive parametric and Monte Carlo analyses demonstrated OTA’s resilience to changes in supply voltage, temperature, capacitance, and mismatches. In summary, the folded cascode approach was found to enhance gain and reduce average power in CNFET-based FC-OTAs in comparison to other structural configurations.