Abstract Semiconductor industry is moving towards more and more integration to provide more functionality and add value to the processor, thereby enabling better user experience. This integration can come in 3 categories: On-die integration, On-package integration, and On-board integration. On-board integration is the typical method being used for several generations and on-die and on-package integration architectures are getting more focus due to better performance and reduced power. The key vector to enable on-die/package architectures is reduced cost and maximum features for a given substrate and socket form factor. Silicon features are also moving at a faster pace compared to the board technology. This paper details a novel package (PoINT) architecture as well as the key technology challenges that were resolved to successfully enable this architecture.
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