NVIDIA Compute Unified Device Architecture Research Articles

ParaCells: A GPU Architecture for Cell-Centered Models in Computational Biology.

In computational biology, the hierarchy of biological systems requires the development of flexible and powerful computational tools. Graphics processing unit (GPU) architecture has been a suitable device for parallel computing in simulating multi-cellular systems. However, in modeling complex biological systems, scientists often face two tasks, mathematical formulation and skillful programming. In particular, specific programming skills are needed for GPU programming. Therefore, the development of an easy-to-use computational architecture, which utilizes GPU for parallel computing and provides intuitive interfaces for simple implementation, is needed so that general scientists can perform GPU simulations without knowing much about the GPU architecture. Here, we introduce ParaCells, a cell-centered GPU simulation architecture for NVIDIA compute unified device architecture (CUDA). ParaCells was designed as a versatile architecture that connects the user logic (in C++) with NVIDIA CUDA runtime and is specific to the modeling of multi-cellular systems. An advantage of ParaCells is its object-oriented model declaration, which allows it to be widely applied to many biological systems through the combination of basic biological concepts. We test ParaCells with two applications. Both applications are significantly faster when compared with sequential as well as parallel OpenMP and OpenACC implementations. Moreover, the simulation programs based on ParaCells are cleaner and more readable than other versions.

An Efficient Acceleration of Solving Heat and Mass Transfer Equations with the Second Kind Boundary Conditions in Capillary Porous Composite Cylinder Using Programmable Graphics Hardware

With the recent developments in computing technology, increased efforts have gone into simulation of various scientific methods and phenomenon in engineering fields. One such case is the simulation of heat and mass transfer in capillary porous media, which is becoming more and more important in analysing various scenarios in engineering applications. Analysing such heat and mass transfer phenomenon in a given environment requires us to simulate it. This entails simulation of coupled heat mass transfer equations. However, this process of numerical solution of heat and mass transfer equations is very much time consuming. Therefore, this paper aims at utilizing one of the acceleration techniques developed in the graphics community that exploits a graphics processing unit (GPU) which is applied to the numerical solutions of heat and mass transfer equations. The nVidia Compute Unified Device Architecture (CUDA) programming model caters a good method of applying parallel computing to program the graphical processing unit. This paper shows a good improvement in the performance while solving the heat and mass transfer equations for capillary porous composite cylinder with the second kind of boundary conditions numerically running on GPU. This heat and mass transfer simulation is implemented using CUDA platform on nVidia Quadro FX 4800 graphics card. Our experimental results depict the drastic performance improvement when GPU is used to perform heat and mass transfer simulation. GPU can significantly accelerate the performance with a maximum observed speedup of more than 7-fold times. Therefore, the GPU is a good approach to accelerate the heat and mass transfer simulation.

GpuSPHASE—A shared memory caching implementation for 2D SPH using CUDA

Smoothed particle hydrodynamics (SPH) is a meshless Lagrangian method that has been successfully applied to computational fluid dynamics (CFD), solid mechanics and many other multi-physics problems. Using the method to solve transport phenomena in process engineering requires the simulation of several days to weeks of physical time. Based on the high computational demand of CFD such simulations in 3D need a computation time of years so that a reduction to a 2D domain is inevitable. In this paper gpuSPHASE, a new open-source 2D SPH solver implementation for graphics devices, is developed. It is optimized for simulations that must be executed with thousands of frames per second to be computed in reasonable time. A novel caching algorithm for Compute Unified Device Architecture (CUDA) shared memory is proposed and implemented. The software is validated and the performance is evaluated for the well established dambreak test case. Program summaryProgram title: gpuSPHASECatalogue identifier: AFBO_v1_0Program summary URL:http://cpc.cs.qub.ac.uk/summaries/AFBO_v1_0.htmlProgram obtainable from: CPC Program Library, Queen’s University, Belfast, N. IrelandLicensing provisions: GNU GPLv3No. of lines in distributed program, including test data, etc.: 128288No. of bytes in distributed program, including test data, etc.: 1350326Distribution format: tar.gzProgramming language: C++, CUDA.Computer: Nvidia CUDA capable devices.Operating system: Linux, Windows, Mac OS.Classification: 5, 12.External routines: Qt5 Core, HDF5, H5PartNature of problem:Free surface fluid dynamics simulations of long running physical phenomena that must be calculated in the order of real-time.Solution method:gpuSPHASE is a 2D SPH solver for CUDA capable devices that is optimized for the computation of real-time simulations.Running time: Depending on the simulated problem the running time varies from seconds to weeks.

Implementation of Image Enhancement Algorithms and Recursive Ray Tracing using CUDA

This paper intends to achieve high performance in terms of time by implementing various time consuming application on NVIDIA Graphics Processing Unit (GPU) by using parallel programming model NVIDIA Compute Unified Device Architecture (CUDA). NVIDIA CUDA provides platform for developing parallel applications on NVIDIA GPUs. So it gives developers a platform to build high-end parallel processing applications. This paper implements various image processing algorithms on both Central Processing Unit (CPU) and GPU. Implemented point-to-point image processing algorithms are brightening filter, darkening filter, negative filter and RGB to Grayscale filter. Along with various convolution algorithms that consider value of its neighboring pixels are also implemented. Implemented convolution algorithms are sobel filter for edge detection, low pass filter and high pass filter. Performance analysis of the implemented image processing algorithms is done on both CPU and GPU. Analysis is made on images of resolution 3000 X 3000. Color-ed images are used for point-to-point pixel processing algorithms. Grayscale images are used for all convolution algorithms. Performance analysis done for point-to-point processing algorithms by varying number of threads per block.Recursive ray tracing is also implemented on GPU, and found performance gain compare to serial algorithm run on CPU.

Numerical Solutions of Heat and Mass Transfer with the First Kind Boundary and Initial Conditions in Capillary Porous Cylinder Using Programmable Graphics Hardware

Recently, heat and mass transfer simulation is more and more important in various engineering fields. In order to analyze how heat and mass transfer in a thermal environment, heat and mass transfer simulation is needed. However, it is too much time-consuming to obtain numerical solutions to heat and mass transfer equations. Therefore, in this paper, one of acceleration techniques developed in the graphics community that exploits a graphics processing unit (GPU) is applied to the numerical solutions of heat and mass transfer equations. The nVidia Compute Unified Device Architecture (CUDA) programming model provides a straightforward means of describing inherently parallel computations. This paper improves the performance of solving heat and mass transfer equations over capillary porous cylinder with the first boundary and initial conditions numerically running on GPU. Heat and mass transfer simulation using the novel CUDA platform on nVidia Quadro FX 4800 is implemented. Our experimental results clearly show that GPU can accurately perform heat and mass transfer simulation. GPU can significantly accelerate the performance with the maximum observed speedups 10 times. Therefore, the GPU is a good approach to accelerate the heat and mass transfer simulation

Hyper-Real-Time Ice Simulation and Modeling Using GPGPU

This paper describes the design of an efficient parallel implementation of an ice simulator that simulates the behaviour of a ship operating in pack ice. The main idea of the method is to treat ice as a set of discrete objects with very simple properties, and to model the system mechanics mainly as a set of discrete contact and failure events. In this way it becomes possible to parallelize the problem, so that a very large number of ice floes can be modeled. This approach is called the Ice Event Mechanics Modeling (IEMM) method which builds a system solution from a large set of discrete events occurring between a large set of discrete objects. The simulator is developed using the NVIDIA Compute Unified Device Architecture (CUDA). This paper also describes the execution of experiments to evaluate the performance of the simulator and to validate the numerical modeling of ship operations in pack ice. Our results show speed up of 11 times, reducing simulation time for a large ice field (9,801 floes) from over 2 hours to about 12 minutes.

Explicit GPU Based Second-Order Finite-Difference Modeling on a High Resolution Surface, Feather River, California

An explicit second-order finite-difference computer model was developed and optimized for solution of the Shallow Water Equations. The model was applied to the Feather River below the Oroville Dam and Thermalito Afterbay near Gridley, California. Two versions of the computer model were constructed to run on either Central Processing Units or Graphical Processing Units, utilizing Fortran, C, C++, and the NVIDIA Compute Unified Device Architecture (CUDA) parallel computing platform. The underlying algorithm utilizes a structured grid and is capable of handling the wetting and drying of cells. It was developed with view to maximizing stability while maintaining accuracy, and allowing for flexibility of the computational domain. Comparisons with analytical and observed results showed the proposed methodology to be robust, accurate, and efficient. The models were applied to a section of the Feather River where observations of flow depths and volumetric flow rates are available for multiple flood events. The domain surface was partially developed using high-resolution photogrammetric data obtained through use of unmanned aerial vehicles. Runtimes and results were compared to the United States Bureau of Reclamations’ implicit finite-volume numerical method and with field observation with generally good correspondence.

Towards Online Visualization and Interactive Monitoring of Real-Time CFD Simulations on Commodity Hardware

Real-time rendering in the realm of computational fluid dynamics (CFD) in particular and scientific high performance computing (HPC) in general is a comparably young field of research, as the complexity of most problems with practical relevance is too high for a real-time numerical simulation. However, recent advances in HPC and the development of very efficient numerical techniques allow running first optimized numerical simulations in or near real-time, which in return requires integrated and optimized visualization techniques that do not affect performance. In this contribution, we present concepts, implementation details and several application examples of a minimally-invasive, efficient visualization tool for the interactive monitoring of 2D and 3D turbulent flow simulations on commodity hardware. The numerical simulations are conducted with ELBE, an efficient lattice Boltzmann environment based on NVIDIA CUDA (Compute Unified Device Architecture), which provides optimized numerical kernels for 2D and 3D computational fluid dynamics with fluid-structure interactions and turbulence.

Acceleration of JPEG Decoding Process using CUDA

In this paper we have implemented efficient JPEG (Joint Photographic experts group) Decoder on GPU (Graphic Processing Unit) using NVIDIA CUDA (Compute Unified Device Architecture) Technology. This decoder is capable of decoding images of Ultra HD resolution with superfast speed GPU is used to assist the CPU for time consuming tasks. In this paper IDCT module which consumes 70 to 80 percent of computation time is implemented on GPU. An asynchronous parallel execution between the CPU and the GPU is used at a same time to improve the JPEG decoder acceleration rate. In this work, the JPEG decoder based on the CUDA performs decompression of images of size 2560 x 1600 pixels and below. Finally the results are shown with respect to different sized images and consumed time for decoding. The results show that this decoder faster in multiple times than the decoder in CPU. General Terms:

PSkel: A stencil programming framework for CPU‐GPU systems

SummaryThe use of Graphics Processing Units (GPUs) for high‐performance computing has gained growing momentum in recent years. Unfortunately, GPU‐programming platforms like Compute Unified Device Architecture (CUDA) are complex, user unfriendly, and increase the complexity of developing high‐performance parallel applications. In addition, runtime systems that execute those applications often fail to fully utilize the parallelism of modern CPU‐GPU systems. Typically, parallel kernels run entirely on the most powerful device available, leaving other devices idle. These observations sparked research in two directions: (1) high‐level approaches to software development for GPUs, which strike a balance between performance and ease of programming; and (2) task partitioning to fully utilize the available devices. In this paper, we propose a framework, called PSkel, that provides a single high‐level abstraction for stencil programming on heterogeneous CPU‐GPU systems, while allowing the programmer to partition and assign data and computation to both CPU and GPU. Our current implementation uses parallel skeletons to transparently leverage Intel Threading Building Blocks (Intel Corporation, Santa Clara, CA, USA) and NVIDIA CUDA (Nvidia Corporation, Santa Clara, CA, USA). In our experiments, we observed that parallel applications with task partitioning can improve average performance by up to 76% and 28% compared with CPU‐only and GPU‐only parallel applications, respectively. Copyright © 2015 John Wiley & Sons, Ltd.

Graphics processing unit accelerated three-dimensional model for the simulation of pulsed low-temperature plasmas

A 3-dimensional particle-in-cell/Monte Carlo collision simulation that is fully implemented on a graphics processing unit (GPU) is described and used to determine low-temperature plasma characteristics at high reduced electric field, E/n, in nitrogen gas. Details of implementation on the GPU using the NVIDIA Compute Unified Device Architecture framework are discussed with respect to efficient code execution. The software is capable of tracking around 10 × 106 particles with dynamic weighting and a total mesh size larger than 108 cells. Verification of the simulation is performed by comparing the electron energy distribution function and plasma transport parameters to known Boltzmann Equation (BE) solvers. Under the assumption of a uniform electric field and neglecting the build-up of positive ion space charge, the simulation agrees well with the BE solvers. The model is utilized to calculate plasma characteristics of a pulsed, parallel plate discharge. A photoionization model provides the simulation with additional electrons after the initial seeded electron density has drifted towards the anode. Comparison of the performance benefits between the GPU-implementation versus a CPU-implementation is considered, and a speed-up factor of 13 for a 3D relaxation Poisson solver is obtained. Furthermore, a factor 60 speed-up is realized for parallelization of the electron processes.

A GPU-accelerated non-negative sparse latent semantic analysis algorithm for social tagging data

Nowadays large-scale social tagging data have become very valuable in organizing and indexing multimedia resources. In this paper, we apply Non-negative Sparse Latent Semantic Analysis (NN-Sparse LSA) to discover the latent semantic space behind associations between multimedia resources and tagging data. Based on the traditional coordinate-descent algorithm, column-orthogonality and non-negative constraints, we derive a much faster optimization algorithm in theory for solving the NN-Sparse LSA model. Furthermore, we implement the parallel version of our fast NN-Sparse LSA algorithm using the NVIDIA CUDA (Compute Unified Device Architecture) parallel programming framework and a data partitioning scheme that effectively reduces the memory traffic between the global memory of the Graphic Processing Unit (GPU) and the host memory. The experimental results on image classification and tag recommendation tasks on MIRFLICKR and NUS-WIDE datasets show that our parallelized fast optimization algorithm can achieve comparable or even better performance than the other examined methods, while speeds up the original optimization algorithm 20–110 times.

State-of-the-Art GPGPU Applications in Bioinformatics

The exponential growth of available biological data in recent years coupled with their increasing complexity has made their analysis a computationally challenging process. Traditional central processing unist (CPUs) are reaching their limit in processing power and are not designed primarily for multithreaded applications. Graphics processing units (GPUs) on the other hand are affordable, scalable computer powerhouses that, thanks to the ever increasing demand for higher quality graphics, have yet to reach their limit. Typically high-end CPUs have 8-16 cores, whereas GPUs can have more than 2,500 cores. GPUs are also, by design, highly parallel, multicore and multithreaded, able of handling thousands of threads doing the same calculation on different subsets of a large data set. This ability is what makes them perfectly suited for biological analysis tasks. Lately this potential has been realized by many bioinformatics researches and a huge variety of tools and algorithms have been ported to GPUs, or designed from the ground up to maximize the usage of available cores. Here, we present a comprehensive review of available bioinformatics tools ranging from sequence and image analysis to protein structure prediction and systems biology that use NVIDIA Compute Unified Device Architecture (CUDA) general-purpose computing on graphics processing units (GPGPU) programming language.

Low-coherence interferometry with polynomial interpolation on Compute Unified Device Architecture-enabled graphics processing units

An algorithm for interpolation of central fringe position in low-coherence interferometry measurements is presented. The algorithm is based on a polynomial curve fitting. Fast calculation of interpolation is possible due to the use of an NVIDIA Compute Unified Device Architecture (CUDA) technology, which allows independent analysis of different points of a high-resolution detector matrix on separate cores of a graphics processing unit (GPU). The dependency of the method’s accuracy on the spectral width of the light source is checked. The computation times on a GPU are compared with those achieved with a multicore central processing unit, showing nearly 30 times faster calculations when using CUDA technology. The algorithm accuracy is tested by measuring a flat glass surface with two different cameras—an ordinary CCD camera and a cooled EMCCD camera. Finally, the algorithm is applied to measurements of a populated optical fiber connector array prototyped using deep proton writing technology.

Cálculo eficiente de las energías de formación de escalones dobles en materiales BCC

Motion of screw dislocations in BCC materials at low temperature is believed to be related to the formation of mobile kinks on the dislocation line. Therefore, the accurate prediction of kink nucleation energies is required to fully describe mobility of screw dislocations in these materials. Studies of fundamental dislocation processes at atomic length scale are numerically and computationally intensive problems. This work studies the calculation of zero-stress formation energies of kink-pair configurations for BCC crystals. Our model for stored energy associated to a dislocation line configuration is based on the theory of discrete dislocations of Ariza and Ortiz. Its value is computed efficiently using an algorithm developed on the NVIDIA Compute Unified Device Architecture (CUDA). Results confirm those obtained using atomistic potentials and first principles calculations, and those based on the continuum theory of dislocations.

Data Parallel density‐based genetic clustering on CUDA Architecture

SUMMARYEvolutionary clustering algorithms have been proven as a good ability to find clusters in data. Among their advantages belong the abilities to adapt to data and to determine the number of clusters automatically, thus requiring less a priori assumptions about analyzed objects than traditional clustering methods. Unfortunately, such a clustering by genetic algorithms and evolutionary algorithms in general suffers from high computational costs when it comes to recurrent fitness function evaluation. Computing on graphic processing units (GPUs) is a recent programming and development paradigm bringing high performance parallel computing closer to general audience. Modern general purpose GPUs are composed of tens to thousands of computational cores that can execute programs in parallel using the single instruction multiple data parallel processing approach. General purpose GPU programs need to be designed and implemented in a data parallel way and with respect to the architecture of target devices to fully utilize their high performance. This study presents a design, implementation, and evaluation of a data parallel genetic algorithm for density‐based clustering. The algorithm was implemented and evaluated on the nVidia Compute Unified Device Architecture (CUDA) platform. Copyright © 2013 John Wiley & Sons, Ltd.

Data layout optimization for GPGPU architectures

GPUs are being widely used in accelerating general-purpose applications, leading to the emergence of GPGPU architectures. New programming models, e.g., Compute Unified Device Architecture (CUDA), have been proposed to facilitate programming general-purpose computations in GPGPUs. However, writing high-performance CUDA codes manually is still tedious and difficult. In particular, the organization of the data in the memory space can greatly affect the performance due to the unique features of a custom GPGPU memory hierarchy. In this work, we propose an automatic data layout transformation framework to solve the key issues associated with a GPGPU memory hierarchy (i.e., channel skewing, data coalescing, and bank conflicts) . Our approach employs a widely applicable strategy based on a novel concept called data localization . Specifically, we try to optimize the layout of the arrays accessed in affine loop nests, for both the device memory and shared memory, at both coarse grain and fine grain parallelization levels. We performed an experimental evaluation of our data layout optimization strategy using 15 benchmarks on an NVIDIA CUDA GPU device. The results show that the proposed data transformation approach brings around 4.3X speedup on average.

Compute unified device architecture (CUDA)-based parallelization of WRF Kessler cloud microphysics scheme

In recent years, graphics processing units (GPUs) have emerged as a low-cost, low-power and a very high performance alternative to conventional central processing units (CPUs). The latest GPUs offer a speedup of two-to-three orders of magnitude over CPU for various science and engineering applications. The Weather Research and Forecasting (WRF) model is the latest-generation numerical weather prediction model. It has been designed to serve both operational forecasting and atmospheric research needs. It proves useful for a broad spectrum of applications for domain scales ranging from meters to hundreds of kilometers. WRF computes an approximate solution to the differential equations which govern the air motion of the whole atmosphere. Kessler microphysics module in WRF is a simple warm cloud scheme that includes water vapor, cloud water and rain. Microphysics processes which are modeled are rain production, fall and evaporation. The accretion and auto-conversion of cloud water processes are also included along with the production of cloud water from condensation. In this paper, we develop an efficient WRF Kessler microphysics scheme which runs on Graphics Processing Units (GPUs) using the NVIDIA Compute Unified Device Architecture (CUDA). The GPU-based implementation of Kessler microphysics scheme achieves a significant speedup of 70× over its CPU based single-threaded counterpart. When a 4 GPU system is used, we achieve an overall speedup of 132× as compared to the single thread CPU version.

GPU-based four-dimensional general-relativistic ray tracing

This paper presents a new general-relativistic ray tracer that enables image synthesis on an interactive basis by exploiting the performance of graphics processing units (GPUs). The application is capable of visualizing the distortion of the stellar background as well as trajectories of moving astronomical objects orbiting a compact mass. Its source code includes metric definitions for the Schwarzschild and Kerr spacetimes that can be easily extended to other metric definitions, relying on its object-oriented design. The basic functionality features a scene description interface based on the scripting language Lua, real-time image output, and the ability to edit almost every parameter at runtime. The ray tracing code itself is implemented for parallel execution on the GPU using NVidia’s Compute Unified Device Architecture (CUDA), which leads to performance improvement of an order of magnitude compared to a single CPU and makes the application competitive with small CPU cluster architectures.Program summaryProgram title: GpuRay4DCatalog identifier: AEMV_v1_0Program summary URL: http://cpc.cs.qub.ac.uk/summaries/AEMV_v1_0.htmlProgram obtainable from: CPC Program Library, Queen’s University, Belfast, N. IrelandLicensing provisions: Standard CPC licence, http://cpc.cs.qub.ac.uk/licence/licence.htmlNo. of lines in distributed program, including test data, etc.: 73649No. of bytes in distributed program, including test data, etc.: 1334251Distribution format: tar.gzProgramming language: C++, CUDA.Computer: Linux platforms with a NVidia CUDA enabled GPU (Compute Capability 1.3 or higher), C++ compiler, NVCC (The CUDA Compiler Driver).Operating system: Linux.RAM: 2 GBClassification: 1.5.External routines: OpenGL Utility Toolkit development files, NVidia CUDAToolkit 3.2, Lua5.2Nature of problem: Ray tracing in four-dimensional Lorentzian spacetimes.Solution method: Numerical integration of light rays, GPU-based parallel programming using CUDA, 3D-Rendering via OpenGL.Running time: Problem dependent, several seconds up to hours.

Central force optimization on a GPU: a case study in high performance metaheuristics

Central Force Optimization (CFO) is a new and deterministic population based metaheuristic algorithm that has been demonstrated to be competitive with other metaheuristic algorithms such as Genetic Algorithms (GA), Particle Swarm Optimization (PSO), and Group Search Optimization (GSO). While CFO often shows superiority in terms of functional evaluations and solution quality, the algorithm is complex and typically requires increased computational time. In order to decrease the computational time required for convergence when using CFO, this study presents the first parallel implementation of CFO on a Graphics Processing Unit (GPU) using the NVIDIA Compute Unified Device Architecture (CUDA). Two versions of the CFO algorithm, Parameter-Free CFO (PF-CFO) and Pseudo-Random CFO (PR-CFO), are implemented using CUDA on a NVIDIA Quadro 1000M and examined using four test problems ranging from 10 to 50 dimensions. Discussion is made concerning the implementation of the CFO algorithms in terms of problem decomposition, memory access, scalability, and divergent code. Results demonstrate substantial speedups ranging from roughly 1 to 28 depending on problem size and complexity.