Ns Switching Time Research Articles

Experiments and SPICE simulations of double MgO-based perpendicular magnetic tunnel junction* *Project supported by State Grid Corporation of China under the 2018 Science and Technology Project of State Grid Corporation: Research on electromagnetic measurement technology based on EIT and TMR (Grant No. JL71-18-007).

We investigate properties of perpendicular anisotropy magnetic tunnel junctions (pMTJs) with a stack structure MgO/CoFeB/Ta/CoFeB/MgO as the free layer (or recording layer), and obtain the necessary device parameters from the tunneling magnetoresistance (TMR) vs. field loops and current-driven magnetization switching experiments. Based on the experimental results and device parameters, we further estimate current-driven switching performance of pMTJ including switching time and power, and their dependence on perpendicular magnetic anisotropy and damping constant of the free layer by SPICE-based circuit simulations. Our results show that the pMTJ cells exhibit a less than 1 ns switching time and write energies < 1.4 pJ; meanwhile the lower perpendicular magnetic anisotropy (PMA) and damping constant can further reduce the switching time at the studied range of damping constant α < 0.1. Additionally, our results demonstrate that the pMTJs with the thermal stability factor ≃ 73 can be easily transformed into spin-torque nano-oscillators from magnetic memory as microwave sources or detectors for telecommunication devices.

A MOSFET-based high voltage nanosecond pulse module for the gating of proximity-focused microchannel plate image-intensifier

Gate modules based on avalanche technology for photocathode gating to proximity-focused microchannel-plate image intensifier (MCPII) are often limited to short gate exposures. A nanosecond pulse module based on MOSFET devices has been demonstrated at our lab, which is capable of generating pulses of adjustable full width at half maximum (FWHM) from 3 ns to D.C. operation with 1 ns switching time and a burst repetition rate up to 4 MHz. A method of supplying gate-current pulses to the MOSFET device is adopted to increase the switching speed based on the totem pole driver. Nanosecond optical gating time of an 18-mm proximity-focused MCPII with a metallic underlay photocathode was obtained. A MCPII with standard multi-alkali photocathode was analyzed for comparison. Moreover, a photocathode-MCP model based on the Finite Integral Technique (FIT) is developed to investigate the dependence of the gating time on the sheet resistance of the photocathode.

Switching efficiency improvement in spin torque majority gates

Spin torque majority gate (STMG) is one of the promising options for beyond complementary metal-oxide-semiconductor logic. Improvement of its performance—switching speed vs. required current—is critical for its competitiveness. In this paper, (a) we identify an optimized layout of the gate comprised of thin magnetic wires with in-plane magnetization; (b) we optimize geometries of perpendicular magnetization spin torque majority gates. Micromagnetic simulations demonstrate an improvement in switching current for in-plane magnetization (with less than 1 ns switching time) from 6 mA in the original scheme to 1.5 mA in the present one. Additionally, failures of switching caused by vortex formation are eliminated and desired output magnetization is achieved. Various geometries of STMG with perpendicular magnetization are explored. The scheme with a straight cross proves to be the most advantageous. It is predicted to operate with the switching current of 50 μA and less than 4 ns switching time.

Low-Leakage-Current DRAM-Like Memory Using a One-Transistor Ferroelectric MOSFET With a Hf-Based Gate Dielectric

The power consumption of capacitor leakage current, increase of the capacitor aspect ratio, and lack of higher dielectric constant (κ) material are the difficult challenges to downscaling dynamic random access memory (DRAM). This letter reports a new one-transistor ferroelectric-MOSFET (1T FeMOS) device that displays DRAM functions of a 5 ns switching time, 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sup> on/off endurance cycles, and 30 times on/off retention windows at 5 s and 85 °C. A simple 1T process and a considerably low OFF-state leakage of 3×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup> A/μm were achieved. This novel device was achieved by applying ferroelectric ZrHfO gate dielectric to a p-MOSFET, which is fully compatible with existing high-κ CMOS processing.

(Invited) Ultra-Low Switching Power RRAM Using Hopping Conduction Mechanism

Very low 0.4 pJ switching energy, fast 50 ns switching time, large >1E5 retention window at 85oC, and 1E6 cycling endurance were achieved in Ni/GeOx/SrTiOy/TaN RRAM. This RRAM device has negative temperature coefficient (TC) and ruled by bulk hopping conduction mechanism that lead to potentially better distribution. This is in sharp contrast to the positive TC and randomly distributed metallic filament RRAM. Such low switching energy is necessary for large-array NAND memory application, a unique merit of this RRAM device.

Stacked GeO/SrTiOx Resistive Memory with Ultralow Resistance Currents

We report a high performance and low-power operated resistive memory. Using stacked covalent-bond-dielectric GeOx on metal-oxide SrTiOx to form the cost-effective Ni/GeOx/SrTiOx/TaN resistive random access memory, ultralow set power of small 1 μW (0.9 μA at 1.2 V), reset power of 13 pW (0.13 nA at 0.1 V), fast 50 ns switching time and good 106 cycling endurance are realized.