Npn Heterojunction Bipolar Transistors Research Articles

A Comparative Study of InGaP/GaAs Collector-Up HBTs for High-Reliability Small-Scale PA Applications

In this paper, the characteristics of InGaP/GaAs collector-up (C-up) pnp and npn heterojunction bipolar transistors (HBTs) with the graded InGaAs base and the nonuniform doped collector are demonstrated, and the performances as well as the reliability of the novel HBTs have been compared with the conventional InGaP/GaAs HBTs with various collector structures and thermal schemes. Compared to conventional HBTs, the studied C-up HBTs exhibited better current-driving capability, higher RF efficiency, and improved long-term reliability. Note that the pnp device displayed greater thermal stability enhancements, which are distinct and reproducible, than the npn device. The favorable data of the pnp C-up HBT could be attributed to higher electron mobility, resulting in low base resistance and higher emitter resistance improving the thermal stability. The comparison results, based on pragmatic observations from the C-up HBTs without relatively large heat-dissipation configurations, should be very useful for the reliable and the cost-effective design as small-scale power amplifiers in the wideband CDMA system.

Efficient Band-to-Trap Tunneling Model Including Heterojunction Band Offset

We present an efficient band-to-trap tunneling model based on the Schenk approach, in which an analytic density-of-states (DOS) model is developed based on the open boundary scattering method. The new model explicitly includes the effect of heterojunction band offset, in addition to the well-known field effect. Its analytic form enables straightforward implementation into TCAD device simulators. It is applicable to all one-dimensional potentials, which can be approximated to a good degree such that the approximated potentials lead to piecewise analytic wave functions with open boundary conditions. The model allows for simulating both the electric-field-enhanced and band-offset-enhanced carrier recombination due to the band-to-trap tunneling near the heterojunction in a heterojunction bipolar transistor (HBT). Simulation results of an InGaP/GaAs/GaAs NPN HBT show that the proposed model predicts significantly increased base currents, due to the hole-to-trap tunneling enhanced by the emitter-base junction band offset. The results compare favorably with experimental observation.

Efficient Band-to-Trap Tunneling Model Including Heterojunction Band Offset

It is well-known that band-to-trap tunneling processes in semiconductor devices cause a significant increase in terminal currents under high electric fields [1-3]. Standard band-to-trap tunneling models such as those by Schenk [1-2] and Hurkx [3] are widely incorporated in TCAD device simulation tools [4]. However, these models were developed for silicon devices, so they did not include the effect of band offsets in heterojunction devices, though they are routinely used in simulating the latter. As shown recently by Myers [5], the band offsets at the emitter-base (E-B) junction in heterojunction bipolar transistors (HBTs) can greatly enhance the band-to-trap tunneling near the E-B junction and consequently exacerbate the degradation of gain due to radiation damage. In this paper, we propose an improved band-to-trap tunneling model based on Schenk’s approach, which includes heterojunction band offsets and can be easily implemented into device simulators. Within Schenk’s approach, the band-to-trap tunneling is modeled [1] as the Shockley-Read-Hall recombination with the field-dependent carrier lifetime τ(T, F) given by Fig. 1(a), where T and F denote temperature and electric field respectively, Et is the trap binding energy measured from the band edge, and I(z) denotes the modified Bessel function. Characteristics of band profile, including the effect of electric field, affect the field enhancement factor g(T, F) through the 3D tunneling density of states (DOS) ρF(E). Schenk used the constant field DOS expression in his original model, which is a reasonable approximation for homojunction devices. However, detailed calculations in Ref. [5] show that the E-B junction band offsets in HBTs can significantly increase the DOS near the junction. Myers [5] computes the DOS by numerically solving the Schrodinger equation for the actual potential profile in a NPN HBT. Different from Ref. [5], we approximate the actual potential (e.g., black curve in Fig. 1b) by a linear potential with band offset (red curve in Fig. 1b), and develop an analytic DOS model that includes the band offset, for efficiency and easy implementation in device simulation. The new DOS model is obtained through the following steps: (i) separate the plane parallel to the heterojunction from the direction perpendicular to the junction and use the zero-field 2D DOS for the parallel plane; (ii) approximate the 1D potential along the perpendicular direction using a piece-wise linear profile with band offsets and analytically solve for the wave function in each region with open boundaries at the two outmost ends; (iii) normalize the 1D wave functions according to the Dirac Delta normalization condition [6]; (iv) compute the 3D tunneling DOS that goes into the Schenk model from the zero-field 2D DOS and the normalized 1D wave functions. Figure 1(c) shows a comparison of the 3D tunneling DOS versus carrier energies, computed by several methods, for the red potential in Fig. 1(b). The constant field DOS expression depends only on the field strength, not on the spatial location, as shown by the black solid curve. The color solid curves were obtained using the Fortran code provided by Myers [5] that numerically solves the Schrodinger equation and computes the DOS for the red potential. The color dashed curves were computed using the analytic DOS model proposed in this work. As expected, our analytic model produces the same DOS as those of the numerical method for the given potential. It is clearly seen that, when taking account of the heterojunction band offset, the DOS can be much higher than that of the constant field approximation. In particular, the closer the trap is located to the heterojunction, the higher the DOS is than the constant field value. For example, at 5 nm from the junction, the computed DOS using our model is more than ten orders of magnitude higher than that of the constant field expression for energies of 0.25 eV below the band edge. The substantially increased DOS near the heterojunction is expected to significantly enhance the band-to-trap tunneling in the vicinity of the junction. It turns out that the proposed DOS model can be generalized to arbitrary piece-wise linear 1D potentials. The band-to-trap tunneling model with the new DOS is being implemented in CHARON, an open-source multi-dimensional parallel TCAD code developed at Sandia National Laboratories. Sandia National Laboratories is a multi-program laboratory operated by Sandia Corporation, a wholly owned subsidiary of Lockheed Martin Corporation, for the United States Department of Energy's National Nuclear Security Administration under Contract DE-AC04-94AL85000. Figure 1

(Invited) Development of III-Nitride Bipolar Transistor Switches and Rectifiers

The successful development of III-V nitride materials systems have led to active research of electronic devices in the past decades. III-nitride (III-N)-based devices have a bandgap engineering flexibility, large energy gap, direct band structure, and high carrier mobility when compared to Si- and SiC -based devices, providing new performance improvement opportunities for high-speed and energy-efficient electronics. In particular, tremendous efforts have been devoted to the quest for heterojunction field effect transistors (HFETs). Today, commercial GaN HFETs are available for microwave power amplifiers and power electronic circuits. On the other hand, bipolar transistors are also essential devices in order to fully exploit the potential of III-N materials systems and the associated semiconductor technologies. For instance, insulated-gate-bipolar transistors would require integrated bipolar transistor and unipolar transistor structures to optimally operate such devices in a vertical current conduction form. The development of III-N bipolar switches in either two-terminal or three-terminal forms have therefore been actively sought. Unfortunately, myriad technological challenges in the growth and the fabrication processing have limited the progress of III-N bipolar transistors for years. These particular device technologies are still in the early stage of the technology development. In this presentation, we will review the development status of III-N bipolar transistor switches and vertical GaN rectifiers. Early development of heterojunction bipolar transistors (HBTs) using AlGaN/GaN heterojunctions was unsuccessful because of the limited current drive and current gain. The GaN/InGaN HBTs, on the other hand, showed promising device performance. We studied optimized epitaxial growth in a metalorganic chemical vapor deposition (MOCVD) reactor, developed a direct-growth (or non-regrowth) mesa-type III-N HBT fabrication processing technology, and achieved state-of-the-art of GaN/InGaN NPN HBT performance.[1],[2],[3],[4] These devices exhibited high-current gain of >100, high current drive density of >100 kA/cm2, and high d.c. power handling capability of > 3 MW/cm2. Small-signal microwave amplification with a cut-off frequency (f T) of 8GHz was also demonstrated experimentally. Similarly, GaN-based rectifiers have been studied in recent years and these devices have reportedly demonstrated switching performance approaching theoretical values. At Georgia Tech, our preliminary study demonstrated that 800-V homojunction GaN PIN rectifiers can achieve a specific on-state resistance of R ON = 2.8 mOhm-cm2. [5]The large turn-on voltage of GaN PIN diodes, however, could be problematic in circuit applications. To address this problem, GaN junction-barrier Schottky (JBS) rectifiers are also under study. Using a nickel as the Schottky contact material and an additional MOCVD regrowth step, our preliminary results demonstrated a GaN JBS diode with a turn-on voltage of ~0.8V, a value similar to typical silicon PN diodes. These results demonstrated the feasibility of using bipolar carrier transport mechanisms and PN junctions in III-N devices for power amplifications and switching circuits. Further device design and processing techniques that help achieve these performance characteristics will be discussed in the conference. [1] Z. Lochner, et. al. , Appl. Phys. Lett. 99 (19), 193501-1–3 (2011). [2] Y. Zhang, et. al. Phys. Stat. Sol. (c) 8 (7–8), 2451–2453 (2011). [3] S. Shen et. al., IEEE Electron Device Lett., 32 (8), 1065–1067 (2011). [4] Y. Lee, et. al. , Physica Status Solidi(a), 209(3), 497-500 (2012). [5] T. Kao, et. al., IEEE Trans. Electron Devices, 62(8) 2679-2683 (2015).

Test simulation of neutron damage to electronic components using accelerator facilities

The purpose of this work is to demonstrate equivalent bipolar transistor damage response to neutrons and silicon ions. We report on irradiation tests performed at the White Sands Missile Range Fast Burst Reactor, the Sandia National Laboratories (SNL) Annular Core Research Reactor, the SNL SPHINX accelerator, and the SNL Ion Beam Laboratory using commercial silicon npn bipolar junction transistors (BJTs) and III–V Npn heterojunction bipolar transistors (HBTs). Late time and early time gain metrics as well as defect spectra measurements are reported.

GaN/InGaN avalanche phototransistors

We report on III–nitride (III–N) avalanche phototransistor (APT) action by illuminating ultraviolet (UV) photons onto a GaN/InGaN npn heterojunction bipolar transistor in an open-base configuration. A high responsivity of >1 A/W was measured for the device operating at a collector-to-emitter voltage (VCE) of <15 V in the phototransistor mode. The carrier multiplication in the reversed biased collector leads to a photocurrent avalanche as VCE increases. At λ = 380 nm, the GaN/InGaN APT shows a responsivity of >68 A/W at VCE = 95 V. The InGaN APT demonstrates the feasibility of using III–N bipolar transistor structures for high-sensitivity UV photodetection applications.

Generalized Early Voltage Model of Bipolar Transistors for Linearly Graded Germanium in Base

The standard Early voltage of the SPICE Gummel-Poon model (SGP) is generalized for SiGe npn heterojunction bipolar transistors (HBTs). An accurate model for Early effects compatible with the SGP model is obtained considering graded germanium induced bandgap narrowing effect in the base in modern SiGe HBTs and simplified to a compact model which is consistent with ISE TCAD simulation results. The presentation of the Early effect model is significant for the design and simulation of the high performance SiGe BiCMOS technology.

Analytical base-collector depletion capacitance in vertical SiGe heterojunction bipolar transistors fabricated on CMOS-compatible silicon on insulator

The base—collector depletion capacitance for vertical SiGe npn heterojunction bipolar transistors (HBTs) on silicon on insulator (SOI) is split into vertical and lateral parts. This paper proposes a novel analytical depletion capacitance model of this structure for the first time. A large discrepancy is predicted when the present model is compared with the conventional depletion model, and it is shown that the capacitance decreases with the increase of the reverse collector—base bias—and shows a kink as the reverse collector—base bias reaches the effective vertical punch-through voltage while the voltage differs with the collector doping concentrations, which is consistent with measurement results. The model can be employed for a fast evaluation of the depletion capacitance of an SOI SiGe HBT and has useful applications on the design and simulation of high performance SiGe circuits and devices.

Growth and characterization of NpN heterojunction bipolar transistors with In 0.03Ga 0.97N and In 0.05Ga 0.95N bases

The material and device characteristics of InGaN/GaN heterojunction bipolar transistors (HBTs) grown by metalorganic chemical vapor deposition are examined. Two structures with different p-In x Ga 1− x N base region compositions, x In=0.03 and 0.05, are presented in a comparative study. The higher indium content base is expected to provide improvements in device performance via its higher p-type doping efficiency and lower bulk resistivity. However, the DC gain for both devices is the same at ∼37. The tradeoffs involved with using higher indium composition in the base for NpN HBTs are investigated by atomic force microscopy, Hall-effect measurement, and device characterization.

First- and second-order electrical modelling and experiment on very high speed SiGeC heterojunction bipolar transistors

We present in this paper an electrical study centred on NPN heterojunction bipolar transistors (HBTs), realized in an industrial BiCMOS SiGe:C process, featuring high attractive performances (ft > 200 GHz) in terms of microwave behaviour and low-frequency noise; reaching this level of performance with good dc characteristics could be however a difficult challenge. Electrical modelling is investigated, using our 2D simulator, based on the drift–diffusion model (DDM). The simulations were very efficient for optimizing the devices. The dc and ac results obtained in this work are efficiently compared with electrical characteristics coming from measurements and SPICE-like parameter extractions, from simulations via a compact model (HICUM) implemented in the so-called commercial simulator ADS (advanced design system). This work was a first step for designing RF circuits like oscillators in a simple way.

Base doping and dopant profile control of SiGe npn and pnp HBTs

Incorporation of high doping concentrations and the creation and maintaining of steep doping profiles during processing are key enabler for high level RF performance of heterojunction bipolar transistors (HBTs). In this paper, we discuss results of base doping and dopant profile control for npn and pnp SiGe HBTs fabricated within 0.25 μm BiCMOS technologies. High level of electrically active B and P doping concentrations (up to 10 20 cm −3) have been incorporated into SiGe. By adding C to SiGe steep doping profiles have been maintained due to the prevention of dopant diffusion during device processing. It is shown that broadening of P doping profiles caused by segregation could be reduced by lowering the deposition temperature for the SiGe cap. B and P atomic layer doping is shown to be suitable for the creation of steep and narrow doping profiles. This result is demonstrating the capability of the atomic layer processing approach for future devices with critical requirements of dopant dose and location control.

Simulations of non-uniform, nonlinear collector doping profiles for SiGe HBTs

In this work, the authors examine the effects of the shape of the collector doping profile in current-generation SiGe npn heterojunction bipolar transistors. The n-type doping profile in the region between the p-type SiGe base and the heavily doped n-type subcollector is simulated by various analytic functions and included in one-dimensional computer simulations. The results are examined in terms of RF performance versus breakdown. It is determined that altering the shape of the profile as compared to a uniform profile enables an increase in performance only in certain doping regimes. At high-integrated collector dose (low breakdown), profiles with their dose concentrated nearer the collector–subcollector junction outperform those that have their dose more evenly spread throughout the collector region. However at low-integrated collector dose (high breakdown) this advantage disappears. In fact the trend actually reverses in some cases such that for high-breakdown devices a uniform collector profile may be preferred. The advantage in FT of one profile over another can be as much as 15 GHz at a given breakdown voltage.

A collector-up heterojunction bipolar transistor using a p-type doping buried layer

In this paper, we report a collector-up npn heterojunction bipolar transistor (C-up HBT) which employs a p-type doping buried layer inserted between an extrinsic emitter and a subemitter for current confinement. Fabrication of C-up AlGaAs/GaAs HBTs with a selectively buried layer by metalorganic chemical vapour deposition (MOCVD) regrowth is described. The fabricated C-up AlGaAs/GaAs HBT demonstrates good common-emitter I–V characteristics and a current gain of 18. A systematic analysis is performed to verify the functionality of the p-type doping buried layer using a two-dimensional device simulator. It is found that the p-type doping buried layer should be biased properly to achieve the high efficiency of current confinement. And the HBT with a large ΔEV at the base-emitter heterojunction is preferred for the proposed C-up HBTs to reduce hole back-injection.

Atomic layer processing for doping of SiGe

Atomic layer processing has been demonstrated for doping of SiGe during Reduced Pressure Chemical Vapour Deposition (RPCVD) in a commercial single wafer reactor. Atomic level control of dose and location has been obtained for B doping using B 2H 6 and for P doping using PH 3. The main idea of atomic layer processing is the separation of adsorption of the reactant gases from the deposition process. By this way, self-limitation has been shown for P doping. By lowering the temperature for B 2H 6 exposure (100 °C), the non-self-limiting character of the B doping process can be changed to self-limitation. By this manner, very shallow doping profiles with low sheet resistance have been obtained, capable for future ultra-shallow junction applications. P atomic layer doping is shown to be suitable for the creation of steep and narrow doping profiles suitable for high-performance pnp Heterojunction Bipolar Transistors (HBTs). This result, together with the already demonstrated usage of B atomic layer doping for npn HBTs, demonstrates the capability of the atomic layer processing approach for future devices with critical requirements for dopant dose and location control.

Study on Mg memory effect in npn type AlGaN/GaN HBT structures grown by MOCVD

AlGaN/GaN npn heterojunction bipolar transistor structures were grown by low-pressure MOCVD. Secondary ion mass spectroscopy (SIMS) measurements were carried out to study the Mg memory effect and redistribution in the emitter–base junction. The results indicated that there is a Mg-rich film formed in the ongrowing layer after the Cp 2Mg source is switched off. The Mg-rich film can be confined in the base section by switching off the Cp 2Mg source for appropriate time before the end of base growth. Low temperature growth of the undoped GaN spacer suppresses the Mg redistribution from Mg rich film. The delay rate of the Mg profile in sample C with spacer growing in low temperature is about 56 nm/decade, which becomes sharper than 80 nm/decade of the samples A and B without low temperature spacer.

A comparison of low-frequency noise characteristics and noise sources in NPN and PNP InP-based heterojunction bipolar transistors

Low-frequency noise characteristics of NPN and PNP InP-based heterojunction bipolar transistors (HBTs) were investigated. NPN HBTs showed a lower base noise current level (3.85 /spl times/ 10/sup -17/ A/sup 2//Hz) than PNP HBTs (3.10 /spl times/ 10/sup -16/ A/sup 2//Hz), but higher collector noise current level (7.16 /spl times/ 10/sup -16/ A/sup 2//Hz) than PNP HBTs (1.48 /spl times/ 10/sup -16/ A/sup 2//Hz) at 10 Hz under I/sub C/=1 mA, V/sub C/=1 V. The NPN devices showed a weak dependence I/sub C//sup 0.77/ of the collector noise current, and a dependence I/sub B//sup 1.18/ of the base noise current, while the PNP devices showed dependences I/sub C//sup 1.92/ and I/sub B//sup 1.54/, respectively. The dominant noise sources and relative intrinsic noise strength were found in both NPN and PNP InP-based HBTs by comparing the noise spectral density with and without the emitter feedback resistor. Equivalent circuit models were employed and intrinsic noise sources were extracted. The high base noise current of PNP HBTs could be attributed to the exposed emitter periphery and higher electron surface recombination velocity in P-type InP materials, while the relatively high collector noise current of NPN HBTs may be due to the noise source originating from generation-recombination process in the bulk material between the emitter and the collector.

Technology and First Electrical Characteristics of Complementary NPN and PNP InAlAs/InGaAs Heterojunction Bipolar Transistors

A selective molecular beam epitaxy (MBE) regrowth approach is presented and applied in the demonstration of complementary InP heterojunction bipolar transistor (HBT) technology for monolithic integration of NPN and PNP HBTs. State-of-art performance has been observed: The DC gain was 35 for both integrated NPN and PNP HBTs. fT of 79.6 GHz and fmax of 109 GHz were achieved for NPN devices while fT of 11.6 GHz and fmax of 22.6 GHz were achieved for PNP devices. Little performance degradation has been observed compared with same design NPN or PNP HBT layers grown on individual substrates. Monolithic microwave integrated circuits (MMICs) based on complementary InP HBT technology have been studied for the first time using this technology and their electrical characteristics are presented.

Tunnel diode collector contact in InP based PNP heterojunction bipolar transistors

A tunnel diode collector contact to InP based PNP heterojunction bipolar transistors (HBTs) is suggested and demonstrated. The additional heavily doped n-type contact layer replaces the thick p-type contact layer required in conventional structures. The thermal and electrical properties of the collector contact layer thus become similar to those of NPN HBTs. A secondary ion mass spectroscopy study explores the maximum tin doping level that can be obtained in the base. Finally, the temperature dependence of the current gain is presented and interpreted.

Modeling of heterojunction bipolar transistors at any temperature, pressure, strain and alloy composition

A theoretical model is proposed for the predictive simulation of the performance and reliability of heterojunction bipolar transistors (HBTs) operating at high temperatures and pressures at any levels of carrier injections. The model emphasizes the effects of heteroemitter interface band offsets and space charge region recombination on the carrier transport, current gain and 1/ f noise in HBTs any level of carrier injections. The extended tight binding model (ETB) and statistical thermodynamic model are used to study the material properties of heteroemitter as a function of composition, temperature, strain, and pressure. The results are implemented in the developed extended drift–diffusion (EDD) model to study the current–voltage, current gain and 1/ f noise characteristics of HBTs. The model suggests that decreasing (increasing) the emitter alloy composition increases (decreases) the heteroemitter space charge recombination current and base current and decreases (increases) the dc current gain of Npn HBTs. Numerical analysis indicates that the dc emitter and base current–voltage, dc current gain, and 1/ f noise characteristics of Npn-(Al, Ga)As/GaAs HBTs and npn-GaAs BJTs are dominated by the heteroemitter space charge region recombination process for small forward biases at T=300 K. The model can be useful in predicting the performance of HBTs operating at high temperatures, pressures for any level of carrier injections.

III-N-V low-bandgap nitrides and their device applications

Four families of III-N-V compounds for electronic and optoelectronicapplications are presented: InNAsP/InP, GaInNAs/GaAs, Ga(In)NP/GaP andGaInNP/GaAs. InNAsP/GaInAsP quantum wells grown on InP are superior forlong-wavelength microdisc lasers (and so expected for edge-emitting lasers),as compared to GaInAs/GaInAsP quantum wells, because of the larger conductionband offset from the addition of a small amount of nitrogen (0.5% to 1%) inthe InAsNP quantum wells. GaInNAs/GaAs heterostructures emitting at 1.3 µmat room temperature have stimulated much interest in 1.3 µmvertical-cavity surface-emitting lasers. Here we report the use of GaInNAs asthe base of a heterojunction bipolar transistor (HBT), which exhibits a lowerturn-on voltage than HBTs with the usual GaInAs base. Incorporating a smallamount of N in GaNxP1-x alloys leads to a direct bandgap behaviour ofGaNP, and red light-emitting diodes based on a GaNP/GaP double heterostructuregrown directly on (100) GaP substrates have been fabricated. Finally,incorporating N into GaInP barriers in a quantum well is shown to lower theconduction band offset, and GaInNP/GaAs could be potentially ideally suitedfor npn HBTs.