Nonvolatile Organic Transistor Memory Devices Research Articles

Solution-Processed Nonvolatile Organic Transistor Memory Based on Semiconductor Blends.

Solution-processed nonvolatile organic transistor memory devices are fabricated by employing semiconductor blends of p-channel 6,13-bis(triisopropylsilylethynyl)pentacene and n-channel poly{[ N, N'-bis(2-octyldodecyl)-naphthalene-1,4,5,8-bis(dicarboximide)-2,6-diyl]- alt-5,5'-(2,2'-bithiophene)} (P(NDI2OD-2T); N2200) on polystyrene-brush as a polymer electret. Electret-based memory characteristics are significantly changed depending on the frontier molecular orbitals of the active semiconductors because the charge-trapping efficiency is mainly determined by the energy barrier to transfer electrons and holes from the active channel to the electret layer. A semiconductor mixture with an optimized blending ratio results in an efficient programming and erasing process. Thus, we obtained a remarkably high ratio of ON/OFF current (memory ratio) about 107 and a large amount of shifts in the threshold voltage (memory window) between the programmed and erased states of 55 V, while single-component N2200 showed only writing-once-read-many (WORM)-type memory. Especially, the programmed data can be stably retained more than 10 years with a sufficient memory ratio of 103. Furthermore, our semiconductor blend system leads to preferable vertical phase separation, which affords good reliability under a sequential memory operation condition as well as stability in ambient air. It is expected that our memory devices can be applied for versatile data storage in printed and flexible electronic applications.

High-Performance Nonvolatile Organic Transistor Memory Using Quantum Dots-Based Floating Gate

A novel nonvolatile floating-gate transistor memory device using CdSe@ZnS quantum dots (QDs) embedded the insulating polymer as a charge-storage layer along with the rational design of device structure is presented. The core-shell structure CdSe@ZnS QDs can efficiently trap both holes and electrons under the applied writing/erasing operations, resulting in a considerable threshold voltage shifts (ΔV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> ) over 50 V and forming high-conductance (ON) and low-conductance (OFF) states at a gate voltage of 0 V. The value of threshold voltage shift is controlled by writing and erasing voltages, regardless with source-drain voltages. Furthermore, it exhibits a long retention time (the ΔV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> can maintain 76% at 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup> s) and outstanding endurance characteristics (>500 cycles), demonstrating extraordinary stable and reliable memory property. Moreover, a thin layer of Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> was introduced as tunneling dielectric layer which is essential for the high-performance floating-gate transistor memory device. The nonvolatile organic transistor memory devices using QDs-based floating gate show great potential application for high-performance organic memory devices.

Floating-gate nanofibrous electret arrays for high performance nonvolatile organic transistor memory devices

Nanofibrous electret arrays based organic field-effect floating-gate transistor memory was firstly developed by electrospinning. The nanofiber arrays are composed of a novel porphyrin molecule of [5,15-bis[4-(pyridyl)ethynyl]-10,20-diphenyl]-21H,23H-porphyrin (DPP) as charge-trapping elements and polystyrene (PS) as the tunneling layer. The floating-gate transistor memory based on electrospinning nanofibrous electret arrays exhibited a reliable controllable threshold voltage shift and effective charge-trapping ability which was obviously superior to the counterparts fabricated with widely employed spin-coating technique. The result shows that electrospinning can be used as an effective artificial strategy to produce predesigned microstructure for the electrets, optimize the electrical memory characteristics, and may be applied in future nonwoven electronic memory devices.

Organic Electronics: Conjugated Polymer Nanoparticles as Nano Floating Gate Electrets for High Performance Nonvolatile Organic Transistor Memory Devices (Adv. Funct. Mater. 10/2015)

Organic Electronics: Conjugated Polymer Nanoparticles as Nano Floating Gate Electrets for High Performance Nonvolatile Organic Transistor Memory Devices (Adv. Funct. Mater. 10/2015)

Conjugated Polymer Nanoparticles as Nano Floating Gate Electrets for High Performance Nonvolatile Organic Transistor Memory Devices

A molecular nano‐floating gate (NFG) of pentacene‐based transistor memory devices is developed using conjugated polymer nanoparticles (CPN) as the discrete trapping sites embedded in an insulating polymer, poly (methacrylic acid) (PMAA). The nanoparticles of polyfluorene (PF) and poly(fluorene‐alt‐benzo[2,1,3]thiadiazole (PFBT) with average diameters of around 50–70 nm are used as charge‐trapping sites, while hydrophilic PMAA serves as a matrix and a tunneling layer. By inserting PF nanoparticles as the floating gate, the transistor memory device reveals a controllable threshold voltage shift, indicating effectively electron‐trapping by the PF CPN. The electron‐storage capability can be further improved using the PFBT‐based NFG since their lower unoccupied molecular orbital level is beneficial for stabilization of the trapped charges, leading a large memory window (35 V), retention time longer than 104 s with a high ON/OFF ratio of &gt;104. In addition, the memory device performance using conjugated polymer nanoparticle NFG is much higher than that of the corresponding polymer blend thin films of PF/polystyrene. It suggests that the discrete polymer nanoparticles can be effectively covered by the tunneling layer, PMAA, to achieve the superior memory characteristics.

High-performance nonvolatile organic transistor memory devices using the electrets of semiconducting blends.

Organic nonvolatile transistor memory devices of the n-type semiconductor N,N'-bis(2-phenylethyl)-perylene-3,4:9,10-tetracarboxylic diimide (BPE-PTCDI) were prepared using various electrets (i.e., three-armed star-shaped poly[4-(diphenylamino)benzyl methacrylate] (N(PTPMA)3) and its blends with 6,6-phenyl-C61-butyric acid methyl ester (PCBM), 6,13-bis(triisopropylsilylethynyl)pentacene (TIPS-pen) or ferrocene). In the device using the PCBM:N(PTPMA)3 blend electret, it changed its memory feature from a write-once-read-many (WORM) type to a flash type as the PCBM content increased and could be operated repeatedly based on a tunneling process. The large shifts on the reversible transfer curves and the hysteresis after implementing a gate bias indicated the considerable charge storage in the electret layer. On the other hand, the memory characteristics showed a flash type and a WORM characteristic, respectively, using the donor/donor electrets TIPS-pen:N(PTPMA)3 and ferrocene:N(PTPMA)3. The variation on the memory characteristics was attributed to the difference of energy barrier at the interface when different types of electret materials were employed. All the studied memory devices exhibited a long retention over 10(4) s with a highly stable read-out current. In addition, the afore-discussed memory devices by inserting another electret layer of poly(methacrylic acid) (PMAA) between the BPE-PTCDI layer and the semiconducting blend layer enhanced the write-read-erase-read (WRER) operation cycle as high as 200 times. This study suggested that the energy level and charge transfer in the blend electret had a significant effect on tuning the characteristics of nonvolatile transistor memory devices.

Multilevel nonvolatile transistor memories using a star-shaped poly((4-diphenylamino)benzyl methacrylate) gate electret

Multilevel nonvolatile transistor memories were fabricated using star-shaped poly((4-diphenylamino)benzyl methacrylate) (star-PTPMA) electret dielectric for charge storage and N,N′-bis(2-phenylethyl)perylene-3,4,9,10-bis(dicarboximide) (BPE-PTCDI) as an n-type semiconductor. Charges were controllably stored by applying a negative voltage bias, detected by shifting the threshold voltage, and this device retained the digital states even when the supplied voltage was removed. The multilevel data storage characteristics obtained by applying different gate voltages suggested that the device possessed nonvolatile write-many-read-many (WMRM) memory behaviors. The electronic charges were transferred and permanently accumulated in the gate electret from the restricting region of the star-PTPMA with well-defined charge trapping elements, but not in the case of linear-PTPMA. P-type pentacene was also used as a semiconductor layer to clarify the operating mechanism under a gate electric field. Our results demonstrated the significance of the architecture effect of the polymer electrets for nonvolatile organic transistor memory devices and their potentials in high-density data storage. Nonvolatile transistor memories combine the functionality of transistors in microchips with memory elements that are able to store information even if the power is turned off. As such they have great promise for the construction of next-generation computers. Wen-Chang Chen from National Taiwan University and colleagues from National Central University in Taiwan and Hokkaido University in Japan have now developed an organic multilevel nonvolatile transistor memory. The transistor element of the device is constructed from a polymer and a polymer electret - a dielectric material that has a quasi permanent electric charge. In this system current is generated by a combination of an applied external voltage and the charge stored in the electret - variation of which controls the overall current. Such polymer memory devices are of particular interest for potential applications in flexible electronics. Multilevel nonvolatile transistor memories were fabricated with inserted electret dielectric of star-shaped poly((4-diphenylamino)benzyl methacrylate). The devices could be controllably charged and retain the digital states even when the supply voltage was removed. The multilevel data storage characteristics by applying different gate voltages suggested novel ‘write-many-read-many memory’ behaviors.

Chemoselective reduction of graphene oxide and its application in nonvolatile organic transistor memory devices

A facile method for the chemoselective reduction of graphene oxide (CrGO) has been developed via silver(I)-catalyzed decarboxylation. CrGO was characterized by X-ray photoelectron spectroscopy and X-ray diffraction. CrGO can be well-dispersed in most polar solvents, facilitating its nanosheet thin film preparation via a spin coating solution process for device fabrication. A proof of concept nonvolatile organic transistor memory device using CrGO as the charge-trapping layer showed a larger memory window of over 60 V and a higher ON/OFF current ratio of up to 104 compared to that of the precursor, graphene oxide (GO).

Nonvolatile organic transistor-memory devices using various thicknesses of silver nanoparticle layers

We demonstrate the modification of the memory effect in organic memory devices by adjusting the thickness of silver nanoparticles (NPs) layer embedded into the organic semiconductor. The memory window widens with increasing Ag NPs layer thickness, a maximum window of 90 V is achieved for 5 nm Ag NPs and the on/off current ratio decreases from 105 to 10 when the Ag NPs layer thickness increases from 1 to 10 nm. We also compare the charge retention properties of the devices with different Ag NPs thicknesses. Our investigation presents a direct approach to optimize the performance of organic memory with the current structure.