New Topology Of Multilevel Inverter Research Articles

A new topology of multilevel inverter with switches count reducing at symmetrical/asymmetrical mode

The <span>multi-level inverter (MLI) has an important role in modern technologies due to its advantages. On the other hand, its circuits need a large number of switches, capacitors and direct current (DC) sources. This paper introduces a new topology for a MLI with a reduction in number of switches, no need for capacitors in exchange for an increase in number of levels in the output. The proposed model is operated in symmetric and asymmetric modes with the presence of resistive and inductive loads. Whereas, (5 and 9) output levels were obtained in symmetric and asymmetric modes, respectively. In contrast, the number of switches was halved and without need for capacitors, compared to the conventional MLI topologies not a secret that reducing the number of switches has the effect of reducing cost and complexity, in addition to the problems of balancing the voltage on capacitors. The programming environment used to build the proposed model of the MLI was MATLAB/Simulink, where the validity of the hypotheses contained in this paper were proved and the obtained results are identical to what was planned under different loads and different operation modes. In addition, the paper included a comparison study among the proposed topology and conventional topologies in terms of the number of switches, capacitors and </span>sources.

The New Topology of Multilevel Inverter with Less Number of Switches

A new multilayer inverter topology is proposed in this study. The cascaded feature is used in this innovative topology. In addition to the isolated DC sources seen in Cascaded H- bridge. The clamping diode in Diode and the multilevel inverter (CHB-MLI) Inverter with Clamped Multilevel (DC-MLI). With these advantages, an inverter topology with 18 total component counts when coupled had been discovered. This proposed topology has the potential to generate up to According to the ratio allocated to its DC sources, there are 17 output levels. Aside from increasing the number of output voltage levels, this study has a relatively low number of component counts. The THD limit defined by IEEE standard is also a goal (i.e. 5 percent) all voltage applications under 69kV. To ensure that the suggested topology is functional, it is being simulated in Mat lab/Simulink with various modulation indexes. The amount of THD, the number of voltage outputs, and the RMS voltage are all being monitored and discussed. Finally, to assess the uniqueness of the suggested topology, a comparison study with recently disclosed topologies is being carried out.

A Seventeen Multilevel High-Power Application Inverter with Low Total Harmonic Distortion

In this paper, a new topology of multilevel inverter (MLI) is designed with a fewer number of components and low total harmonic distortion (THD) for high-power photovoltaic (PV) systems. The key limitations of conventional MLI topologies are high total harmonic distortion (THD) and the use of a large number of switching components due to which the cost of the overall inverter is high. In conventional MLI, THD can be significantly reduced by the addition of a large value filter element at the input side; however, it will result in increased size and cost. Thus, achieving a pure sinusoidal AC at the output and to maintain a low THD level is a major issue in conventional MLIs. The proposed MLI has the advantage of decreasing the output THD by using a modified form of the cascaded H-Bridge structure and sine pulse width modulation technique. The proposed inverter consists of 6 unidirectional switches and 2 bidirectional switches, and there is no extra requirement for additional voltage balancing capacitors or clinching diodes. The individual switching states and SPWM operation for generating the gate pulses of the proposed MLI are discussed in detail. Relevant waveforms are plotted, equations are derived, and mathematical analysis is carried out. A steady-state analysis of the proposed MLI demonstrates an output voltage with 17 levels while using only four DC sources. Simulation results of the proposed MLI for single-phase and three-phase structures are obtained, and comparison is carried out with existing MLI topologies which shows that the proposed MLI has significantly low THD and better performance. From the results, it is clear that the proposed MLI has a THD of 3.52% in comparison with four conventional MLIs whose THDs are 6.1%, 6.63%, 7.3%, and 9.93%. Moreover, the proposed MLI generates 17 voltage levels by using only 08 switching devices, whereas the conventional MLIs use more than 10 switching devices for the generation of 15 voltage levels.

A high-performance multilevel inverter with reduced power electronic devices

This paper introduces a new topology of multilevel inverter, which is able to operate at high performance. This proposed circuit achieves requirements of reduced number of switches, gate-drive circuits, and high design flexibility. In most cases fifteen-level inverters need at least twelve switches. The proposed topology has only ten switches. The inverter has a quasi-sine output voltage, which is formed by level generator and polarity changer to produce the desired voltage and current waveforms. The detailed operation of the proposed inverter is explained. The theoretical analysis and design procedure are given. Simulation results are presented to confirm the analytical approach of the proposed circuit. A 15-level and 31-level multilevel inverters were designed and tested at 50 Hz.

Analysis of a New Reduced Switch Nine Level Inverter

<p>The multi level inverter system is mostly used in ac drives, when both reduced harmonic contents and high power are required. In this paper a new topology of multilevel inverter is introduced. This type has many steps with less power electronic switches. Due to the less number of switches the cost of the inverter is very less and also less installation area is required. Firstly, we describe briefly the structural parts of the inverter then switching strategy and operational principles of the proposed inverter are explained and operational topologies are given. Simulation is performed using MATLAB SIMULINK. Various PWM techniques are applied to the circuit such as PDPWM, PODPWM, APODPWM, VFPWM and COPWM. By comparing among the PWM techniques, PODPWM provide the less THD value and COPWM provide a higher fundamental RMS output voltage.</p><p> </p>

Investigation of single phase reduced switch count asymmetric multilevel inverter using advanced pulse width modulation technique

In this paper, a new topology for Multilevel Inverter (MLI) with reduced switch count is proposed with an asymmetric dc source configuration. This configuration is used to double the output voltage level in multilevel inverter based on switched dc sources, by adding two switches with dc sources. The increased number of levels in the output voltage reduces the filtering requirements. The working principle of the proposed asymmetric inverter is presented through the single phase fifteen level inverter. The harmonic contents of different modulation indices are examined. The performance analysis of the inverter is compared with trapezoidal and Sinusoidal Pulse Width Modulation (SPWM) in terms of Total Harmonic Distortion (THD), fundamental rms voltage (V rms ) and Crest Factor (CF). The simulation results for the same are evaluated using MATLAB/SIMULINK

A New Multilevel Active Power Filter Using Switches Meticulously Controlled

Shunt active power filter based on multilevel inverter is used to compensate the power factor and to delete the harmonics. This one permits to reduce the inverse voltages applied to the filter switches and their switching frequencies. Nevertheless, the high number of used switches requires a complicated controller and increases the switching losses; where the necessity of finding another resolution system. In this work a new topology of multilevel inverter is proposed as a shunt active power filter using two IGBT transistors in series of opposite sense meticulously controlled by a parallel control algorithm, with the concept of reduced number of six switches which are able to create five levels of the output voltage. This system substute the classical system of eight switches. The harmonic currents identification is carried out using the instantaneous active and reactive power method. The simulation is performed using Matlab/Simulink. The obtained results show that the filtering performances are well enhanced.

Symmetric and Asymmetric Design and Implementation of New Cascaded Multilevel Inverter Topology

Nowadays, use of multilevel inverters in high-power applications clearly can be seen. High quality and lower distortion of the output voltage and low blocking voltage of semiconductor switches are being presented as the major privileges of the multilevel inverter compared to the traditional voltage source inverter. In this paper, a new topology of multilevel inverter is proposed as fundamental block. The proposed topology is generalized using series connection of the fundamental blocks. The proposed multilevel inverter has been analyzed in both symmetric and asymmetric operation modes. A great perfection in voltage levels number with minimum switching devices has been obtained in both symmetric and asymmetric modes. Thereafter, a detailed study of losses and peak inverse voltage (PIV) of the proposed multilevel inverter is given. Also, in continuation, a comparison between the proposed topology and the traditional one and a recently developed topology is carried out. Finally, a computer simulation using MATLAB/Simulink is presented and a laboratory prototype implementation verifies the results.

Investigations on Three Phase Five Switch Multilevel Inverter With Reduced Number of Switches

The multi-level inverter system is mostly used in ac drives, when both reduced harmonic contents and high power are required. In this paper a new topology of multilevel inverter is introduced. This type has many steps with less power electronic switches. Due to the less number of switches the cost of the inverter is very less and also less installation area is required. Firstly, we describe briefly the structural parts of the inverter then switching strategy and operational principles of the proposed inverter are explained and operational topologies are given. Simulation is performed using MATLAB SIMULINK. Various conventional PWM techniques are applied to the circuit such as PDPWM, PODPWM, APODPWM, VFPWM and COPWM. By comparing among the conventional PWM techniques, PDPWM provide the less THD value and COPWM provide a higher fundamental RMS output voltage.

A new topology for multilevel inverter considering its optimal structures

In this paper, a new topology for multilevel inverters is proposed. The proposed topology consists of a basic unit and a full bridge converter. An extended topology is proposed and for the extended topology, three algorithms have been proposed to determine magnitudes of dc voltage sources. The proposed topology from viewpoint of the number of switches, the number of dc voltage sources, and the number of output voltage steps are optimized. The optimal structures for the extended topology are investigated for various objectives such as minimum number of switches and dc voltage sources for producing the maximum output voltage steps. Both simulation results and experimental verification of the proposed multilevel inverter for a single-phase 19-level multilevel inverter are presented.

Multilevel inverter with the ability of self-voltage balancing

This paper proposes a new topology of multilevel inverter that can work in three operation modes: the single-direction-balance mode, the bidirection-balance mode and the nonbalance mode. Only a DC source is required in a single-phase new inverter that works in the single-direction-balance mode or the bidirection-balance mode. The inverter has the ability of balancing voltages of DC capacitors without any assistance of other circuits. With this ability, low DC input voltages can result in high AC output voltages. Moreover, most switching devices switch at zero-voltage conditions. The proposed inverter with these two operation modes is suitable for low-power applications, especially with high frequency. It can also be applied in high-power applications and solutions are presented. The performance of the proposed inverter is confirmed by simulation and experiment.