Negative Voltage Supply Research Articles

Resting-potential-adjustable soft-reset integrate-and-fire neuron model for highly reliable and energy-efficient hardware-based spiking neural networks

In this study, the "resting-potential-adjustable soft-reset (RSR)" integrate-and-fire neuron model is proposed for higher reliability of hardware-based spiking neural networks (SNNs). Recently, researchers have attempted to implement neuronal models using hardware. However, previously proposed hard-reset (HR) and soft-reset (SR) neuron models are not suitable for hardware implementation for the following reasons. First, it is difficult to compensate for the neuron-threshold variation, which generally occurs in the fabrication processes. Second, they require a negative voltage supply that consumes substantial energy to implement the negative membrane potential (NMP). Third, for the HR and SR neuron models, maintaining the residual membrane potential (RMP) is challenging. The proposed RSR neuron model solves these challenges without any additional systems and algorithms and provides the following advantages: easy compensation for the neuron-threshold variation, significant energy reduction without using a negative voltage supply for the NMP, and precise preservation of the RMP. We discuss the behavior of the RSR neuron model and evaluate performance by comparing the inference results. Even with the neuron-threshold variation within the six-sigma range, the RSR neuron model restores the inference accuracy to the values of artificial neural networks (ANNs) for various datasets (CIFAR-10: 92.74%, SVHN: 95.00%, MNIST: 98.30%). In the case of the CIFAR-10, the RSR neuron model consumes 32.80% lower energy than the SR neuron model.

A High Crosstalk Suppression SiC MOSFET Gate Driver

Fast switching speeds and high switching frequencies bring serious crosstalk problems in SiC MOSFET applications. In this paper, we design a SiC MOSFET gate driver with high crosstalk suppression capability by using a multi-level drive and active Miller clamp technology. In the design, an auxiliary branch is introduced to control the source potential of the SiC MOSFET to achieve multilevel driving. The branch has a simple structure, simple control logic, no external negative voltage supply, and adjustable negative output voltage. The proposed SiC MOSFET gate driver was designed using the Central Semiconductor Manufacturing Corporation (CSMC) 0.8 μm BCD high voltage process. The designed SiC MOSFET gate driver has an area of 2967 μm × 3180 μm. The simulation verification model is based on Wolfspeed’s SiC MOSFET product C3M0075120D. Post-layout simulation results show that a SiC MOSFET gate driver with a crosstalk suppression capability of over 150 V/ns is obtained, which can reliably drive SiC MOSFET power devices.

Crosstalk Suppression in Monolithic GaN Devices Based on Inverted E-Field Decoupling

A novel structure of inverted electric-field decoupling (IED) to suppress the lateral crosstalk in monolithic gallium nitride (GaN) devices is proposed in this article. The IED structure features a Schottky metal in the trench between high-voltage power and low-voltage logic GaN devices, which is lined with nitride passivation and electrically connected with an on-chip integrated negative voltage supply ( ${V} _{-}$ ). The IED structure forms the inverted electric fields ( ${e}$ -fields) against the power device exerted ones, which can reduce the local ${e}$ -fields at logic devices, decouple the monolithic devices, and suppress the lateral crosstalk. The calibrated TCAD simulation has been carried out for 100- and 650-V rating monolithic GaN devices with IED structure. During the blocking state of power device, the crosstalk current can be suppressed to negligible percentages over the current of power device by ${V} _{-} V, while in switching operations, both the crosstalk current and gate voltage in the logic device can be effectively suppressed. Possible false turn-on can be eliminated when ${V} _{-} V for 100-V rating and ${V} _{-} V for 650-V rating. The IED structure demonstrates high feasibility with a large process window. The proposed IED structure is promising for solving the crosstalk problems in high-frequency and highly integrated monolithic GaN devices and integrated circuits (ICs) for power conversion applications.

Novel Low-Side/High-Side Gate Drive and Supply With Minimum Footprint, High Power Density, and Low Cost for Silicon and Wide-Bandgap Transistors

High-power silicon field-effect transistors as well as insulated gate bipolar transistors and particularly wide-bandgap semiconductor transistors typically need negative turn-off voltage for a secure off-state, resilience to spurious turn on, and rapid transition through the saturation mode. We present a gate driver configuration with compact and very efficient supply of the high and low sides of power transistor bridges with asymmetric bipolar control voltages without the need for costly and lossy isolated dc-dc converter and only low-voltage active components. The underlying negative voltage gate driver supply circuit consists of only a few cost-efficient components, its electrical potential is referenced to the source of the controlled semiconductor power switch, and its operation is synchronized with the gate driver output. It outcompetes the established use of isolated dc-dc converters in gate circuits with negative voltage needs with respect to cost, size, reliability, and efficiency. Importantly, the proposed negative voltage supply allows bootstrapping without the need for controllable high-voltage semiconductors for the sake of further cost reduction. We present detailed design rules of the circuit and experimentally validate circuit and control. In the automotive prototype implementation, size of the gate driver supply was reduced by 61%, cost by 57%, and loss by more than 16%.

Radiation-Induced DC Parametric Degradation of Enhancement Mode GaN-on-(111)Silicon High-Electron-Mobility Transistors

AlGaN/GaN high-electron-mobility transistors (HEMTs) for applications in radiation environments has required the exact determination of their radiation hardness. Although bulk GaN is the preferred substrate for the epitaxial growth of GaN and AlGaN, (111) silicon is a possible substrate for HEMT devices. The stability of electrical parameters of enhancement-mode (E-mode) GaN HEMTs under gamma irradiation is an essential characterization for reliability. The present work reports the transfer characteristics degradation of E-mode GaN HEMTs under various total dose irradiation from 5krad up to 60Mrads. This represents the first comprehensive total dose study ranging from a few krads up the tens of Mrads. The measured device-to-device variations within groups of devices are presented. The evolutions of critical DC parameters with accumulated total dose is found to be significant at low doses and saturates at high dose levels. The degradation mechanism is very similar to the reported radiation-induced shallow electron traps that trap and release electrons in the near surface GaN and AlGaN layers. Due to the unique properties including high breakdown voltage, high electron mobility and high thermal stability, wide-bandgap semiconductor power electronic devices, especially Gallium Nitride (GaN) high-electron-mobility transistors (HEMTs), have shown great promise in space, defense and nuclear applications, which often involve radiation-hardened electronics that require high radiation tolerance to fluxes of neutrons or gamma ray of devices. To turn the promising potential of GaN HEMTs into reality, investigations on the influence of irradiation on the device performance and reliability are essential. Many studies have investigated the radiation hardness of group III–nitride compound semiconductor devices under various irradiation types, such as electrons, protons, neutrons, and X-rays and at various total irradiation doses. They generally showed higher radiation tolerance compared with Si because of high displacement energy of GaN, demonstrating the favorability of GaN devices in hard radiation environments. Many studies have investigated the influence of 60Co gamma radiation on the device electrical characteristics. However, they were all focusing on depletion mode (D-mode) devices. Enhancement mode (E-mode) GaN-on-Si transistors have been commercially available for years. Their major advantages over D-mode devices are elimination of negative voltage supply and the enabling of direct-coupled FET logic (DCFL) for digital circuits. They also improve the efficiency of commercial DC-DC converters in various power levels and topologies. A previous work on gamma radiation of E-mode GaN-on-Si HEMTs only reported cumulative total doses of up to 1 Mrads (Si). The present work provides a complete coverage of low-to-high irradiation doses from 5krads up to 60Mrads (Si), for commercially available E-mode GaN HEMTs and the devices are characterized to gauge variations in the critical DC parameters. To the best of the author’s knowledge, the present work is the first to investigate the gamma radiation tolerance of E-mode GaN HEMTs covering such a wide range of total doses. This facilitates the observation of the complete degradation behavior of DC parameters in hard radiation applications of the E-mode GaN HEMTs. The devices were supplied in the form of 0.9mm square passivated die with round solder bumps for contacts. They have a rated continuous drain-to-source voltage VDS of 60V, and a rated continuous drain current ID of 1A. These GaN-on-Si devices were fabricated on Si wafers considering process compatibility and cost. An aluminum nitride (AlN) thin layer was grown on the Si wafer to be a seed layer for the AlGaN/GaN heterostructure. Subsequently, the AlGaN/GaN heterostructure was grown on the AlN layer, with a thin AlGaN layer grown above the highly resistive GaN serving as a strained interface between the GaN and AlGaN crystal layers, allowing the creation of a two-dimensional electron gas (2DEG) filled with abundant free electrons with ultra-high mobility. The gate electrode was processed subsequently forming a depletion region under the gate. As an E-mode transistor, the device is turned on by applying a positive bias to the gate. All the irradiations were conducted at room temperature by 60Co gamma-rays with a flux of 318.5Rads (Si)/s, at the dry-cell panoramic gamma irradiator in the University of Maryland Radiation Facilities. The entire irradiation procedure consists of two parts. The first part is higher-dose irradiation with total doses of up to 60Mrads based on two stages. At the first stage, the devices were irradiated at 10Mrads, while at the second stage, the devices were irradiated for another 50Mrads, with three of them taken out after 25Mrads during the second stage. The second part is lower-dose irradiations with total doses of up to 2Mrads. The temperature throughout the irradiation process was monitored to be below 30°C.

Highly Linear Distributed Mixer in 0.25- $\mu \text{m}$ Enhancement-Mode GaAs pHEMT Technology

This letter presents the design and measured results of novel wideband, highly linear gate-pumped distributed downconverter mixers. The circuit is realized in a 0.25-μm, Enhancement-mode GaAs pseudomorphic High Electron-Mobility Transistor process which requires no negative voltage supply. Two cells with different biases in parallel are used to achieve third-order intermodulation product cancelation. Each cell utilizes the distributed topology to absorb the first-order gate-source capacitances C gs1 . Two mixers are demonstrated: 1) a single-ended (SE) mixer and 2) a single-balanced (SB) mixer. The SE and SB mixers achieve a measured third-order input intercept point above 30 dBm in the RF frequency ranges from 6-26 GHz and 6-20 GHz, respectively. Both mixers show a conversion loss of less than 10 dB. The balanced mixer exhibits more than 30 dB of LO-RF isolation.

Gain Improvement of Enhancement-Mode AlGaN/GaN High-Electron-Mobility Transistors Using Dual-Gate Architecture

We demonstrate a dual-gate (DG) AlGaN/GaN high-electron-mobility transistor (HEMT) structure with enhancement-mode (E-mode) operation. The DG device consists of an E-mode gate and a depletion-mode (D-mode) gate instead of the dual D-mode gate electrodes used in previously reported works; thus no negative voltage supply is required when the DG device is used in amplifier circuits. The E-mode DG HEMTs exhibit similar DC characteristics to E-mode single-gate devices but show a 9 dB gain improvement at 2.1 GHz under the same bias conditions. The power gain improvement can be attributed to the higher output impedance and lower feedback capacitance in the DG structure.