This work provides an interpretation of defect and trap state behavior following the application of intensive negative-bias stress (NBS) and negative-bias illumination stress (NBIS) on IGZO TFTs. Staggered bottom-gate TFTs were fabricated with a 50 nm IGZO film sandwiched between a 50 nm gate oxide and a 50 nm passivation oxide layer. The working metal was molybdenum for the gate electrode and source/drain contacts. A passivation anneal was done and an alumina capping layer was deposited via ALD to promote electrical stability; full process details are provided in a previous report. Devices were tested with a Keysight B1500 parameter analyzer to establish initial device characteristics, with +20 V PBS and -10 V NBS stress applications for 20 ks having a negligible response. Intensive stress testing was then done for 10 ks at either high bias (-20 V NBS) or with the addition of illumination (-10 V NBIS at 410 nm). The responses to intensive NBS and NBIS applications were both non-traditional and distinctive.