N-type Silicon Heterojunction Solar Cells Research Articles

A Comparative Study on p- and n-Type Silicon Heterojunction Solar Cells by AFORS-HET.

Despite the increasing trend of n-type silicon wafer utilization in the manufacturing of high-efficiency heterojunction solar cells due to the superior advantages over p-type counterparts, its high manufacturing cost remains to be one of the most crucial factors, which impedes its market share growth with state-of-the-art silicon heterojunction (SHJ) solar cells demonstrating high conversion efficiencies from various configurations, the prospect of using an n-type wafer is debatable from a cost-efficiency point of view. Hence, a systematic comparison between p- and n-type SHJ solar cells was executed in this work using AFORS-HET numerical software. Front and rear-emitter architectures were selected for each type of wafer with ideal (without defects) and non-ideal (with defects) conditions. For ideal conditions, solar cells with p-type wafers and a front-emitter structure resulted in a maximum conversion efficiency of 28%, while n-type wafers demonstrated a maximum efficiency of 26% from the rear-emitter structure. These high-performance devices were possible due to the optimization of the bandgap and electron-affinity for all passivating and doping layers with values ranging from 1.3 to 1.7 eV and 3.9 to 4 eV, respectively. The correlation between the device structure and the type of wafers as demonstrated here will be helpful for the development of both types of solar cells with comparable performance.

Investigation of light-induced degradation in N-Type silicon heterojunction solar cells during illuminated annealing at elevated temperatures

In this paper, we study a light-induced degradation (LID) mechanism observed in commercial n-type silicon heterojunction (SHJ) solar cells at elevated temperatures using dark- and illuminated annealing for a broad range of illumination intensities (1–40 kWm−2) at temperatures from 25 to 180 °C. Three key results are identified. Firstly, an increase in solar conversion efficiency (η) of up to 0.3% absolute is observed after 3 min of dark annealing at 160 °C, attributed to improved surface passivation and a reduction in series resistance. Secondly, a temperature-dependent light-induced degradation behaviour is observed at temperatures as low as 85 °C under 1-sun equivalent illumination, with increasing degradation extent and rate for increasing temperatures. At 160 °C, an average η loss of 0.5 ± 0.3% absolute is observed after only 5 min and exceeding 0.8% in some cells. Thirdly, a subsequent light intensity-dependent recovery occurs with continued illumination exposure. Under 1-sun illumination at 160 °C, a reduction in net η loss up to 0.05 ± 0.1% absolute is observed after 2 h. Increasing the illumination intensity to 40 kWm−2 accelerates the recovery and can result in a net η improvement of 0.2% absolute at 150 °C within 100 s. The results suggest that attempts to improve the efficiency of SHJ solar cells using illuminated annealing could be detrimental to cell performance if not carefully optimised. Further investigation is required to identify the exact nature of the underlying defect mechanism(s) and develop appropriate mitigation strategies on commercially suitable timescales.

Lateral transport in silicon solar cells

We investigate lateral charge carrier transport in crystalline silicon solar cells. Under typical operation illumination of high-efficiency solar cells, a significant population of electrons and holes exist in the silicon wafer, leading to a non-negligible sheet conductance for both carrier types. To investigate the contribution of these sheet conductances to lateral transport in solar cells, we develop a model that calculates the effective series resistance of two sheet resistances coupled via a contact resistance. In solar cells, the upper sheet resistance describes the highly conductive region like a diffusion or a transparent conductive oxide, whereas the lower sheet resistance describes the silicon absorber. We find that the coupling contact resistance needs to be low to benefit from the lateral current flow in the silicon absorber. We show experimentally for silicon heterojunction solar cells that the silicon absorber supports lateral minority charge carrier transport for well-passivated devices. Another finding is that there is no principle advantage for coupling of the two sheet resistances for rear-junction or front-junction solar cells, as the pn-junction (for front-junction solar cells) does not prevent coupling. We suggest that for n-type silicon heterojunction solar cells, the observed advantage of the rear-junction over the front-junction architecture is due to practically lower contact resistance and higher mobility of electrons vs holes. We also confirm experimentally the importance of a low contact resistivity between the highly conductive region and the silicon absorber for effective coupling and present an innovative technique to extract contact resistance from comparing Suns-VOC and current–voltage measurements.

Comparative study on front emitter and rear emitter n-type silicon heterojunction solar cells: The role of folded electrical fields

Here, we presented a comparative investigation on the front and rear emitter n-type silicon heterojunction (SHJ) solar cells. The cell performances showed that the rear emitter SHJ solar cell featured higher open-circuit voltage (Voc), fill factor (FF) and conversion efficiency (Eff.), but suffering from a lower short-circuit current density (Jsc). The poor Jsc agreed well with the external quantum efficiency (EQE) results, that rear emitter SHJ had a inferior EQE than the front emitter ones, although the thinner a-Si:H(n+) layer had a better optical transmittance than that of a-Si:H(p) layer. Then, by adjusting the thickness of two sides intrinsic hydrogenated amorphous silicon (a-Si:H(i)) layers in the rear emitter SHJ solar cells, the Eff.s were further improved. It was believed that the folded electrical fields formed by ITO, doped a-Si:H layers, and n-type crystalline silicon (c-Si(n)) substrate played a great role on the cell performances. Consequently, by combining the optimized thickness of doped and intrinsic a-Si:H layers, for the rear emitter SHJ solar cells, a full-area certified Eff. of 21.71% on large area of 238.9 cm2 substrate was obtained, with a Voc of 0.731 V, Jsc of 37.46 mA/cm2, and FF of 0.793. Note that, the 21.71% full-area conversion efficiency relates to an aperture-area conversion efficiency of 22.57%.

Back Junction n-type Silicon Heterojunction Solar Cells with V2O5 Hole-selective Contact

In this work, a back junction solar cell design is explored for n-type crystalline silicon by using thermally evaporated V2O5 as a rear hole contact and n+ amorphous silicon (a-Si:H) as a front electron contact. Photoconductance measurements revealed an implicit open-circuit voltage (i-VOC) of 670mV for the solar cell precursor (before metallization), achieved by maximizing the work function of V2O5 with a thin nickel capping layer. The VOC value of the finished device was lower than projected at 617mV, most likely due to poor passivation of the active area perimeter. Nonetheless, an efficiency of 14.2% was achieved (in polished substrates), proving the potential of such a novel structure.

Capacitance study of inversion at the amorphous-crystalline interface of n-type silicon heterojunction solar cells

We use capacitance techniques to directly measure the Fermi level at the crystalline/amorphous interface in n-type silicon heterojunction solar cells. The hole density calculated from the Fermi level position and the inferred band-bending picture show strong inversion of (n)crystalline silicon at the interface at equilibrium. Bias dependent experiments show that the Fermi level is not pinned at the interface. Instead, it moves farther from and closer to the crystalline silicon valence band under a reverse and forward bias, respectively. Under a forward bias or illumination, the Fermi level at the interface moves closer to the crystalline silicon valence band thus increases the excess hole density and band bending at the interface. This band bending further removes majority electrons away from the interface leading to lower interface recombination and higher open-circuit voltage.