N-type Implantation Research Articles

Distinct junction transformations of pixel-arrayed long-wavelength infrared detectors by photocurrent mapping

Pixel-arrayed long-wavelength HgCdTe is of great significance in the development of infrared detection. However, the PN junction formation process for long-wavelength HgCdTe is complex. The damage induced by boron ion implantation and subsequent low-temperature annealing may results in changes in the effective doping concentration and geometry of the actual n-type implantation region. Therefore, an in-situ, non-destructive scanning-photocurrent-microscopy (SPCM) method is needed to test the performance and electroactive defects of HgCdTe devices. Here, the pixel-arrayed long-wavelength infrared detectors with n-on-p structure formed by B+ ion implantation in Hg vacancy-doped Hg0.78Cd0.22Te crystals were fabricated. The SPCM method is used to characterize the PN junction performance of long-wavelength Hg0.78Cd0.22Te array detectors. It is found that the long-wavelength device transformed from n-on-p structure to n-on-n− structure at about 175 K, and further turns into an n−-on-n-on-n− structure with the temperature increasing. In addition, when the temperature increases, the minority carrier diffusion length in the B+ ion implantation region gradually decreases with the activation of the recombination center. Our work provides an effective theoretical and experimental basis for the HgCdTe junction formation process.

Synthesis of GaSb-VDS thin film by electron beam physical vapour deposition and its electro-optical characterization as prerequisite for p-n device construction

III–V materials owing to have low effective masses, high mobilities and a direct band gap, exhibit suitability for both optoelectronic as well as tunnelling devices. Gallium Antimonide (GaSb), a III–V semiconducting compound, shows narrow band gap and high carrier mobility apposite for high-performance optoelectronics in the mid-IR range.The vertical directional solidification (VDS) is a crystal growth technique employed for the growth of high quality (>6N)bulk crystals, without the seed, without contact to the ampoule wall, without coating and without external pressure.Bulk crystalline GaSb was grown by VDS and then its fractured form is harnessed as source material for synthesis of thin film. GaSb-VDS thin semiconducting film of uniform thickness1.8μm was synthesized at 350°C by electron beam physical vapour deposition method.This thin film is p-type and will be implanted by group VI n-dopant(Telluriumions)impurities to form a junction. For same reason it is characterized for optical, electrical and morphological properties prior to support its claim as a device construction substrate. XRD, EDAX Raman, AFM, four probe and FTIR techniques were employed for the confirmation of crystalline, compositional, morphological, resistivity and optical band gap respectively.XRD of film reveals peaks close to 25°and42° corresponding to [111] and [220] crystal planes are in agreement as reported for crystalline GaSb. Raman spectra also confirm the GaSb crystalline film formation. SEM and EDAX of synthesized film found to be polycrystalline and agree the weight%of35.36and64.64 for GaandSb respectively. Four-probe technique yields the sheet resistance of 5.6Ωpersquare and optical band gap 0.728eV was obtained by FTIR. Optical band gap of the semiconducting film is obtained as 0.728eV and a Sheet resistance of5.6Ωpersquare. Uniform monolayer with low defect density is confirmed by Atomic force microscopy.It establishes formation of a p-type GaSb VDS thin film that is good for n-type implantation and show rectification tendency.

Low on-resistance 1.2 kV 4H-SiC power MOSFET with Ron, sp of 3.4 mΩ·cm2

A 4H-SiC power MOSFET with specific on-resistance of 3.4 mΩ·cm2 and breakdown voltage exceeding 1.5 kV is designed and fabricated. Numerical simulations are carried out to optimize the electric field strength in gate oxide and at the surface of the semiconductor material in the edge termination region. Additional n-type implantation in JFET region is implemented to reduce the specific on-resistance. The typical leakage current is less than 1 μA at VDS = 1.4 kV. Drain–source current reaches 50 A at VDS = 0.75 V and VGS = 20 V corresponding to an on-resistance of 15 mΩ. The typical gate threshold voltage is 2.6 V.

Enhancing bulk defect-mediated absorption in silicon waveguides by doping compensation technique

Silicon waveguide photodiodes (SiWG PD) based on the bulk defect-mediated absorption (BDA) of sub-bandgap photons are suitable to realize in-line optical power monitors for silicon photonic integrated circuits. Deep-level states to enable the BDA can be induced by exploiting the ion implantation steps that are used to embed PN junctions for carrier-depletion-based modulators. This manner usually exhibits limited responsivities since relevant processing conditions are optimized for the modulation rather than the BDA. In this letter, we solve this issue with the doping compensation technique. This technique overlaps P-type and N-type implantation windows at the waveguide core. The responsivity is enhanced due to the increased density of lattice defects and the reduced density of free carriers in the compensated silicon. Influences of the dimension of the dopant compensation region on responsivity and operation speed are investigated. As the width of this region increases from 0 μm to 0.4 μm, the responsivity at −5 V is improved from 2 mA/W to 17.5 mA/W. This level is comparable to BDA based SiWG PDs relying on dedicated ion bombardments. On the other hand, a bit-error-rate test at 10 Gb/s suggests that the device with 0.2-μm-wide compensation region exhibits the highest sensitivity.

A 40-nm 16-Mb Contact-Programming Mask ROM Using Dual Trench Isolation Diode Bitcell

A 16-Mb mask read-only memory (ROM) chip based on a novel diode structure is proposed. The diodes are constructed by buried n-type implantation layer and heavily doped p-type diffusion layer. With dual-trench isolation process and borderless contact scheme, the diode array can realize ultrahigh density. The fabricated mask ROM chip using 40-nm CMOS bulk technology is wired with three levels of metal, only two levels for diode arrays. The effective diode size is as small as 0.017 $\mu \text{m}^{\mathrm { {2}}}$ , which is the smallest bitcell of commercial mask ROM products in the world, to our best knowledge. The physical array density can achieve approximately 0.0225 mm $^{\mathrm { {2}}}$ /Mb. Test results indicate that chip standby leakage current is $ at 25 °C and $ at 85 °C with 2.5 V supply voltage. Array standby leakage is $ /Mb at 25 °C and $ /Mb at 85 °C with 2.5 V supply voltage.

A novel latch-up free SCR-LDMOS with high holding voltage for a power-rail ESD clamp

The low snapback holding voltage of the SCR-LDMOS device makes it susceptible to latch-up failure, when used in power-rail ESD (electro-static discharge) clamp circuits. In order to eliminate latch-up risk, this work presents a novel SCR-LDMOS structure with an N-type implantation layer to achieve a 17 V holding voltage and a 5.2 A second breakdown current. The device has been validated using TLP measurement analysis and is applied to a power-rail ESD clamp in half-bridge driver ICs.

Bidimensional silicon dosimeter: Development and characterization

Abstract Clinical dosimetry in radiotherapy is a well known matter but high conformal radiotherapy modalities (Intensity Modulated Radiation Therapy (IMRT), stereotactic treatments with photons and protons, Intensity Modulated Proton Therapy (IMPT)) possess problems due to small radiation fields with high dose gradients, variation in space and time of the dose rate and variation in space and time of the beam energy spectrum. A modular dosimetric detector, adequate for 2D pre-treatment dose verifications, has been developed in the framework of the European Integrated project MAESTRO. The detector is a monolithic segmented sensor obtained by n-type implantation on a 50 μthick epitaxial silicon p-type layer; this is later used to guarantee improved radiation hardness of the device against the accumulated dose. The detector is composed of a matrix of 21×21 pixels with a size of 2×2 mm 2 each and a 3 mm center-to-center distance. A full dosimetric characterization of the detector was performed with photon and proton beams and with gammas from a 60 Co unit. Results have been compared with those obtained with a Farmer and a CC13 Scanditronix/Welhoffer ion chamber as well as with the silicon matrix MapCHECK™. The first application of the MAESTRO prototype in the dosimetric verification of a clinical IMRT field is also reported. Results show that our modular detector represents a valuable tool for quality assurance in IMRT dose delivery and for high precision radiotherapy techniques.

Dosimetric characterization with 62 MeV protons of a silicon-segmented detector for 2D dose verifications in radiotherapy

Due to the features of the modern radiotherapy techniques, namely intensity modulated radiation therapy and proton therapy, where high spatial dose gradients are often present, detectors to be employed for 2D dose verifications have to satisfy very narrow requirements. In particular they have to show high spatial resolution. In the framework of the European Integrated Project—Methods and Advanced Equipment for Simulation and Treatment in Radio-Oncology (MAESTRO, no. LSHC-CT-2004-503564), a dosimetric detector adequate for 2D pre-treatment dose verifications was developed. It is a modular detector, based on a monolithic silicon-segmented sensor, with an n-type implantation on an epitaxial p-type layer. Each pixel element is 2×2 mm 2 and the distance center-to-center is 3 mm. The sensor is composed of 21×21 pixels. In this paper, we report the dosimetric characterization of the system with a proton beam. The sensor was irradiated with 62 MeV protons for clinical treatments at INFN-Laboratori Nazionali del Sud (LNS) Catania. The studied parameters were repeatability of a same pixel, response linearity versus absorbed dose, and dose rate and dependence on field size. The obtained results are promising since the performances are within the project specifications.

Preliminary dosimetric characterization of a silicon segmented detector for 2D dose verifications in radiotherapy

Due to the features of modern radiotherapy techniques, namely Intensity Modulated Radiation Therapy (IMRT) and Stereotactic Treatments with photon fields, where high spatial dose gradient are often present, detectors to be employed for two-dimensional (2D) dose verifications have to satisfy very narrow requirements. In particular, they have to exhibit high spatial resolution. In the framework of the European Integrated Project MAESTRO, a dosimetric detector adequate for 2D pre-treatment dose verifications was developed. It is a modular detector based on a monolithic silicon segmented sensor, with a n-type implantation on an epitaxial p-type layer. The sensor is composed of 21×21 pixels with 2×2 mm 2 area and 3 mm center-to-center distance. In this paper we report the first preclinical dosimetric characterization of the detector. The sensor was irradiated with 6, 10, 25 MV photon beams from a linear accelerator (LINAC). The studied parameters were repeatability of a single channel, reproducibility between different matrix elements, response linearity vs. absorbed dose and dose rate dependence of sensitivity. Some preliminary tests on energy dependence were also performed. The obtained results are promising since almost all the channels have performances within the project specifications (repeatability <0.5%, reproducibility <1%, deviation from linearity <1%, dose rate dependence <1%).

N-type doping of 4H-SiC with phosphorus Co-implanted with C or Si

Phosphorus has been shown to be a much better dopant than nitrogen in 4H−SiC for heavily doped n-type implantation. In this paper, the effect of co-implantation of phosphorus with carbon or silicon is studied. The implanted layers are characterized by an analytical technique (secondary ion mass spectrometry). Electrical measurements include sheet resistance and Hall measurements as well as forward and reverse I–V characterization of the resulting n+/p rectifiers. The effect of co-implantation of P/C and P/Si on the electrical activation of phosphorus has been monitored. After 1700°C anneal, respective sheet resistance values of 111 and 132 ohm/square were measured. Forward characteristics of these diodes are observed to obey a generalized Sah-Noyce-Shockley multiple level recombination model with four shallow levels and one deep level.

Ion Implantation Doping and High Temperature Annealing of GaN

ABSTRACTThe III-V nitride-containing semiconductors InN, GaN, and AIN and their ternary alloys are the focus of extensive research for application to visible light emitters and as the basis for high temperature electronics. Recent advances in ion implantation doping of GaN and studies of the effect of rapid thermal annealing up to 1100 °C are making new device structures possible. Both p- and n-type implantation doping of GaN has been achieved using Mg co-implanted with P for p-type and Si-implantation for n-type. Electrical activation was achieved by rapid thermal anneals in excess of 1000 °C. Atomic force microscopy studies of the surface of GaN after a series of anneals from 750 to 1100 °C shows that the surface morphology gets smoother following anneals in Ar or N2. The photoluminescence of the annealed samples also shows enhanced bandedge emission for both annealing ambients. For the deep level emission near 2.2 eV, the sample annealed in N2 shows slightly reduced emission while the sample annealed in Ar shows increased emission. These annealing results suggest a combination of defect interactions occur during the high temperature processing.

MeV ion implantation in GaAs technology

The technology base of MeV ion implantation in GaAs is reviewed, n-type implantation using Si and Si and S co-implants is emphasized. Experimental range and shape parameters obtained using secondary ion mass spectroscopy (SIMS) of Si implants having energies from 1 to 20 MeV are presented. Activation studies of these implants, as well as Si and S co-implants, annealed using both furnace anneal and rapid thermal anneal have been performed with Hall and capacitance-voltage measurements. Buried n + profiles with a peak carrier concentration of 2 × 10 18/cm 3, located as deep as 6 μm beneath the surface have been formed with the co-implantation of Si and S. Application of these implants to GaAs device fabrication is discussed. Several techniques for masking the high energy implants during selective implantation are presented. The performance values of two demonstration devices, a mixer diode and a varactor diode, show that state-of-the-art devices can be fabricated using MeV implantation.

Low-dose n-type ion implantation into Cr-doped GaAs substrates

Low-dose n-type ion implantation into Cr-doped GaAs substrates