Multirate Digital Signal Processing Research Articles

VLSI Implementation of 3-Parallel FIR Filters through Coefficient Symmetry Property and Fast FIR Algorithm

In multirate digital signal processing systems, polyphase filters are frequently used. The challenges in multirate digital signal processing systems primarily relate to efficiently processing signals at different rates while maintaining high-quality output. These challenges include computational complexity, power consumption, and signal delay. The coefficient symmetry property plays a key role in systematically arranging of filter taps in symmetric manner to improve operating efficiency. With a major focus on using the coefficient symmetry characteristic, this paper addresses the VLSI implementation of traditional Type-1 polyphase FIR filters. Furthermore, this paper incorporated 3-parallel FIR filters especially for sequences with odd lengths in order to take full advantage of the coefficient symmetry characteristic. The Fast FIR Algorithm (FFA) method is used to increase overall efficiency. Furthermore, in order to achieve better performance, a modified FFA technique is introduced to enhance overall performance. The paper thoroughly investigates important VLSI factors, such as power consumption, utilization, and delay, and shows how, by utilizing coefficient symmetry and applying this modified FFA technique, filters that are optimized for both power consumption and area utilization are able to be implemented. The results illustrate a significant reduction in both area and power consumption, particularly for longer filters, attributed to the reduced number of multiplication operations inherent in the fast FIR algorithm approach. Additionally, image processing application using 3x3 FIR filter is executed.

Reconstruction of multidimensional digital signals

We study the reconstruction of multidimensional digital signals in multirate digital signal processing. We show that the composition of sampling operator and interpolation operator forms the frame operator of multivariate discrete time wavelet (MDTW) system of scale matrix [Formula: see text]. By taking a collection of [Formula: see text] filters, we construct dual MDTW tight frames. Also, we discuss the existence and construction of MDTW Parseval frames in multidimensional sequence space. The necessary and sufficient condition for the existence of orthonormal basis of scale matrix [Formula: see text] is discussed. Using dual MDTW tight frame, we characterize biorthogonal pair of Riesz bases. Further, we define multivariate Parseval frame of weighted exponentials, dual multivariate tight frame of weighted exponentials of scale matrix [Formula: see text] in periodic space [Formula: see text]. Finally, we give the applications of MDTW frames in the theory of frames of weighted exponentials of scale matrix [Formula: see text] in periodic space [Formula: see text].

Supraharmonic estimation by polyphase DFT filter bank

As a side effect caused by new technologies, supraharmonics attracted the attention of researchers in recent years. Mitigation and analysis of supraharmonics distortions are of great importance to guarantee the power quality (PQ) available in the power grids since such distortions can cause serious damage to the grid-connected equipment. However, there are few works in literature reporting techniques for supraharmonics analysis, and PQ equipment is rarely capable of performing measurements in the supraharmonic range. This work proposes a supraharmonic estimation system utilizing a digital filter bank through a multirate digital signal processing technique. The polyphase decomposition applied in the decimating filter bank enables the simplification of the system implementation. Both synthetic and real signals are used to evaluate the technique in analyzing supraharmonic distortions. The proposed method shows a good application prospect in accurately measuring supraharmonics and with a significant reduction in computational complexity compared with the method presented in the IEC 61000-4-30 standard.

Frequency Truncated Discrete-Time System Norm

Computation of the frequency truncated norm of a discrete-time linear time-invariant system is required in multi-rate digital signal processing and model reduction applications. For a system represented using state-space equations, the frequency truncated norm itself is a particular case of an integral of the transfer function of a discrete-time linear time-invariant descriptor system over a limited frequency band. This letter provides closed-form expressions for this integral and the frequency truncated norm for direct computation in terms of the principal logarithm and matrix exponential function.

Weyl-Heisenberg frames and Balian-Low theorem in ℓ2(Z)

This paper focuses on the reconstruction of digital signals in multirate digital signal processing. We study the discrete time Weyl-Heisenberg (DTWH) system for oversampling schemes and describe the frame operator of DTWH frames as the composition of the sampling operator and interpolation operator. Using discrete time Zak transform, we characterize the dual discrete time Weyl-Heisenberg tight frames, DTWH frames, and tight DTWH frames based on oversampling schemes. In addition, we discuss the applications of DTWH frames to the reconstruction of Weyl-Heisenberg systems in periodic space L2([0, 1)). Finally, we give Balian-Low theorem for an orthonormal basis formed by DTWH systems and weak Balian-Low theorem for exact DTWH frames in sequence space ℓ2(Z).

Multirate Digital Signal Processing and Noise Suppression for Dual Active Bridge DC–DC Converters in a Power Electronic Traction Transformer

Power electronic traction transformer (PETT) is a single-phase ac–dc conversional system, which is made up of a cascaded H-bridge converter and output-parallel dc–dc converters, such as dual active bridge dc–dc (DAB) converters. As the voltage fluctuation of the dc output voltage of DAB converters is very small and the gain cross-over frequency of the open-loop transfer function of DAB converters is generally high, the DAB closed-loop control system is very sensitive to the influence of noises. The typical noises include the equivalent noise due to the conflict of controller interrupts, the noise due to the mismatch of sampling frequency and switching frequency (which is denoted as switching noise), the noise due to the second-order voltage ripple in the dc input side, the noise due to the quantization process of the analog-to-digital converter (which is denoted as quantization noise), and the noise due to the measuring error of transducers and conditioning circuits (which is denoted as measurement noise). The generation mechanism of these noises and their impacts on the DAB converters are analyzed. On the basis, the corresponding noise suppression schemes are presented, especially for the switching noise, quantization noise, and measurement noise. Besides, the mathematical models toward the sampling and the phase-shift modulation under multirate circumstance are derived, and the multirate digital control strategy of the PETT is proposed. Finally, based on a five-cell PETT laboratory prototype with a rated power of 30 kW, further research is carried out and the experiment results all verify the effectiveness of the proposed algorithms.

Performance and Analysis of Transmultiplexers Using Decimator and Interpolator

This paper deals with the smart applications of multirate digital signal processing. The two major operations are accomplished in consumer electronics and communication engineering. The process of reducing the sampling frequency of a sampled signal is called decimation. In the usage of decimating filters, only a portion of the out-of-pass band frequencies aliases into the pass band, in systems wherein different parts operate at different sample rates. A filter design, tuned to the aliasing frequencies all of which can otherwise stealth into the pass band, not only provides multiple stop bands but also exhibits computational efficiency and performance superiority over the single stop band design. The proposed method of transmultiplexer using decimation and interpolation filters analysis procedure is not only efficient but also opens up a new vista of being simple and elegant to compute for the desired over and above transmultiplexer.

Performance metrics on ultra low power polyphase decimation filter using carbon nanotube field effect transistor technology

Low power consumption and abatement in area are the most pre-eminent criteria to scheme the digital signal processor. Multi-rate signal processing studies digital signal processing systems which include conversion. Filters are the substantial building blocks of DSP. The polyphase filters are the momentous component in crafting of various filter structures. Polyphase structure employs FIR filter that terminates to very efficacious implementation. The polyphase decimation filter is generally built with multipliers, parallel in serial out shift register, serial in parallel out shift register, ripple carry adder, carry lookahead adder and parallel in parallel out shift registers as a delay element. To accomplish the desired results in performance parameters of the multiplier, a potent adder is proposed and embodied in the multiplier. The carbon nanotube field effect transistor (CNTFET) is an ameliorating new device that may trample some of the restraints of a silicon-based MOSFET. The circuits are designed in 32 nm CMOS and CNTFET technology in Synopsys HSpice. Performance parameters such as power, delay and power delay product are assayed and compared in both the technologies.

The analysis of decimation and interpolation in the linear canonical transform domain.

Decimation and interpolation are the two basic building blocks in the multirate digital signal processing systems. As the linear canonical transform (LCT) has been shown to be a powerful tool for optics and signal processing, it is worthwhile and interesting to analyze the decimation and interpolation in the LCT domain. In this paper, the definition of equivalent filter in the LCT domain have been given at first. Then, by applying the definition, the direct implementation structure and polyphase networks for decimator and interpolator in the LCT domain have been proposed. Finally, the perfect reconstruction expressions for differential filters in the LCT domain have been presented as an application. The proposed theorems in this study are the bases for generalizations of the multirate signal processing in the LCT domain, which can advance the filter banks theorems in the LCT domain.

Application and analysis of multi-rate sampled in structural health monitoring system

Huge and abundant measured information from a structural health monitoring system contain a large amount of noise and uncertain information. Multi-rate data processing can reduce data processing time and meet the real-time requirements in health monitoring systems. Multi-rate digital signal processing includes extraction and interpolation. By frequency domain decomposition method multi-rate systems is converted to an equivalent single-rate system, and simulated with simulink of MATLAB. In comparison with the simulation results of multi-rate system and single-rate system, we can conclude that in a multi-rate system the stability margin is increased, system response is accelerated and overshoot is reduced, so the dynamic quality of the system is improved.

Signal Reconstruction with Adaptive Multi-Rate Signal Processing Algorithms

Multi-rate digital signal processing techniques have been developed in recent years for a wide range of applications, such as speech and image compression, statistical and adaptive signal processing and digital audio. Multi-rate statistical and adaptive signal processing methods provide solution to original signal reconstruction, using observation signals sampled at different rates. In this study, a signal reconstruction process by using the observation signals which are sampled at different sampling rates is presented. The results are compared with the least mean squares (LMS) and the normalized least mean squares (NLMS) methods. As the results indicate, the signal estimation obtained is much more efficient than the previous studies. Designed multi-rate scheme provides significant advantages in terms of error and estimation accuracy.

ZERO ROTATION APROACH FOR DROOP IMPROVEMENT IN CASCADED INTEGRATORS COMBFILTER

Cascaded Integrators Comb (CIC) filter is a special class of linear phase FIR filter. It is the most simple decimation filter which does not require multipliers. Due to its simplicity, the CIC filter is usually used in the first stage of decimation. They are used in multi-rate digital signal processing systems which have different applications such as efficient filtering, sub band loading, analogue / digital conversions, audio video signals. However the filter exhibits a high pass band droop which is inacceptable in different application. In this paper, the improvement in pass band droop is done by zero rotation approach.

Cost Analysis and Simulation of Decimator for Multirate Applications

In this paper, a decimator design has been presented for multirate digital signal processing.  The decimator design has been analysed and simulated for cost comparison in terms of multipliers and MPIS. Two structures  namely Transposed Direct form and Symmetric Direct form have been used performance and  resource consumption analysis. The decimators have been designed  & simulated using MATLAB. It can be observed from the simulated results that symmetric structure comsumes almost 50% less multipliers and MPIS compared to transposed structure. So the symmetric structure based decimator is suitable to provide cost effective solution

Efficient Retiming of Multirate DSP Algorithms

Multirate digital signal processing (DSP) algorithms are often modeled with synchronous dataflow graphs (SDFGs). A lower iteration period implies a faster execution of a DSP algorithm. Retiming is a simple but efficient graph transformation technique for performance optimization, which can decrease the iteration period without affecting functionality. In this paper, we deal with two problems: feasible retiming-retiming a SDFG to meet a given iteration period constraint, and optimal retiming-retiming a SDFG to achieve the smallest iteration period. We present a novel algorithm for feasible retiming and based on that one, a new algorithm for optimal retiming, and prove their correctness. Both methods work directly on SDFGs, without explicitly converting them to their equivalent homogeneous SDFGs. Experimental results show that our methods give a significant improvement compared to the earlier methods.

Power Components Estimation According to IEEE Standard 1459–2010 Under Wide-Range Frequency Deviations

This paper proposes an accurate and computationally efficient time-domain implementation of the IEEE Standard 1459-2010 for power measurements. The most important parts are adaptive low- and bandpass finite-impulse-response (FIR) filters that extract dc and fundamental components, respectively. In addition, coefficient sensitivity problems of the large-order FIR comb cascade structure are overridden by using a multirate (decimation) digital signal processing technique. Even more, by using decimation antialiasing filters, the parameter estimation accuracy is improved. The symmetrical components are estimated through adaptive transformation matrix of phase shifters. The algorithm convergence provided a fast response and adaptability. The effectiveness of the proposed technique is demonstrated by simulation results. The algorithm shows a very high level of robustness and high measurement accuracy over a wide range of frequency changes.

FM Stereo Receiver Based on Software-Defined Radio

The paper proposes the FM stereo receiver based on Software-defined Radio by FPGA devices, according to the theories of multi-rate digital signal processing and switching means FM stereo decoding. Through the extraction and half-band filter to achieve down-sampling, the digital phase-locked loop extracted pilot signals and achieve the stereo decoding based sub-carrier switch signal. This article simulates the performance of the receiver in MATLAB Simulink environment and FPGA emulation mode. The simulate results and Signal TAP waveforms show that the method can effectively achieve the FM stereo demodulation. The receiver using common quadrature architecture can combine with other modes demodulation, so it has a high value and broad application prospects.

Design perfect reconstruction cosine-modulated filter bank by variable neighbourhood search-least-mean-square error

In multirate digital signal processing, cosine-modulated filter banks (CMFB) satisfying perfect reconstruction (PR) or near-perfect reconstruction (NPR) property are of great interest owing to their extensive applications in data compression, feature detection and extraction and signal transmultiplexing. And the key to PR CMFB design is to design a PR prototype filter (PF). However, designing optimal PR and NPR PF is essentially a constrained non-linear programming. It is generally modelled as a non-convex quadratically constrained quadratic optimisation problem. So far, this kind of optimisation is still a very difficult class of optimisation and no practical but few metaheuristic algorithm is availabe for finding its global optimal solution. The study proposed a two-stage method for designing PR PF. In the first stage, a metaheuristic algorithm based on variable neighbourhood search is proposed for designing lower-ordered PR PF, that is the corresponding PR CMFB has less channels. Then a least-mean-square error approach is introduced to increase the length of the designed lower-ordered PF with the PR property unchanged. Design examples are given to illustrate the proposed algorithm outperforms the existing one in reconstruction error and stopband attenuation.

Simultaneous Reactive-Power and Frequency Estimations Using Simple Recursive WLS Algorithm and Adaptive Filtering

A new simple approach to the design of digital algorithm for simultaneous reactive-power and frequency estimations of local system is presented. The algorithm is derived using the weighted-least-square method. During the algorithm derivation, a pure sinusoidal voltage model was assumed. Cascade finite-impulse-response (FIR) comb digital filters are used to minimize the noise effect and to eliminate the presence of harmonics effect. The most important point of this paper is the mathematical model that transforms the problem of estimation into an overdetermined set of linear equations. The investigation was simplified because the total similarity to the state of the problem of the active-power and frequency estimations was noticed. The only difference is the adaptive phase shifter applied to the voltage signal. In addition, coefficient-sensitivity problems of the large-order FIR comb cascade structure are overridden by using a multirate (decimation) digital signal processing technique. Even more, by using antialiasing filters, the parameter estimation accuracy is improved. The effectiveness of the proposed techniques is demonstrated by both simulation and experimental results. The algorithm shows a very high level of robustness, as well as high measurement accuracy over a wide range of frequency changes.

Illustration of decimation in digital signal processing (DSP) systems using matlab

Digital Signal Processing (DSP) has become one of the most powerful technologies in reshaping science and engineering, especially in the areas of communication and medicine. In this study, DSP applications where the signal at a given sampling rate needs to be converted into another signal with a different sampling rate known as multirate systems were investigated. This multirate DSP had been found useful in application like digital audio, video and even GSM technology. The work is implemented using MATLABTM software. Several plots obtained showed that decimator structures reduce the number of operations required for a particular application. With the sampling rate reduced, the number of filters required for any particular operation will be reduced drastically thereby reducing cost of such operations.Keywords: Digital Signal Processing, digital audio tape, compact disc, multirate, MatlabTM

Configurable Multirate Filter Banks

Multimedia communications require efficient and real-time implementations of multirate digital signal processing systems. The backbone structures of multirate systems are digital multirate filter banks. Therefore, efficient multimedia communications rely, in the first place, on real-time implementations of multirate filter banks. In this paper, we describe a Field Programmable Gate Array (FPGA) implementation of the analysis and synthesis filter banks which are the fundamental components of multirate systems. The implementation utilizes the parallel form of the distributed arithmetic technique which enables maximum exploitation of the parallelism inherent in the multirate filtering operation. Performance results demonstrate the effectiveness of the implementation and suggest that the FPGA platform is indeed attractive for implementing multirate filter banks.